Abstract: A method for determining a macroblock (MB) coding mode for a current MB in a dependent view. A window around a co-located MB in a base view is determined, wherein the co-located MB is a MB in the base view having a same location as the current MB in the dependent view. A coding mode complexity value (CMCV) is determined for each MB in the window, wherein the CMCV is based on a coding mode used to encode the MB. Rate distortion optimization (RDO) is performed for the current MB using a reduced number of coding modes if a total CMCV for all MBs in the window is less than a threshold, or using all supported coding modes if the total CMCV for all MBs in the window is greater than the threshold. A coding mode for the current MB is determined based on the RDO results.

Abstract: An apparatus, computer readable medium, and method of event based dynamic power management. The method includes responding to receiving an indication of an event that is external to a hardware block engine by adjusting the power to the hardware block engine, if the event indicates that the power to the hardware block engine should be adjusted. The method may include receiving a second event that is external to the hardware block engine. The method may include determining whether or not the power should be adjusted to the hardware block engine based on the event and the second event. If it is determined that the power should be adjusted, then the power may be adjusted to the hardware block based on the event and second event. A method of monitoring a component and sending an indication of an event that the component will not require a hardware block engine is disclosed.

Abstract: Briefly, methods and apparatus to provide image content to, and display image content on, variable refresh rate displays with reduced input lag. The methods and apparatus allow for image tearing, or the displaying of image content from more than one video frame, when the render rate of a provided video frame falls outside the display refresh rate range of a variable refresh rate display when the display is refreshing with a previous frame (e.g. the display is in active refresh), thus reducing the input lag of the content of the provided video frame. The methods and apparatus may also prevent image tearing when the render rate of provided video frames is within the display refresh rate range of a display.

Abstract: A casting system and method. The casting system can include an energy source and a hearth, which can have a tapered cavity. The tapered cavity can have a first end portion and a second end portion, and the tapered cavity can narrow between the first and second end portions. Further, the tapered cavity can have an inlet at the first end portion that defines an inlet capacity, and one or more outlets at the second end portion that define an outlet capacity. Where the cavity has a single outlet, the outlet capacity can be less than the inlet capacity. Where the cavity has multiple outlets, the combined outlet capacity can match the inlet capacity. Further, the cross-sectional area of the tapered cavity near the inlet can be similar to the cross-sectional area of the inlet.

Abstract: A method of assembling a semiconductor chip device is provided that includes placing an interposer on a first semiconductor chip. The interposer includes a first surface seated on the first semiconductor chip and a second surface adapted to thermally contact a heat spreader. The second surface includes a first aperture. A second semiconductor chip is placed in the first aperture.

Abstract: In one form, a computer system includes a central processing unit, a memory controller coupled to the central processing unit and capable of accessing non-volatile random access memory (NVRAM), and an NVRAM-aware operating system. The NVRAM-aware operating system causes the central processing unit to selectively execute selected ones of a plurality of application programs, and is responsive to a predetermined operation to cause the central processing unit to execute a memory persistence procedure using the memory controller to access the NVRAM.

Abstract: A method of making a seamless, tubular article comprises subjecting a cast tubular workpiece of a corrosion resistant alloy to at least about a 25% wall reduction at a temperature below a recrystallization temperature of the workpiece using a metal forming process comprising at least one of radial forging, rolling, pilgering, and flowforming. The cast tubular workpiece is a centrifugally cast tubular workpiece comprising an inner diameter and an outer diameter.

Abstract: An article of manufacture comprises a ferritic stainless steel that includes a near-surface region depleted of silicon relative to a remainder of the ferritic stainless steel. The article has a reduced tendency to form an electrically resistive silica layer including silicon derived from the steel when the article is subjected to high temperature oxidizing conditions. The ferritic stainless steel is selected from the group comprising AISI Type 430 stainless steel, AISI Type 439 stainless steel, AISI Type 441 stainless steel, AISI Type 444 stainless steel, and E-BRITE® alloy, also known as UNS 44627 stainless steel. In certain embodiments, the article of manufacture is a fuel cell interconnect for a solid oxide fuel cell.

Abstract: A hold down mechanism for releasably securing a refractory lining to a furnace. The hold down mechanism can comprise plate segments that form a composite plate. The plate segments can comprise a first plate segment structured to articulate relative to a second plate segment. Furthermore, a gap in the hold down mechanism can be structured to adjust in response to a thermal condition of the composite plate, such as thermal expansion or thermal contraction of at least one plate segment. The composite plate can also comprise an articulation plate pivotally coupled to at least one of the first plate segment and the second plate segment via a pivot and/or a slot and pin engagement. The composite plate can further comprise a third plate segment and a second articulation plate pivotally coupled to at least one of the second plate segment and the third plate segment.

Abstract: Methods and apparatus for restricting access by one or more processors to an area of a secondary storage unit are presented herein. The methods and apparatus may comprise an independent programmable storage controller logic that divides a storage area of the secondary storage unit into at least a first area and a second area and controls usage of the areas as at least two virtual secondary storage units such that the processor(s) access the at least two virtual secondary storage units as if accessing at least two physical secondary storage units by selecting one of the at least two virtual secondary storage units as an active virtual secondary storage unit to provide the processor(s) access to the active virtual secondary storage unit based on a secondary storage unit configuration. Each virtual secondary storage unit may contain at least one region of which an access permission setting is modifiable.

Abstract: A virtualized DisplayPort (DP) configuration data (DPCD) for multi-stream transport (MST) logical DP end points and non-DP end points allows DPCD configuration for links within a DisplayPort topology which are not configurable using DPCD. A virtualized DPCD may configure a link to an internal display of a MST sink device or a non-DP display to receive data using a dynamic refresh rate (DRR), display stream compression (DSC), panel self-refresh (PSR) and other DPCD configurable features.

Abstract: Various enhanced features are provided for centrifugal casting apparatuses, rotatable assemblies, and molds for casting products from molten material. These enhanced features include, among others, tapered gate portions positioned adjacent to the cavities of a mold, extended and shared gating systems, and detachable mold structures for modifying the thermodynamic characteristics and behavior of molds during casting operations.

Abstract: Shader resources may be specified for input to a shader using a hierarchical data structure which may be referred to as a descriptor set. The descriptor set may be bound to a bind point of the shader and may contain slots with pointers to memory containing shader resources. The shader may reference a particular slot of the descriptor set using an offset, and may change shader resources by referencing a different slot of the descriptor set or by binding or rebinding a new descriptor set. A graphics pipeline may be specified by creating a pipeline object which specifies a shader and a rendering context object, and linking the pipeline object. Part or all of the pipeline may be validated, cross-validated, or optimized during linking.

Abstract: Methods are provided for creating objects in a way that permits an API client to explicitly participate in memory management for an object created using the API. Methods for managing data object memory include requesting memory requirements for an object using an API and expressly allocating a memory location for the object based on the memory requirements. Methods are also provided for cloning objects such that a state of the object remains unchanged from the original object to the cloned object or can be explicitly specified.

Abstract: A method for coding a dependent view picture based on a reference picture includes selecting a reference picture from a base view picture list if a metric of intra macroblocks in an evaluated picture is greater than a first threshold, selecting a reference picture from a dependent view picture list if a metric of skipped macroblocks in the evaluated picture is greater than a second threshold, and coding a dependent view picture using the selected reference picture. An application-controlled weighting mechanism may be used if both of the thresholds are not met.

Abstract: An austenitic alloy may generally comprise, in weight percentages based on total alloy weight: up to 0.2 carbon; up to 20 manganese; 0.1 to 1.0 silicon; 14.0 to 28.0 chromium; 15.0 to 38.0 nickel; 2.0 to 9.0 molybdenum; 0.1 to 3.0 copper; 0.08 to 0.9 nitrogen; 0.1 to 5.0 tungsten; 0.5 to 5.0 cobalt; up to 1.0 titanium; up to 0.05 boron; up to 0.05 phosphorus; up to 0.05 sulfur; iron; and incidental impurities.

Abstract: A system and method for measuring integrated circuit (IC) temperature. An integrated circuit (IC) includes a thermal sensor and data processing circuitry. The thermal sensor utilizes switched currents provided to a reference diode and a thermal diode. The ratios of the currents provided to each of these diodes may be chosen to provide a given delta value between the resulting sampled diode voltages. At a later time, a different ratio of currents may be provided to each of these diodes to provide a second given delta value between the resulting sampled diode voltages. A differential amplifier within the data processing circuitry may receive the analog sampled voltages and determine the delta values. Other components within the data processing circuitry may at least digitize and store one or both of the delta values. A difference between the digitized delta values may calculated and used to determine an IC temperature digitized code.

Abstract: An apparatus includes a clock circuit and a plurality of display interface circuits. The clock circuit provides a common clock signal. The display interface circuits each provide a respective display link clock signal in response to the common clock signal. One of the display link clock signals is at a different clock speed that another of the display link clock signals.

Abstract: A method and apparatus provide for improving signal quality. The method includes receiving a first media signal, such as a video signal, in a first format, such as 1080p. The provided video signal is one that is created by upsampling a video signal recorded in a format having a lower sampling rate. The method also includes obtaining a second signal indicative of error within the first media signal. The second signal is in a second format, such as the format having a lower sampling rage in which the video signal was recorded. The signal is processed to place the second signal in the format of the first signal. Then, the estimated error signal is combined with the original signal to arrive at an error corrected output.

Abstract: A method for determining a macroblock (MB) coding mode for a current MB in a dependent view. A window around a co-located MB in a base view is determined, wherein the co-located MB is a MB in the base view having a same location as the current MB in the dependent view. A coding mode complexity value (CMCV) is determined for each MB in the window, wherein the CMCV is based on a coding mode used to encode the MB. Rate distortion optimization (RDO) is performed for the current MB using a reduced number of coding modes if a total CMCV for all MBs in the window is less than a threshold, or using all supported coding modes if the total CMCV for all MBs in the window is greater than the threshold. A coding mode for the current MB is determined based on the RDO results.