Abstract: Methods for producing zirconium strips that demonstrate improved formability are disclosed. The zirconium strips of the present disclosure have a purity and crystalline microstructure suitable for improved formability, for example, in the manufacture of certain articles such as panels for plate heat exchangers and high performance tower packing components. Other embodiments disclosed herein relate to formed substantially pure zirconium strip, articles of manufacture produced from the substantially pure zirconium strip, and methods for making the articles of manufacture.

Abstract: A method comprising determining that a minimum operation level of an integrated circuit (100) has been reached and that a sleep mode is therefore allowable; storing minimum operation context information to a RAM (115) in response to determining that the minimum operation level has been reached; switching to a sleep mode code (116) in the RAM (115); and transferring memory control from a primary memory controller (104) to a secondary memory controller (112) wherein only the secondary memory controller (112) controls the RAM (115). The method may include storing the sleep mode code (116) and a wakeup code (117) in the RAM (115) in response to determining that sleep mode is allowable, where the wakeup code (117) restores a minimum operation context using the minimum operation context information stored in the RAM (115). The method may also include placing a plurality of integrated circuit power islands into a sleep mode and leaving a secondary memory controller power island (109) in a normal power mode.

Abstract: In a power management scheme for a power-consuming (e.g. electronic) device, one of multiple predefined operating parameter sets is selected. Each of the sets comprises multiple operating parameter values for the device. Examples of operating parameters include clock frequency or voltage for example. The selection may be responsive to the detection of an event which warrants a change in a current power consumption state of the device. Any operating parameter value in the selected set that would prevent the device from meeting current operating demands is modified to a new value. The new value may be taken from another operating parameter set. The modified set of parameters is applied to the device in order to change the current power consumption state of the device.

Abstract: An image processing system and method receives one or more digital images in the form of image data, including selected object data of a digital image, and determines, by an electronic recognition process, if a recognition match is available between the selected object data of the digital image and image object library data associated with image descriptor library data. An automated library user interface presents selectable matched object descriptor data associated with the image descriptor library data when a recognition match occurs between the selected object data of the digital image and the image descriptor library data. In response, the automated library user interface provides user feedback data to confirm that the image descriptor library data corresponds with the selected object data of the digital image, or entered descriptor data if no match or an incorrect match occurs, to create library descriptor associated image data.

Abstract: The present disclosure relates to thermal management apparatus for a circuit substrate having heat generating components mounted on one or both sides thereof. The apparatus and method includes a circuit assembly having a first thermally conductive layer disposed on each side of the circuit substrate and being thermally coupled to one or more heat generating components of the circuit substrate. The apparatus and method includes a second thermally conductive layer disposed on each side of the circuit substrate and being thermally coupled to the first thermally conductive layer. The first thermally conductive layer and the thermally conductive layer can be shaped, sized, and/or configured to provide cooling of the one or more heat generating components disposed on each side of the circuit substrate by transferring and spreading the heat to the outside of the circuit assembly.

Abstract: The various embodiments herein disclosed include a method wherein an integrated circuit (100) may receive a code image from an external device (127), encrypt the code image using a cryptographic logic (113) with a Hardware Unique Key to create a Hardware Unique Code Image (119) where the Hardware Unique Key is inaccessible to the external device (127). The integrated circuit (100) will then store the Hardware Unique Code Image wherein the Hardware Unique Code Image is executable only after decryption using the Hardware Unique Key. The method also includes sending a command to a cryptographic logic (113) to request decryption of the Hardware Unique Code Image by the cryptographic logic (113) using the Hardware Unique Key and executing the Hardware Unique Code Image by the boot software (103) after the decryption.

Abstract: A digital rights management system includes an authentication module and a decryption module. If desired, the modules can be implemented in separate integrated circuits. The authentication module retrieves authentication information for protected content and powers down after the authentication information is retrieved. The decryption module decrypts the protected content based on the authentication information while the authentication module is powered down.

Abstract: An integrated circuit (100) may receive a boot loader code (114) via a debug access port (105), wherein a boot logic is operative to block, upon a reset (123) of the programmable processor (103) from the debug access port (105), commands and to the programmable processor from the debug access port, while still allowing the reset (123) command and while allowing write access to memory (112) to receive the boot loader code image (114) written to memory (112). The boot logic also blocks commands to the memory subsystem (109) from the debug access port and turns off write access to memory (112) after allowing the boot loader code image (114) to be written. The boot logic validates the boot loader code image (114) by performing a security check and jumps to the boot loader code image (114) if it is valid, thereby allowing it to run on the programmable processor (103). The boot logic may be logic circuits, software or a combination thereof.

Abstract: A device and method are provided that generate an early warning disconnect signal from an electrical connector supplying external power to a connected device. The connected device includes an early warning disconnect power management circuit, operational to generate power consumption control information in response to generation of the early warning disconnect signal from the electrical connector. In one example, the electrical connector includes a lock release mechanism and a signaling mechanism, the signaling mechanism is operationally coupled with the lock release mechanism and configured to generate the early warning disconnect signal from the electrical connector to the connected device prior to the lock release mechanism being in an unlocked state.

Abstract: One non-limiting embodiment of an apparatus for forming an alloy powder or preform includes a melting assembly, an atomizing assembly, and a field generating assembly, and a collector. The melting assembly produces at least one of a stream of a molten alloy and a series of droplets of a molten alloy, and may be substantially free from ceramic in regions contacted by the molten alloy. The atomizing assembly generates electrons and impinges the electrons on molten alloy from the melting assembly, thereby producing molten alloy particles. The field generating assembly produces at least one of an electrostatic field and an electromagnetic field between the atomizing assembly and the collector. The molten alloy particles interact with the at least one field, which influences at least one of the acceleration, speed, and direction of the molten alloy particles. Related methods also are disclosed.

Abstract: An image processing system and method receives one or more digital images in the form of image data, including selected object data of a digital image, and determines, by an electronic recognition process, if a recognition match is available between the selected object data of the digital image and image object library data associated with image descriptor library data. An automated library user interface presents selectable matched object descriptor data associated with the image descriptor library data when a recognition match occurs between the selected object data of the digital image and the image descriptor library data. In response, the automated library user interface provides user feedback data to confirm that the image descriptor library data corresponds with the selected object data of the digital image, or entered descriptor data if no match or an incorrect match occurs, to create library descriptor associated image data.

Abstract: A buffer is associated with each of a plurality of data lanes of a multi-lane serial data bus. Data words are timed through the buffers of active ones of the data lanes. Words timed through buffers of active data lanes are merged onto a parallel bus such that data words from each of the active data lanes are merged onto the parallel bus in a pre-defined repeating sequence of data lanes. This approach allows other, non-active, data lanes to remain in a power conservation state.

Abstract: A method and apparatus for performing multisampling-based antialiasing in a system that includes first and second graphics processing unit (GPUs) that reduces the amount of data transferred between the GPUs and improves the efficiency with which such data is transferred. The first GPU renders a first version of a frame using a first multisampling pattern and the second GPU renders a second version of a frame in the second GPU using a second multisampling pattern. The second GPU identifies non-edge pixels in the second version of the frame. The pixels in the first version of the frame are then combined with only those pixels in the second version of the frame that have not been identified as non-edge pixels to generate a combined frame.

Abstract: Various non-limiting embodiments of the present invention relate to methods of processing titanium alloys wherein the alloys are subjected to deformation above the beta transus temperature (T?) of the alloys. For example, one non-limiting embodiment provides a method of processing an alpha+beta or a near-beta titanium alloy comprising deforming a body of the alloy at a first temperature (T1) that is above the T? of the alloy; recrystallizing at least a portion of the alloy by deforming and/or holding the body at a second temperature (T2) that is greater than T1; and deforming the body at a third temperature (T3), wherein T1?T3>T?; wherein essentially no deformation of the body occurs at a temperature below T? during the method of processing the titanium alloy.

Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. Additionally, an interlink module is coupled to receive processed data corresponding to the frames from each of the multiple processors. The interlink module selects pixels of the frames from the processed data of one of the processors based on a predetermined pixel characteristic and outputs the frames that include the selected pixels.

Abstract: In a digital communications receiver configured to receive, via a communications channel, a received first signal representing a sequence of symbols, each symbol being encoded to be representative of data bits, a method of processing the received signal includes adjusting a magnitude, filtering, and applying cyclic prefix restoration, to the received signal to produce a second signal, converting the second signal from time domain to frequency domain to produce a frequency domain signal, and determining a first quantity of values representing a first portion of the symbols by evaluating a relationship of channel values representing characteristics of the communications channel and a second quantity of values representing a portion of the frequency domain signal, the first quantity being smaller than the second quantity.

Abstract: A block-based image compression method and encoder/decoder circuit compresses a plurality of pixels having corresponding original color values and luminance values in a block according to different modes of operation. The encoding circuit includes a luminance-level-based representative color generator to generate representative color values for each of a plurality of luminance levels derived from the corresponding luminance levels to produce at least a block color offset value and a quantization value. According to mode zero, each of the pixels in the block is associated with one of the plurality of generated representative color values to generate error map values and a mode zero color error value. According to mode one, representative color values for each of at least three luminance levels are also generated to produce at least three representative color values, corresponding bitmap values and a mode one color error value.

Abstract: A method and apparatus are disclosed wherein the horizontal and vertical variances of the pixels of an image are determined to calculate a noise measurement in a received image.

Abstract: A method and apparatus for detecting copy protection included in an input video signal is described. Two types of copy protection are particularly addressed, including techniques that imbed copy protection pulses and copy protection phase flips in the video signal. A method for preserving copy protection is also presented, where the input video signal is first examined to determine if copy protection has been included in the input video signal. The input video signal then converted to component video data, which removes any copy protection present. An output video signal is then generated from the component video data, and when it was determined that the input video signal includes copy protection, the copy protection is recreated in the output video signal.

Abstract: In an embodiment, a bias generator circuit comprises a first circuit and a second circuit. The first circuit includes a first input coupled to a voltage source and a first output that provides a first output current having a substantially non-zero temperature coefficient. The first circuit comprises a first transistor and a second transistor. The second circuit includes a second input that receives the first output current from the first circuit and a second output that provides a second output current. The second circuit comprises a third transistor and a fourth transistor. The second output current has a substantially zero temperature coefficient dependent on (i) a difference between an effective channel size of the first transistor and an effective channel size of the second transistor, and (ii) a difference between an effective channel size of the third transistor and an effective channel size of the fourth transistor.