Abstract: A method and integrated circuit renders a shunt structure non-conductive during a power up event or noise event for and in addition, during an electrostatic discharge event, keeps the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a shunt structure, such as a transistor, is interposed between a power node and a ground node. Circuitry is operative during a power up event or noise event, to render the shunt structure non-conductive for a period of time during the power up event or during the noise event (when power is applied). Second circuit is operative, during an electrostatic discharge event, to keep the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a plurality of resistor/capacitors (RC) circuits are utilized wherein the RC circuits have different time constants.

Abstract: In a Phase Plane Correlation (PPC) process, using adaptive frequency domain filtering to aid in generating candidate motion vectors. It is determined when it is beneficial to pre-filter an input image, prior to a PPC process. This results in more reliable and consistent PPC surfaces than otherwise. The filter is applied in the frequency domain where time-domain convolution becomes a much more efficient component-wise multiplication with an in-place window. An energy measure of the high-frequency content in the computed Fourier surfaces gauges the degree of high frequency content in the image. First, the Fourier transform of the two images is computed. Then, the high-frequency content is estimated from the Fourier surfaces. A window function is computed as a function of the high-frequency energy. The window is applied to the Fourier surfaces. Then, the modified Fourier surfaces are fed into the PPC process.

Abstract: A method and apparatus for reducing net power consumption in a computer system includes identifying a plurality of processing states operable to execute a task. A processing state and current drain pattern is selected that is most power efficient. A selected processing state may include one or more processing elements of the computer system such as one or more processors or accelerators and indicates the manner in which one or more portions of the received task may be distributed among the processing elements of the computer system. The current drain pattern selected may be a constant current drain pattern or a pulsed current drain pattern and may be selected to optimize power consumption when executing the task among the one or more processing elements.

Abstract: An apparatus, for use in a receiver configured to receive electronic signals, for identifying digital signals that are available for reception, includes a timing recovery device configured to receive an incoming signal, related to a transmitted signal, the incoming signal having a first symbol rate, and to re-sample the incoming signal to provide a second symbol rate, and an analyzer that is in communication with the timing recovery device and that is configured to make a determination as to whether a difference between the second symbol rate and a third symbol rate of a transmitter providing the transmitted signal is within an acceptable tolerance and to use the determination in an analysis of whether the transmitted signal is available for reception.

Abstract: In a power management scheme, at least one indicator of at least one current device operating condition that affects an amount of power required to operate a device may be received. Based on the at least one indicator, a floor value for an operating parameter of the device (e.g. clock frequency or voltage) may be determined. At least one further indicator of at least one current device operating condition may further be received. Based on the at least one further indicator, a ceiling value for the operating parameter may be determined. Based on an indicator of current activity of the device, the operating parameter may be dynamically adjusted to a value between the floor value and the ceiling value, to control power consumption by the device. In some embodiments, the value may be adjusted to only the ceiling value or the floor value, e.g. by selectively applying a scaling ratio.

Abstract: A method and apparatus of dejuddering image data includes receiving a video data signal that includes a plurality of successive source frames. A first source frame of the plurality of successive source frames is displayed a predetermined number of times. A first black frame is displayed, and successive source frames are displayed.

Abstract: Many computing device may now include two or more graphics subsystems. The multiple graphics subsystems may have different abilities, and may, for example, consume differing amount of electrical power, with one subsystem consuming more average power than the others. The higher power consuming graphics subsystem may be coupled to the device and used instead of, or in addition to, the lower power consuming graphics subsystem, resulting in higher performance or additional capabilities, but increased overall power consumption. By transitioning from the use of the higher power consuming graphics subsystem to the lower power consuming graphics subsystem, while placing the higher power consuming graphics subsystem in a lower power consumption mode, overall power consumption is reduced.

Abstract: The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.

Abstract: A memory interface circuit includes a plurality of data bus drivers and logic adapted to be operatively responsive to write driver mask information. If desired, the plurality of bus drivers and the logic may be implemented in separate integrated circuits. The plurality of bus drivers are adapted to be responsive to a write operation. The logic is also adapted to disable any one of the plurality of data bus drivers based on the write driver mask information during the write operation.

Abstract: Circuitry, apparatus and methods provide flicker detection and improved image generation for digital cameras that employ image sensors. In one example, circuitry and methods are operative to compare a first captured frame with a second captured frame that may be, for example, sequential and consecutive or non-consecutive if desired, to determine misalignment of scene content between the frames. A realigned second frame is produced by realigning the second frame with the first frame if the frames are determined to be misaligned. Luminance data from the realigned second frame and luminance data from the pixels of the first frame are used to determine if an undesired flicker condition exists. If an undesired flicker condition is detected, exposure time control information is generated for output to the imaging sensor that captured the frame, to reduce flicker. This operation may be done, for example, during a preview mode for a digital camera, or may be performed at any other suitable time.

Abstract: An electronic device having a processor powered by a power source may be operated by providing a plurality of program portions individually executable by the processor for performing the same computing function. Each program portion causes the processor to exhibit a different instantaneous power consumption profile while performing the computing function. A particular program portion is selected based on at least one characteristic of the power source and executed on the processor to perform the computing function.

Abstract: A manually actuated robotic tool changer includes a rapid coupling mechanism. The tool changer includes a master unit having a piston moveable along its axis between an unlocked position and a fully locked position, and a tool unit that is coupled to the master unit when the units are adjacent and the piston is moved to the fully locked position. A piston movement control mechanism selectively allows free axial motion of the piston between the unlocked position and a nearly locked position, when the control mechanism is actuated. The piston may be biased toward the locked position, allowing the master and tool units to be rapidly coupled by positioning the units adjacently, actuating the control mechanism to allow the piston to rapidly advance to a nearly locked position, releasing the control mechanism to restrict free axial motion of the piston, and manually advancing the piston to a fully locked position.

Abstract: The present invention relates to a parallel pipeline graphics system. The parallel pipeline graphics system includes a back-end configured to receive primitives and combinations of primitives (i.e., geometry) and process the geometry to produce values to place in a frame buffer for rendering on screen. Unlike prior single pipeline implementation, some embodiments use two or four parallel pipelines, though other configurations having 2?n pipelines may be used. When geometry data is sent to the back-end, it is divided up and provided to one of the parallel pipelines. Each pipeline is a component of a raster back-end, where the display screen is divided into tiles and a defined portion of the screen is sent through a pipeline that owns that portion of the screen's tiles. In one embodiment, each pipeline comprises a scan converter, a hierarchical-Z unit, a z buffer logic, a rasterizer, a shader, and a color buffer logic.

Abstract: A method and system are provided for aligning signals in a communication system. The method and system include alignment logic or functionality configured to compensate for signal propagation discrepancies when communicating signals between one or more other devices. The alignment logic may operate to adjust one or more communicated signals, so that signals that may have different propagation times arrive at one or more devices at a desired time. The system and method may be used when initializing a communication system and before communicating data. The system and method operate to adjust one or more signals, such as a data strobe signal in a memory system for example, so that the one or more signals arrive at one or more devices spaced apart in time within a defined tolerance at a desired time. The alignment logic is used to compensate for signal propagation delays which can be associated with a signal propagation path.

Abstract: An input signal is routed to a first logic one reference signal generator or alternatively routed to a second logic one reference signal generator based at least one a voltage level of the input signal. When the voltage level of the input signal is less than a threshold value, the first logic one reference signal generator selectively generates a first logic one reference signal. When the voltage level of the input signal is greater than or equal to the threshold value, the second logic one reference signal generator alternatively generates a second logic one reference signal. The first and second logic one reference signals may be used to control a first voltage scaling circuit that drives a scaled output signal having a logic one value corresponding to the voltage level of the first logic one reference signal.

Abstract: Motion vectors are determined from two images by obtaining one or more candidate motion vectors from the two images. Regions of the two images associated with the candidate motion vector are modified. Thereafter, further candidate motion vectors are obtained from the modified images, reducing the interfering effect of regions for which motion vectors have already been determined.

Abstract: A formed article for making alloying additions to metal melts includes particles of at least one master alloy and a binder material binding the particles of the master alloy in the formed article. The binder material changes form and frees the master alloy particles when the formed article is heated to a predetermined temperature, preferably a temperature greater than 500° F. A method for making an alloy also is provided. The method includes preparing a melt comprising a predetermined quantity of a master alloy wherein the master alloy is added to the melt or the melt starting materials in the form of particles of the master alloy bound into at least one formed article by a binder material that decomposes at a predetermined temperature, preferably a temperature greater than 500° F., and releases the particles of master alloy.

Abstract: Methods and apparatus are disclosed to translate memory write requests to be transmitted from a first processor to a second processor in a computing system, such as between a CPU and a Southbridge, as an example. A method includes generating a memory write request in a second protocol responsive to a memory write request of a first protocol, the first protocol supporting a first memory write command type and a second memory write command type, the second protocol supporting only the first memory write command type. The method also includes inserting a predefined code in the memory write request in the generated memory write request in the second protocol to produce a translated memory write request. The method may also include receiving the memory write request from the first processor where the memory write request is operable according to the first protocol having at least first and second memory write command types.

Abstract: A route mapping system includes a route module, a wireless coverage module, and a wireless coverage route module. The route module provides a plurality of routes in response to origination and destination information. The wireless coverage module provides wireless coverage information for a plurality of wireless service providers in response to the plurality of routes. The wireless coverage route module provides a plurality of wireless coverage routes in response to the plurality of routes and the wireless coverage information.

Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.