Patents Assigned to BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
  • Patent number: 12264393
    Abstract: A mixing inlet device of semiconductor processing equipment is arranged at a top of a process chamber of the semiconductor processing equipment and configured to input a process gas into the process chamber. The mixing inlet device includes a cover assembly and a mixing inlet block. A bottom of the cover assembly covers the top of the process chamber. The mixing channel is arranged in the cover assembly. The mixing inlet block is arranged at a center position at a top of the cover assembly and includes a plurality of inlet channels and a first annular chamber. A top of the first annular chamber communicates with the plurality of inlet channels, and a bottom of the first annular chamber communicates with the mixing channel of the cover assembly.
    Type: Grant
    Filed: December 14, 2023
    Date of Patent: April 1, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Jingfeng Wei, Lei Zhu, Hong Ji, Keke Zhao
  • Patent number: 12263574
    Abstract: The manipulator of embodiments of the present disclosure is configured to transfer a wafer and includes a finger structure and a plurality of support members. The plurality of support members are arranged at the finger structure and distributed at intervals on a same circumference. Each support member is configured to contact an edge of the wafer to support the wafer to prevent the wafer from contacting the finger structure. With the manipulator of embodiments of the present disclosure, the wafer is prevented from contacting the finger structure to avoid scratches and contact marks generated at the surface of the wafer.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 1, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventor: Hao Guo
  • Patent number: 12266507
    Abstract: The present disclosure provides an impedance-matching method applied to a semiconductor process apparatus, an impedance-matching device, and the semiconductor process apparatus. The impedance-matching method includes adjusting a parameter value of an adjustable element of an impedance-matching device to a preset initial value at beginning of a process, when a radio frequency (RF) power supply is powered on, adjusting the parameter value of the adjustable element according to a pre-stored optimal matching path corresponding to the process, and adjusting the parameter value of the adjustable element using an automatic matching algorithm after reaching end time of the preset matching period until impedance-matching is achieved. The optimal matching path includes parameter values of the adjustable element corresponding to different moments in a preset matching period.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: April 1, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Jing Wei, Gang Wei, Yueping Hua
  • Patent number: 12261067
    Abstract: A wafer cleaning apparatus and a wafer transfer device. The wafer transfer device includes a machine bracket, a drive mechanism, a retractable bracket, and a plurality of wafer support brackets. The drive mechanism and the retractable bracket are arranged at the machine bracket. An end of the retractable bracket is fixedly connected to the machine bracket. The second end of the retractable bracket is movably arranged at the machine bracket and arranged along the movement direction of the second end. The drive mechanism is connected to the retractable bracket and is configured to drive the second end to move to cause the retractable bracket to retract. The plurality of wafer support brackets are arranged at the retractable bracket. The distance between any two neighboring wafer support brackets changes as the retractable bracket extends and retracts.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: March 25, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Hongshuai Ma, Hongyu Zhao, Ruiting Wang
  • Patent number: 12257608
    Abstract: Embodiments of the present disclosure provide a semiconductor processing apparatus and a dielectric window cleaning method of the semiconductor processing apparatus. The semiconductor apparatus includes a reaction chamber and a dielectric window arranged in the reaction chamber, an induction coil and a cleaning electrode, both located above the dielectric window, a radio frequency (RF) source assembly configured to apply RF power to the induction coil and the cleaning electrode, an impedance adjustment assembly electrically being connected to the cleaning electrode and being in an on-off connection to the output terminal of the RF source assembly. The semiconductor processing apparatus and the dielectric window cleaning method of the semiconductor processing apparatus of embodiments of the present disclosure can achieve a physical cleaning effect and a chemical cleaning effect at simultaneously on a basis of performing cleaning on the dielectric window.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: March 25, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventor: Chunming Liu
  • Patent number: 12261022
    Abstract: The present disclosure provides a semiconductor process apparatus and a plasma ignition method. The semiconductor process apparatus includes a reaction chamber, an air inlet assembly configured to introduce the reaction gas into the reaction chamber, an upper electrode assembly configured to excite the reaction gas into the plasma, a monitor configured to monitor the electromagnetic radiation intensity of the plasma in the reaction chamber when the plasma is ignited, a controller configured to determine whether the electromagnetic radiation intensity monitored by the monitor reaches the preset intensity, if yes, determine that the plasma ignition is successful, and after the plasma ignition is successful, control the upper electrode assembly to perform the impedance matching of the first preset duration. In the present disclosure, the consistency of the process results may be improved to improve the uniformity of the products.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: March 25, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Jing Yang, Chenyu Zhong, Gang Wei
  • Patent number: 12252776
    Abstract: The present disclosure provides a carrying device and a semiconductor processing apparatus. The carrying device includes a heating plate and a cooling plate, the heating plate and the cooling plate are spaced apart, and a thermal insulation region is formed between the heating plate and the cooling plate. The carrying device of the present disclosure not only can preempt the need to stop the process due to excessively high temperature, but also can maintain a uniform and stable temperature throughout the process, thereby providing a qualified and stable processing temperature for a workpiece to be processed, and eventually obtaining better processing results.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: March 18, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Qing Chang, Bing Li, Mengxin Zhao
  • Patent number: 12249496
    Abstract: Embodiments of the present disclosure provide a semiconductor processing apparatus and a magnetron mechanism thereof. The magnetron mechanism is applied to the semiconductor processing apparatus and includes a backplane, an outer magnetic pole, and an inner magnetic pole. The outer magnetic pole is arranged on a bottom surface of the backplane and encloses to form accommodation space. The inner magnetic pole is arranged on the bottom surface of the backplane and located in the accommodation space. The inner magnetic pole can move to change corrosion areas of the target material. The distance between the inner magnetic pole and the outer magnetic pole is always greater than a predetermined distance during the movement. With the semiconductor processing apparatus and the magnetron mechanism thereof of embodiments of the present disclosure can achieve the full target corrosion in a sputtering environment in a high-pressure state.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: March 11, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Yujie Yang, Xiaoyan Wang
  • Patent number: 12205836
    Abstract: Embodiments of the present disclosure provide a temperature change rate control device, applied to a process chamber of a semiconductor process apparatus, including a temperature monitor unit, a controller, a gas inflation mechanism, and a gas extraction mechanism. The temperature monitor unit is configured to obtain a temperature of a wafer in the process chamber in real time. The controller is configured to calculate a temperature change rate of the wafer according to the temperature obtained by the temperature monitor unit. The gas inflation mechanism communicates with the process chamber. The gas extraction mechanism communicates with the process chamber. When the temperature change rate is outside a predetermined temperature change rate range, a first control signal is sent to the gas inflation mechanism, and/or a second control signal is sent to the gas extraction mechanism to control the temperature change rate within the temperature change rate range.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: January 21, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventor: Hongwei Geng
  • Patent number: 12198972
    Abstract: A process chamber in a semiconductor process device includes a cavity and a base disposed in the cavity. The base includes a base body and a support column fixedly disposed at the bottom of the base body. An interior of the support column includes a receiving hole that penetrates the support column in an axial direction of the support column. A fixed through-hole is formed at the bottom of the cavity. A bottom end of the support column is fixedly arranged in the fixed through-hole. The receiving hole is connected to the outside of the process chamber through the fixed through-hole. The fixed through-hole includes a positioning groove formed on the bottom wall of the cavity and a connection hole penetrating from the bottom of the positioning groove to an outer surface of the cavity.
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: January 14, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventor: Yancheng Lu
  • Patent number: 12198914
    Abstract: A magnetic structure in a semiconductor apparatus is arranged outside of a reaction chamber of the semiconductor apparatus and includes an annular support member, a plurality of angle adjustment assemblies, and a plurality of magnetic members. The annular support member is arranged around the reaction chamber of the semiconductor apparatus. The plurality of angle adjustment assemblies are connected to the annular support member and distributed along a circumferential direction of the annular support member. The plurality of magnetic members are connected to the plurality of angle adjustment assemblies in a one-to-one correspondence. An angle adjustment assembly of the angle adjustment assemblies is configured to fix a corresponding magnetic member of the plurality of magnetic members at the annular support member and adjust a magnetic field line direction of the magnetic member and a magnitude of an included angle.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: January 14, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventor: Zhenduo Yu
  • Patent number: 12197195
    Abstract: Embodiments of the present disclosure provide a material scheduling method and a material scheduling device for semiconductor processing equipment. The method includes establishing a material list, establishing a first scheduling task list according to process recipes and the material list, and inputting the first scheduling task list into a solver to calculate and output a scheduling result with shortest time for performing all material scheduling tasks in the first scheduling task list and parsing the scheduling result to obtain a movement sequence of all materials. In the technical solutions of the material scheduling method and the material scheduling device for the semiconductor processing equipment of embodiments of the present disclosure, the overall scheduling result can be improved, and the calculation speed can be improved. Thus, the scheduling result can be obtained in real-time.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: January 14, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Lin Cui, Sixue Shi, Muya Liu
  • Patent number: 12198913
    Abstract: A process chamber includes a chamber body, a base, and a magnetic conductive device. The base is arranged in the chamber body. The base includes a carrier surface configured to carry a wafer. The magnetic conductive device includes a magnet structure and a magnetic conductive structure made of a soft magnetic material. The magnet structure is arranged around the base and configured to provide a magnetic field above the base. The magnetic conductive structure is arranged under the carrier surface of the base, has a preset distance from the carrier surface of the base, and is configured to guide the distribution of the magnetic field lines of the magnetic field above the base to cause the intensity of the magnetic field to be evenly distributed above the base and the directions of the magnetic field lines to be consistent at different positions of the corresponding carrier surface.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: January 14, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Shiru Wang, Yujie Yang
  • Patent number: 12195842
    Abstract: A sputtering device includes a reaction chamber, a pin mechanism, and a microwave heating mechanism. The reaction chamber includes a base configured to carry a workpiece. The pin mechanism is arranged in the reaction chamber. The pin mechanism generates a relative ascending and descending motion with the base and lifts the workpiece from the base. The microwave heating mechanism is arranged in the reaction chamber and includes a microwave transmitter and a mobile device. The mobile device is connected to the microwave transmitter and configured to move the microwave transmitter to a position under the workpiece in response to the workpiece being carried by the pin mechanism to cause the microwave transmitter to emit microwaves to the workpiece to heat the workpiece.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: January 14, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventor: Molin Li
  • Patent number: 12191170
    Abstract: The present disclosure provides a heater and a heating base. The heater is used in a semiconductor process apparatus and includes a heating body and a base configured to support the heating body. The base includes a base body and a plate connected to each other. The base body is opposite to the heating body and arranged at an interval. The plate is arranged between the base body and the heating body and is fixedly connected to the heating body. An elastic bending structure is arranged on at least one of the plate, the base body, or the connection place between the plate and the base body. The elastic bending structure is configured to cause the plate and the heating body to remain connected by generating elastic deformation when the plate and the base body expand and deform.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: January 7, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventor: Dongdong Li
  • Patent number: 12191114
    Abstract: The present disclosure provides a semiconductor reaction chamber and an atomic layer plasma etching apparatus. The semiconductor reaction chamber includes a dielectric window and a reaction chamber body. The spray head is arranged between the dielectric window and the top wall of the reaction chamber body, and divides the plasma generation area into an upper strong plasma area and a lower weak plasma area. Moreover, a plurality of through-holes are distributed in the central area of the spray head and configured to allow the plasma in the strong plasma area to pass through. A first gas channel is arranged in an edge area of the spray head. The process reaction gas inlet member is located on a side where the gas inlet end of the first gas channel of the spray head is located. A second gas channel is arranged in the process reaction gas inlet member.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: January 7, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Xingfei Mao, Masaya Odagiri, Gang Wei, Guodong Chen
  • Patent number: 12106934
    Abstract: The present disclosure provides a liner, a reaction chamber, and a semiconductor processing device. The liner is disposed in the reaction chamber and includes a liner body being arranged around an inner side wall of the reaction chamber and is grounded; a first separator being arranged to surround a periphery of a base disposed in the reaction chamber, a lower end of the first separator being grounded through the base; a dielectric ring being arranged between an inner peripheral wall of the first separator and an outer peripheral wall of the base; and a second separator being arranged to be around a lower end of the liner body and an outer peripheral wall of the first separator. The liner provided in the present disclosure can prevent the system from generating resonance, thereby enhancing the process stability.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: October 1, 2024
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Jinrong Zhao, Kai Chang
  • Patent number: 12106970
    Abstract: The present disclosure discloses a pattern sheet, a semiconductor intermediate product, and a hole etching method. The pattern sheet includes a substrate, a dielectric layer, and a mask structure. The mask structure includes a multi-layer mask layer. An uppermost mask layer is a photoresist layer. A thickness of each layer of the mask layer and etching selectivity ratios between the layers below the mask layer satisfy that in each two neighboring layers of the mask layer, a lower layer of the mask layer is etched to form a through-hole penetrating a thickness of the lower layer of the mask layer, a remaining thickness of the upper layer of the mask layer is greater than or equal to zero.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: October 1, 2024
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Qiushi Xie, Xiaoping Shi, Qingjun Zhou, Dongsan Li, Chun Wang, Yiming Zhang
  • Patent number: 12100601
    Abstract: Embodiments of the present disclosure provide an etching method with a metal hard mask. The method is performed on a wafer surface and includes sequentially forming a metal hard mask layer and at least one functional film layer on a wafer surface in a direction away from the wafer surface. The method includes performing a plurality of etching processes on the at least one functional layer and the metal hard mask layer sequentially in a direction close to the wafer surface. An etching gas adopted by at least one etching process includes a hydrogen element and a fluorine element. A ratio of a content of the hydrogen element in the etching gas to a content of the fluorine element in the etching gas is smaller than a predetermined threshold to reduce generation of a byproduct of hydrogen fluorine.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: September 24, 2024
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Yu Zhang, Aki Akiba, Zhaocheng Liu
  • Patent number: 12080524
    Abstract: A semiconductor processing chamber includes a chamber having an opening at a top of the chamber, a housing disposed above the opening, a dielectric window disposed inside the housing and above the opening, a coil arranged circumferentially at an inner top wall of the housing; a hot air hood disposed inside the housing and fixedly attached to the dielectric window, where the hot air hood and the inner top wall of the housing are separated by a clearance gap, and the hot air hood includes a heating compartment for heating the dielectric window and at least two air passage ports connected to the heating compartment; and an air distribution structure being fixedly attached to the housing and including a plurality of air passages, at least two air exchange ports located outside the housing for air intake and air discharge.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: September 3, 2024
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Yan Li, Shixuan Guo, Xingfei Mao