Abstract: A cross link multiplexer bus comprising a plurality of cross link multiplexers and a plurality of interconnects. The plurality of cross link multiplexers has a destination port configured to receive a signal and an origin port configured to produce said signal. The plurality of interconnects has a set of interconnects coupled between a pair of adjacent cross link multiplexers. The signal is capable of being represented as a series of characters. A character is capable of being represented as a first data bit, a second data bit, and a control bit. A first interconnect is configured to convey the first data bit. A second interconnect is configured to convey the second data bit. A third interconnect is configured to convey the control bit. The third interconnect is positioned substantially between the first interconnect and the second interconnect.

Abstract: The present invention provides a method of controlling data flow within a network device. The method includes the steps of snooping a data packet before the data packet is stored in a memory buffer of the network device to determine a packet size, aggregating the packet size to generate a total number of data packets within a burst if the packet size exceeds a predetermined packet size. The method also includes the steps of lowering a threshold of the memory buffer to a reset threshold if the total number of data packets exceeds a predetermined number of consecutive data packets and activating a pause frame based upon the reset threshold to temporarily suspend transmission of incoming data packets to the network device.

Abstract: A method and computer program product for recognizing and optimizing the transmission of TCP/IP style traffic across a DOCSIS network. According to the method of the present invention, a full TCP protocol packet is initially transmitted across a DOCSIS network to be learned by the CMTS. Redundant fields in the TCP protocol packet are entirely suppressed when subsequent TCP protocol packets are transmitted across the DOCSIS network. Non-redundant fields in the TCP protocol packet are delta-encoded using a delta-encoded value when subsequent TCP protocol packets are transmitted. The delta-encoded values represent the change in value of the current TCP packet from the previous TCP packet for a non-redundant field. This enables the CMTS to provide an exact reconstruction of all subsequently transmitted compressed TCP protocol packets.

Abstract: Increased cable length Power over Ethernet (PoE) systems are provided. Embodiments can be designed for compliance with IEEE 802.3af, IEEE 802.3at, or legacy PoE standards. Embodiments include PSE and PD designs enabled for increased length PoE. Embodiments include example modifications of IEEE 802.3af PSE system rules, including example modifications of PSE port voltage ranges to support IEEE 802.3af compliant PDs across increased cable lengths. Embodiments include example modifications of IEEE 802.3af PD system rules, including example modifications of PD port voltage ranges to enable current IEEE compliant PSEs to support increased cable length PoE. Embodiments include PDs having increased voltage process and/or added voltage protection circuitry to support increased length PoE. Modifications of PSE system rules and PD system rules can be performed independently of each others, so that modified PSEs can be made to work with existing PDs, or vice versa.

Abstract: A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.

Abstract: Optimal period rate matching for turbo coding. A means is provided herein by which a nearly optimal (e.g., optimal for one block size and sub-optimal for others) periodic puncturing pattern that depends on a mother code. Any desired rate matching can be achieved using the means and approaches presented herein to ensure an appropriate rate of an encoded block output from a turbo encoder so that the subsequently modulated signal generated there from has the appropriate rate. In addition, some embodiments can also employ shifting for another design level available in accordance with puncturing employed to provide for periodic rate matching. Selectivity can also be employed, such that, a first periodic puncturing pattern can be applied at a first time to ensure a first rate, and a second periodic puncturing pattern can be applied at a second time to ensure a second rate.

Abstract: A programmable antenna assembly includes a configurable antenna structure, a configurable antenna interface, and a control module. The configurable antenna structure includes a plurality of antenna elements that, in response to an antenna configuration signal, are configured elements into at least one antenna. The configurable antenna interface module is coupled to the at least one antenna and, based on an antenna interface control signal, provides at least one of an impedance matching circuit and a bandpass filter. The control module is coupled to generate the antenna configuration signal and the antenna interface control signal in accordance with a first frequency band and a second frequency band such that the at least one antenna facilitates at least one of transmitting and receiving a first RF signal within the first frequency band and facilitates at least one of transmitting and receiving a second RF signal within the second frequency band.

Abstract: A circuit includes a global positioning system (GPS) receiver that receives a GPS signal and that generates GPS position data based on the GPS signal. A wireless receiver converts an inbound RF signal into an inbound symbol stream. A processing module converts the inbound symbol stream into inbound data that includes a motion parameter and generates position information based on at least one of the GPS position data and the motion parameter.

Abstract: In one embodiment, the present invention is a low-power, and high performance receiver including an IF demodulator for high data rate, frequency modulated systems, such as Bluetooth. The IF demodulator is implemented in analog domain for simplicity and lower power consumption and operates at an IF frequency. An IF demodulator comprises: a first IF differentiator for differentiating an I signal; a second IF differentiator for differentiating a Q signal; a cross-coupled multiplier for multiplying the differentiated I signal with the Q signal and multiplying the differentiated Q signal with the I signal to extract frequency information from the I signal and the Q signal; and a slicer for converting the frequency information to digital data.

Abstract: A method for processing wireless data packets allows for processing packets allows consolidation of security processing. Security processing is performed in accordance with multiple security policies. This processing is done in a single front end processing block. Different security processes can be performed in parallel. Processing overhead is reduced by eliminating the need to redundantly check packet characteristics to assess the different security requirements imposed by security policies. Further, the present invention also substantially reduces the CPU cycles required to transport data back and forth from memory to a cryptographic coprocessor.

Abstract: There is disclosed a system for designing circuits which involves pre-placing delay elements between circuit components susceptible to shoot-through due to effects of clock skew, each delay element having a physical form and at least one input terminal and at least one output terminal; determining which delay elements are not critical in preventing shoot-through; removing non-critical delay elements from the circuit; and replacing each removed delay element with a cell having a physical form equivalent to the physical form of the removed delay element and a wire connection between an input and an output of the cell equivalent to an input and output of the delay element. This wire cell has the effect of removing the delay element from the circuit without having to reposition the circuit components. This has the result that it is not necessary to re-position circuit components on the removal of delay elements and then to re-evaluate the circuit performance. Circuit design can be significantly improved.

Abstract: Various embodiments are disclosed relating to a self-scan programmable keypad interface. In an example embodiment, an apparatus is provided that includes a processor, and a keypad interface circuit. The keypad interface circuit may include a detection circuit to detect when one or more keys of a keypad have been pressed, a scan circuit adapted to generate signals for keypad scan to identify one or more keys that have been pressed, a debounce circuit to debounce signals, and a key status register adapted to store a status of one or more keys of the keypad obtained during keypad scan. The processor is adapted to read contents of the key status register to identify one or more pressed keys upon receiving a signal from the keypad interface circuit.

Abstract: Presented herein are system(s), method(s), and apparatus for decoding exponential Golomb codes. In one embodiment, there is presented a system for decoding codes having lengths (L) and information bits. The system comprises a circuit and a multiplexer. The circuit provides the information bits of the codes. The multiplexer provides values for the codes, the values for the codes being a function of 2trunc(L/2).

Abstract: System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave. A novel approach is presented that combines different coding types within a communication system to perform various types of error correction. This combination of accommodating different coding types may be employed at either end of a communication channel (e.g., at a transmitter end when performing encoding and/or at a receiver end when performing decoding). By combining different coding types within a communication system, the error correcting capabilities of the overall system is significantly improved. The appropriate combination of turbo code and/or LDPC code along with RS code allows for error correction or various error types including random error and burst error (or impulse noise).

Abstract: A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.

Abstract: A switching regulator automatically operates in pulse width modulation (“PWM”) mode for high load currents and in burst mode for low load currents. The switching regulator includes a pair of switches to provide a regulated current to a load. The switching regulator further includes a multi-input comparator. A first input of the comparator is coupled to an output of the pair of switches. A second input of the comparator is coupled to a filtered version of the output and a third input is coupled to a reference waveform. The first, second and third inputs of the comparator form a combined input signal to the comparator. An output signal of the comparator is generated by comparing the combined input signal to a threshold of the comparator. The output signal determines a switching frequency of the pair of switches such that the switching frequency is automatically reduced when the load is decreased.

Abstract: Efficient design to implement min**/min**? or max**/max**? functions in LDPC (Low Density Parity Check) decoders. When compared to prior art approaches, the novel and efficient implementation presented herein allows for the use of substantially less hardware and surface area within an actual communication device implemented to perform these calculations. In certain embodiments, the min** processing (and/or max** processing) is implemented to assist in the computationally intensive calculations required to decoded LDPC coded signals. In one instance, this is operable to assist in check node processing when decoding LDPC coded signals. However, the efficient principles and architectures presented herein may be implemented within other communication device types to decode other types of coded signals as well.

Abstract: System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave. A novel approach is presented that combines different coding types within a communication system to perform various types of error correction. This combination of accommodating different coding types may be employed at either end of a communication channel (e.g., at a transmitter end when performing encoding and/or at a receiver end when performing decoding). By combining different coding types within a communication system, the error correcting capabilities of the overall system is significantly improved. The appropriate combination of turbo code and/or LDPC code along with RS code allows for error correction or various error types including random error and burst error (or impulse noise).

Abstract: A circuit includes an on-chip gyrating circuit that generates a motion parameter based on motion of the circuit. A global positioning system (GPS) receiver receives a GPS signal and that generates GPS position data based on the GPS signal. A processing module processes the motion parameter to produce motion data, generates position information based on at least one of the GPS position data and the motion data, converts outbound data into an outbound symbol stream, and converts an inbound symbol stream into inbound data. A wireless local area network (WLAN) transceiver section generates an outbound RF signal from the outbound symbol stream, and converts an inbound RF signal into the inbound symbol stream.

Abstract: A circuit includes a global positioning system (GPS) receiver that receives a GPS signal and that generates GPS position data based on the GPS signal. A wireless telephone transceiver section coupled to generate an outbound RF signal from an outbound symbol stream, and to convert an inbound RF signal into an inbound symbol stream. A processing module is coupled to convert outbound data into the outbound symbol stream, convert the inbound symbol stream into inbound data, to weight the GPS position data with a first weighting factor when the wireless telephone transceiver section is generating the outbound RF signal to produce first weighted GPS position data and weight the GPS position data with a second weighting factor with a second weighting factor when the wireless telephone transceiver section is not generating the outbound RE signal to produce second weighted GPS position data, and to generate position information based on at least one of the first and second weighted GPS position data.