Abstract: A method for calibrating a filter begins with the filter filtering a first signal having a first frequency to produce a first filtered signal, wherein the first frequency is in a known pass region of the filter. The processing continues by measuring signal strength of the first filtered signal to produce a first measured signal strength. The processing continues with the filter filtering a second signal having a second frequency to produce a second filtered signal, wherein the second frequency is at a desired corner frequency of the filter. The processing continues by measuring signal strength of the second filtered signal to produce a second measured signal strength. The processing continues by comparing the first measured signal strength with the second measured signal strength to determine whether the filter has attenuated the second signal by a desired attenuation value with respect to the first signal.

Abstract: A multiple processor device stores a stream of data as a plurality of data segments, which includes multiplexed data fragments from at least one of a plurality of virtual channels. The data segments that comprise the stream of data correspond to the multiplexed data fragments from the virtual channels. The multiple processor device then decodes at least one data segment in accordance with one of a plurality of transmission protocols to produce a decoded data segment. The multiple processor device then stores the decoded data segment to align it in accordance with a data path segment size. The multiple processor device then interprets the stored decoded data segment with respect to a corresponding one of the plurality of virtual channels to determine a destination of the stored decoded data segment. The multiple processor device then stores the decoded data segment as part of reassembled data.

Abstract: A network switch having at least one port data port interface, a first memory, a second memory, and a memory management unit in connection with the at least one data port interface, the first memory, and the second memory. The memory management unit operates to receive data from the at least one data port interface, determine if the data is to be stored in one of the first memory or the second memory, store the data in one of the first memory or the second memory as a linked list, retrieve the data from one of the first memory or the second memory, and forwards the data for egress.

Abstract: A first primary packet to create a second primary packet for a particular PID. Different CRC checksum may be generated for the first and the second primary packet. The first primary packet may be replicated in order to create a first secondary packet and the second primary packet may be replicated to create a second secondary packet. The CRC checksum for the primary packets may be stored within their corresponding secondary packets. In response to receipt of a new stream with replicated packets, the first or said second primary packet may be selected and the first or second secondary packet may be selected for a particular PID based on the generated CRC checksum. The selections may co-relate the selected first and/or second primary packet with a legacy system or the selected first and/or second secondary packet with a new system.

Abstract: A method for payload-based channel estimation of a wireless channel begins by receiving a frame via the wireless communication channel. The frame includes a training sequence, a frame information section, and a plurality of time sequential data payload sections. As the frame is being received, the method continues by determining a channel estimation based on the training sequence. The method continues as the frame is being received by determining a channel estimation of a data payload section of the plurality of time sequential data payload sections to produce a payload channel estimation. The method continues as the frame is being received by updating the channel estimation based on the payload channel estimation to produce an updated channel estimation.

Abstract: Aspects of the invention may comprise receiving an incoming TCP packet at a TEEC and processing at least a portion of the incoming packet once by the TEEC without having to do any reassembly and/or retransmission by the TEEC. At least a portion of the incoming TCP packet may be buffered in at least one internal elastic buffer of the TEEC. The internal elastic buffer may comprise a receive internal elastic buffer and/or a transmit internal elastic buffer. Accordingly, at least a portion of the incoming TCP packet may be buffered in the receive internal elastic buffer. At least a portion of the processed incoming packet may be placed in a portion of a host memory for processing by a host processor or CPU. Furthermore, at least a portion of the processed incoming TCP packet may be DMA transferred to a portion of the host memory.

Abstract: A DC compensation circuit restores the frequency spectrum of an input signal at DC (or 0 Hz) by removing or reducing DC offset, 1/f noise, or any other unwanted noise at or near 0 Hz. The DC compensation is performed using direct coupling, as opposed to AC coupling, so that no useful signal information in the active period of the input signal is lost at DC. The DC compensation circuit samples the input signal during an inactive period of the input signal. Afterwhich, the unwanted DC noise is determined from the sampled signal and stored until an active period of the input signal. For example, the sampled signal can be filtered using a passband around DC so as to isolate the signal energy at DC during the inactive period. Since there is no useful signal information present during the inactive period, any signal energy at the output of the filter is necessarily unwanted DC noise.

Abstract: A radio frequency identification (RFID) decoding subsystem includes a pre-decode module and a decode module. The pre-decode module is coupled to process down-converted RFID signals into at least one of pre-decoded baseband data and corresponding decoding information. The decode module is coupled to process the pre-decoded baseband data into decoded RFID data, where the processing of the pre-decoded baseband data is based on the corresponding decoding information when the corresponding decoding information is produced by the pre-decoder module.

Abstract: A method and related computer program product for combining resources of multiple RAID controllers and managing them as a single entity, comprising searching the RAID controllers for the most appropriate version of the firmware to be executed, determining whether a more appropriate version of the firmware was previously loaded into system memory, unloading inappropriate versions of the firmware, loading the most appropriate version of the firmware and initializing all RAID controllers as a commonly managed entity having combined resources.

Abstract: An apparatus for transmitting data in an xDSL system is disclosed. In an exemplary embodiment, the apparatus comprises a transmitter that sends data over an xDSL system in the form of a data transmission unit (DTU), the transmitter having physical media specific—transmission convergence (PMS-TC) communication sublayer. The apparatus may further include a retransmission unit that is implemented in the PMS-TC sublayer. The retransmission unit may include a retransmission buffer that stores and indexes transmitted DTUs in retransmit containers. The retransmit container may be defined as a time slot corresponding to a sent DTU, wherein the retransmission unit is configured to respond to a retransmission request indicating which stored DTU should be retransmitted. The stored DTU to be retransmitted may be identified by its corresponding retransmit container.

Abstract: A method and system for communicating data in an xDSL data retransmission mode is disclosed. A data transmission unit (DTU) is defined. The DTU is sent in an xDSL data stream. A retransmit container is further defined a as a time slot that corresponds to a sent DTU. A copy of the sent DTUs and an index of corresponding retransmit containers is maintained. The DTUs are transmitted the in the xDSL data stream. A determination is made on whether a transmitted DTU was corrupted during transmission. Each corrupted DTU is identified by its corresponding retransmit container. An uncorrupted copy of the DTU is then retransmitted as identified by the corresponding retransmit container.

Abstract: LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.

Abstract: Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matrix to provide a thermometer code. Each stage of the converter includes a decoder and latch arranged so the decoder inputs settle before the latch is set by the clock pulses. The stages are implemented in complementary CMOS. Complementary transistors are biased so one transistor of the pair is driven to the rail while the other transistor of the pair floats. A dummy CMOS transistor is used to balance the number of transistors in the decoder paths.

Abstract: A node includes a processor coupled to an interconnect and a memory bridge coupled to the interconnect. The processor is configured to maintain a first indication of whether or not a modification of data at a first address has been detected by the processor after a most recent load-linked (LL) instruction was executed by the processor to the first address. The memory bridge is responsible for internode coherency within the node, and is configured to initiate a first transaction on the interconnect in response to receiving a probe command from another node. The processor is configured, during a time period in which the processor has a second transaction outstanding to the first address, to change the first indication to the first state responsive to the first transaction.

Abstract: A system, method, and apparatus for reducing the video decoder processing requirements for rewinding a HITS stream are presented herein. During rewind of a HITS stream, the video decoder builds a clean reference picture. The clean reference picture is built by decoding each of the P-pictures in the EP-EP segment. However, because the P-pictures are not displayed, the decoder does not decode the portion of the P-picture below the last intracoded slice. The decoder can build the clean reference picture without decoding the portions of the P-pictures below the last intracoded slice because the subsequent pictures do not use the said portions for prediction.

Abstract: An apparatus method to provide a frequency synthesizer using a phase locked loop in a communication device to provide a particular frequency allocation to generate an output from the PLL. The synthesizer includes a phase locked loop (PLL) circuit that has a feedback loop. The feedback loop has a feedback divider circuit that provides an N integer division of an output signal from the PLL in the feedback loop to close loop with the reference signal at a front end of the PLL. A value for feedback factor N to be used in the N integer division is based on a particular channel frequency selected and in which the feedback factor N is selected to provide a highest reference frequency available from the plurality of reference frequencies to generate the reference signal.

Abstract: Methods and systems for enabling communication of information in a secure communication system are disclosed herein and may comprise generating a notification when at least two Wi-Fi client stations and/or at least two Wi-Fi configurators (APs) attempt to register within a single configurator timing window. It may be detected whether the at least two Wi-Fi client stations and/or the at least two Wi-Fi configurators attempt to register within the single configurator timing window time duration. The notification may be generated in response to the detecting when the attempt occurs. Configuration information may be communicated to at least a first of the at least two Wi-Fi client stations and/or the at least two Wi-Fi configurators, prior to the generation of the notification. At least a portion of the configuration information may be changed over time.

Abstract: Determining whether a first wireless terminal may transmit on an uplink to a servicing base station in a cellular wireless communication system includes first receiving a plurality of a Radio Frequency (RF) bursts at a wireless terminal from a servicing base station. These RF bursts carry a data block containing both Uplink Status Flag (USF) bits and Data bits. Data bits may or may not be intended for the receiving wireless terminal. The RF bursts are processed to produce the data block in an encoded format. This data block is then partially decoded to extract the USF bits when the data bits are not intended for the receiving wireless terminal. These USF bits determine when the receiving wireless terminal can transmit or uplink to the servicing base station. The partial decoding may be halted once the USF bits have been extracted from the received data block to reduce power consumption and processing requirements.

Abstract: A method for data verification is provided. An input block of data is received together with a modulo-based input error detection code associated with the input block, the input block comprising a plurality of sub-blocks. A subset of the sub-blocks is selected to be included in an output block. An error correction term is determined based on the selected subset. The selected subset of the sub-blocks is concatenated together with the input error detection code and the error correction term to generate an output block for conveyance to a destination processor.

Abstract: A radio transceiver includes circuitry that enables received RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a temperature sensing module that produce accurate voltage level readings may be mapped into corresponding temperature values. A processor, among other actions, adjusts gain level settings based upon detected temperature values. One aspect of the present invention further includes repetitively inverting voltage signals across a pair of semiconductor devices beings used as temperature sensors to remove a common mode signal to produce an actual temperature-voltage curve. In one embodiment of the invention, the circuitry further includes a pair of amplifiers to facilitate setting a slope of the voltage-temperature curve.