Abstract: A method of handling data packets in a series of network switches includes receiving an incoming data packet at a data port of a first switch of the series of network switches. A module id bitmap of the incoming data packet is resolved and a bit corresponding to the first switch of the module id bitmap is examined to determine if the bit is set. A destination address of the incoming data packet is resolved when the corresponding bit is set and the incoming data packet is forwarded or dropped based on the destination address. When the corresponding bit is not set, the incoming data packet is forwarded to a next switch of the series of network switches. A network switch configured to allow for cascading of data packets is also disclosed.

Abstract: Characterizing channel response in a single upstream burst using redundant information from training tones (TTs). The invention is operable to utilize inserted TTs, contained within a transmitted data frame, to provide for an improved estimate of a communication channel's actual response and an improved estimate of the noise of the communication channel. The invention determines a maximum allowable delay spread of the many communication paths within a multi-path communication channel. Using the redundant TTs information, then a portion of the finite impulse response of the communication channel, within the time domain, may be zeroed, thereby providing a much improved channel estimate and noise estimate. Using the redundant TTs, less noise is introduced onto the data tones (DTs) within a data frame. The present invention is also able to identify those portions of the TTs that are attributable to the actual channel and those that are attributable to the channel's noise.

Abstract: A number of features for enhancing the performance of a cable transmission system in which data is transmitted between a cable modem termination system at a headend and a plurality of cable modems located different distances from the headend. The power transmission level, slot timing, and equalization of the cable modems are set by a ranging process. Data is transmitted by the modems in fragmented form. Various measures are taken to make transmission from the cable modems robust. The upstream data transmission is controlled to permit multiple access from the cable modems.

Abstract: A power amplifier power amplifier includes a transconductance stage and a cascode stage. The transconductance stage that is operable to receive an input voltage signal and to produce an output current signal. The transconductance stage includes a first Metal Oxide Silicon (MOS) transistor having a first gate oxide thickness and a first channel length. The cascode stage communicatively couples to the transconductance stage and is operable to receive the output current signal and to produce an output voltage signal based thereupon. The cascode stage includes a second MOS transistor having a second gate oxide thickness and a second channel length.

Abstract: Variable modulation within combined LDPC (Low Density Parity Check) coding and modulation coding systems. A novel approach is presented for variable modulation encoding of LDPC coded symbols. In addition, LDPC encoding, that generates an LDPC variable code rate signal, may also be performed as well. The encoding can generate an LDPC variable code rate and/or modulation signal whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. Some embodiments employ a common constellation shape for all of the symbols of the signal sequence, yet individual symbols may be mapped according different mappings of the commonly shaped constellation; such an embodiment may be viewed as generating a LDPC variable mapped signal. In general, any one or more of the code rate, constellation shape, or mapping of the individual symbols of a signal sequence may vary as frequently as on a symbol by symbol basis.

Abstract: A reduced state maximum likelihood sequence estimator allows the use of improved equalization techniques that provides greatly improved performance for channels with severe attenuation and spectral nulls. The reduced state maximum likelihood sequence estimator retains kn states of a total number of K states, kn<K, with each retained state having an associated state metric. (J)(kn) new states are determined based on kn previous states and a most recently received sample, using J transitions, J being a less than L, where L is a size of a symbol alphabet. (J)(kn) new state metrics are determined which are respectively associated with each new state. The new state metrics are compared to a threshold and those states whose metric does not exceed the threshold are retained. The reduced complexity of the MLSE allows for the use of partial response equalizers, e.g., a partial response class V (PRV) equalizer.

Abstract: There is provided a circuit and method for providing a supply voltage to an operational amplifier. A switch has a plurality of inputs connected to a respective plurality of supply voltages. An output of the switch is connected to a supply voltage terminal of an operational amplifier.

Abstract: A clock and data recovery system for detecting and resolving meta-stability conditions is provided. The clock and data recovery system includes a phase detector having logic configured to detect a meta-stability condition and to generate an output signal to mitigate the condition. The system can also include a time varying gain adjustment portion. This portion includes a gain control logic configured to determine and adjust system gain during reception of an incoming data stream. The system further includes a phase interpolator having increased linearity. The phase interpolator has a plurality of first branches having a differential transistor pair, a switch, and a current source, coupled between a first output and a first supply voltage and a plurality of second branches having a differential transistor pair, a switch, and a current source, coupled between a second output and the first supply voltage. The phase interpolator can also include an integrator portion.

Abstract: A memory management unit (MMU) for a network switch fabric for forwarding data is disclosed. The MMU has an ingress port interface receiving portions of a data packet and an egress port interface, connected to ingress ports of the fabric through an ingress bus ring. The MMU also includes a cell packer, that groups packet data into cells and a packet pool memory, that stores cells received from the cell packer. The MMU also includes a cell unpacker, where the cell unpacker separates stored cells before releasing the cells to an egress port. The MMU also includes an egress scheduler communicating with the cell unpacker, where the egress scheduler determines which packet data should be retrieved from the packet pool memory according to priority rules. The priority rules can be a deficit round robin scheduling algorithm or a weighted round robin scheduling algorithm.

Abstract: A first MOS-on-NWELL device is formed on a substrate and has its pickup terminals optionally connected together. A second MOS-on-NWELL device is formed on the substrate and has its pickup terminals optionally connected together. A gate of the first MOS-on-NWELL device is connected to the pickup terminals of the second MOS-on-NWELL device. A gate of the second MOS-on-NWELL device is connected to the pickup terminals of the first MOS-on-NWELL device. A first PMOS transistor is formed on a substrate and has its source and drain terminals connected together. A second PMOS transistor is formed on a substrate and has its source and drain terminals connected together. A gate of the first PMOS transistor is connected to the source and drain terminals of the second PMOS transistor. A gate of the second PMOS transistor is connected to the source and drain terminals of the first PMOS transistor.

Abstract: The present invention relates to a mobile set integrating a memory efficient data storage system for the real time recording of voice conversations, data transmission and the like. The data recorder has the capacity to selectively choose the most relevant time frames of a conversation for recording, while discarding time frames that only occupy additional space in memory without holding any conversational data. The invention executes a series of logic steps on each signal including a voice activity detector step, frame comparison step, and sequential recording step. A mobile set having a modified architecture for performing the methods of the present invention is also disclosed.

Abstract: Modified branch metrics for processing bit-soft decisions to account for phase noise impact on cluster variance (CV). The present invention is able to partition a modulation scheme's constellation into two or more regions, so that the bit-soft decision branch metrics may be adjusted based on the CV of the various constellation points. A confidence level may be attached to the various constellation points based on their particular CVs. There are a number of methods to ascertain the CV of the constellation's points, including finding characteristics of various components in a communication system (transmitter, communication channel and receiver), and any method may be used within various embodiments. The modification of the branch metrics/confidence level may be performed in a communication receiver; the communication receiver may be implemented in a communication system employing the vector orthogonal frequency division multiplexing (VOFDM) portion of the broadband wireless internet forum (BWIF).

Abstract: A method of parameter estimation in a shared channel communications system includes the steps of receiving a preamble including a first sequence corresponding to a sequence having zero autocorrelation, a second sequence having zero autocorrelation, and a third sequence having zero autocorrelation, performing a coarse carrier frequency estimate based on the first sequence, and performing a fine carrier frequency estimate based on the second and third sequences.

Abstract: First and second address-selection information, as well as first and second read/write information, is contemporaneously provided to various enabling circuits. The enabling circuits can then enable one or more first memory cells based on the first address-selection and first read/write information, and further enable the one or more second memory cells based on the second address-selection information and read/write information. Data can then be written to, or read from, the enabled memory cells in a single memory-access cycle.

Abstract: A high speed data communication system uses a single-ended bus architecture with a reference signal extracted from a differential periodic signal that is transmitted along with single-ended data. By using a periodic signal such a clock signal with approximately 50% duty cycle, a much more stable and accurate reference signal is established for receiving single-ended data.

Abstract: A one-time programmable device includes a controller, a protection system, a static storage element and a latch, which can be referred to as a latch-based one-time programmable (OTP) element. In one example, the static storage element includes a thin gate-oxide that acts as a resistance element, which, depending on whether its blown, sets the latch into one of two states.

Abstract: A Class AB voltage-to-current converter includes a plurality of DC coupled transconductance stages that produce a linearized output and a biasing circuit. The biasing circuit generates a primary bias voltage that is greater than a generated secondary bias voltage. As such, the first transconductance stage becomes active before the second transconductance stage with respect to the magnitude of a differential input voltage, thereby allowing the transconductance of the secondary transconductance stage to be added (or subtracted) from the transconductance of the primary stage to improve the overall transconductance of the Class AB voltage-to-current converter. As each of the plurality of transconductance stages is biased differently from the others, the various transconductance stages are biased on to differing amounts based upon the biasing signals as well as the input signal.

Abstract: A method and apparatus for adaptively controlling a variable gain amplifier (VGA). The operation of the VGA is separated into a low gain mode and a high gain mode and the mode in which the VGA is currently operating in is adaptively sensed. A threshold voltage is compared to a control voltage of the VGA; if the VGA is currently operating in the low gain mode and the control voltage is higher than the threshold voltage, the VGA is switched from the low gain mode to the high gain mode; and if the VGA is currently operating in the high gain mode and the control voltage is lower than the threshold voltage, the VGA is switched from the high gain mode to the low gain mode.

Abstract: A direct conversion or VLIF receiver corrects DC offset by, prior to receiving a burst of data, the receiver determines a coarse DC offset with the antenna of the receiver switched off. The receiver then adjusts an analog portion of the receiver (e.g., the output of the mixers) based on the coarse DC offset. The receiver then determines a gain setting of the receiver (e.g., for the low noise amplifier and/or programmable gain amplifiers) with the antenna on. The receiver then sets the gain of at least one gain stage of the receiver based on the gain setting. The receiver then determines a fine DC offset with the antenna off. The receiver then, while receiving a burst of data, subtracts the fine DC offset from the digital baseband or low IF signal prior to data recovery.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.