Patents Assigned to Broadcom Corporation
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Patent number: 6646954Abstract: The present invention relates to a synchronous self timed memory device. The device includes a plurality of memory cells forming a cell array, at least one local decoder interfacing with the cell array, at least one local sense amplifier and at least one local controller. The local sense amplifier interfaces with at least the decoder and cell array, and is adapted to precharge and equalize at least one line coupled thereto. The local controller interfaces with and coordinates the activities of at least the local decoder and sense amplifier.Type: GrantFiled: March 19, 2002Date of Patent: November 11, 2003Assignee: Broadcom CorporationInventors: Gil I. Winograd, Esin Terzioglu, Ali Anvar, Sami Issa
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Patent number: 6646488Abstract: Methods and systems for controlling delay relatively independent of process, supply-voltage, and/or temperature (“PVT”) variations include sensing an output signal after a number of inverters and activating different numbers of transistors and/or adjusting strength of transistors in a delay path to compensate for PVT variations. In an embodiment, a waveform is received, delayed, and output to an output terminal using at least one relatively low-power device. Supplemental output power is provided by at least one relatively high-power device until the output waveform exceeds a threshold.Type: GrantFiled: June 27, 2002Date of Patent: November 11, 2003Assignee: Broadcom CorporationInventor: Janardhanan S. Ajit
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Patent number: 6646509Abstract: Provided a method of reducing impedance variations in an electrical circuit structured and arranged for placement on an integrated circuit (IC) substrate. The method includes forming sets of parallel connected resistors, each set corresponding to one of the impedance devices on the IC. Each set also includes two or more parallel resistor paths, each resistor path including two or more cascaded resistors and has a total impedance value substantially equal to the predetermined impedance value of its corresponding impedance device. Finally, the method includes configuring the sets of parallel resistor paths to form an interdigital structure across the substrate when the electrical circuit is placed on the IC.Type: GrantFiled: July 31, 2002Date of Patent: November 11, 2003Assignee: Broadcom CorporationInventor: David A. Sobel
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Patent number: 6646899Abstract: A CAM may include a plurality of CAM cells. Each CAM cell is configured to generate an output indicating if a corresponding input bit and the bit stored in that CAM cell match. A circuit is configured to logically AND the outputs to generate a hit output. A first compare line generator circuit is configured to generate a first pulse responsive to a clock signal and a data signal and a second compare line generator circuit is configured to generate a second pulse responsive to the clock signal and the complement of the data signal. A CAM may include a circuit configured to generate a pulse indicating a hit in an entry of the CAM and a latch circuit configured to capture the pulse responsive to the first clock signal and configured to clear responsive to the second clock signal. A first CAM may store a value in each entry and may further store a compare result.Type: GrantFiled: September 21, 2001Date of Patent: November 11, 2003Assignee: Broadcom CorporationInventors: George Kong Yiu, Mark H. Pearce
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Publication number: 20030206141Abstract: A signal sensing module senses an RF signal and produces one or more secondary signals representative of the RF signal. An impedance matching control module generates a control signal, based on the one or more secondary signals, which is indicative of an impedance mismatch between a load and a communications device. The control signal is then applied to at least one variable impedance device to adjust the impedance of an impedance matching network and thereby reduce the impedance mismatch between the load and the communications device. In an embodiment, the at least one variable impedance device is a barium strontium titanate, thin film, parallel plate capacitor. In other embodiments, other variable impedance devices such as other types of thin film capacitors or varactor diodes are used to adjust the impedance of the impedance matching network.Type: ApplicationFiled: May 23, 2003Publication date: November 6, 2003Applicant: Broadcom CorporationInventors: Nicolaos G. Alexopoulos, Franco De Flaviis
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Publication number: 20030208713Abstract: A test head performs at-speed testing of high serial pin count gigabit per second (GBPS) devices. The test head includes a device under test (DUT) coupled to a first portion of the test head and a rider board coupled to the DUT. The rider board includes a first signal path including switching matrices coupled to the DUT, a second signal path including bit error rate testing (BERT) engines, each of the BERT engines being coupled to each other, corresponding ones of the switching matrices, and to the DUT, and a third signal path including Ethernet testing circuits coupled to the DUT. The BERT engines allow for routing of a test signal from any of the switching matrices to any other switching matrix (e.g., between non-adjacent switching matrices).Type: ApplicationFiled: April 11, 2003Publication date: November 6, 2003Applicant: Broadcom CorporationInventor: Andrew C. Evans
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Publication number: 20030206065Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL.Type: ApplicationFiled: May 23, 2003Publication date: November 6, 2003Applicant: Broadcom CorporationInventor: Ramon A. Gomez
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Publication number: 20030206174Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The chip includes a display engine that processes graphics images organized as windows. The system includes plurality of line buffers for receiving the graphics contents. The graphics contents are composited into each of the plurality of line buffers by blending the graphics contents with the existing contents of the line buffer until all of the graphics surfaces for the line have been composited.Type: ApplicationFiled: April 25, 2003Publication date: November 6, 2003Applicant: Broadcom CorporationInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiadong Xie, James T. Patterson, Greg A. Kranawetter
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Patent number: 6643261Abstract: A data switch for network communications includes at least one first data port interface which supports a plurality of data ports which transmit and receive data at a first data rate. At least one second data port interface is provided; the at least one second data port interface supports a plurality of data ports transmitting and receiving data at a second data rate. A CPU interface is provided, with the CPU interface configured to communicate with a CPU. An internal memory is provided, and communicates with the at least one first data port interface and the at least one second data port interface. A memory management unit is provided, and includes an external memory interface for communicating data from at least one of the first data port interface and the second data port interface and an external memory.Type: GrantFiled: November 2, 2001Date of Patent: November 4, 2003Assignee: Broadcom CorporationInventors: Shiri Kadambi, Shekhar Ambe
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Patent number: 6642753Abstract: A charge pump circuit includes a high-swing transconductance amplifier. A high input swing transconductance is provided in a negative feedback loop of the charge pump circuit without an abrupt change in transconductance. The high-swing transconductance amplifier includes a transconductance cell and high-swing circuitry. The transconductance cell includes a current supply transistor, which provides current for transconductance while input voltages are within the operational range for the transconductance cell. When the input voltages increase so as to be outside of the operational range, the current source transistor enters into triode region of operation, and provides reduced current. The high-swing circuitry supplies the current in this case so that abrupt change in transconductance does not occur.Type: GrantFiled: September 20, 2001Date of Patent: November 4, 2003Assignee: Broadcom CorporationInventor: Ka Lun Choi
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Patent number: 6642762Abstract: A method and apparatus to ensure DLL locking at a minimum delay is provided. In one embodiment, a DLL circuit includes a phase detector, a counter, a programmable delay line, and a counter control circuit. Upon initialization of the DLL circuit, the counter control circuit is configured to cause the counter to count increment, regardless of the phase relationship between a reference clock signal and the output clock signal. The counter continues incrementing, thereby changing the phase relationship between the reference clock signal and the output clock signal by adjusting the delay of the programmable delay line. This eventually results in a phase lock between the reference clock signal and the output clock signal at a minimum delay. Once the DLL achieves a phase lock between the reference clock signal and the output clock signal, the counter increments or decrements its count in order to maintain or re-acquire a lock.Type: GrantFiled: November 14, 2002Date of Patent: November 4, 2003Assignee: Broadcom CorporationInventor: Vincent R. von Kaenel
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Patent number: 6643595Abstract: A system and technique for detecting a device that requires power is implemented with a power detection station. The power detection system includes a detector having an output and a return which are coupled together by the device when the device requires power. The detector includes a word generator for generating test pulses for transmission to the device via the detector output, and a comparator for comparing the detector output with the detector return. The power detection station has a wide variety of applications, including by way of example, a switch or hub.Type: GrantFiled: April 17, 2002Date of Patent: November 4, 2003Assignee: Broadcom CorporationInventors: Vafa Rakshani, Nariman Yousefi
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Publication number: 20030202616Abstract: A radio receiver includes a low noise amplifier, intermediate frequency mixing stage, complex bandpass filter, a single analog to digital converter, a 1st digital mixing module, and a 2nd digital mixing module. The low noise amplifier is operably coupled to amplify a modulated radio frequency (RF) signal to produce an amplified modulated RF signal. The intermediate frequency mixing stage is operably coupled to mix the amplified modulated RF signal with a local oscillation to produce a modulated IF signal. The complex bandpass filter filters an I and Q component of the modulated IF signal to produce a filtered IF signal. The single analog to digital converter is operably coupled to convert the filtered IF signal into a digital IF signal. The 1st and 2nd mixing modules each receive the digital IF signal and mix the digital IF signal with an in-phase and quadrature digital local oscillation to produce a 1st baseband signal component and a 2nd baseband signal component.Type: ApplicationFiled: April 25, 2002Publication date: October 30, 2003Applicant: Broadcom Corporation, a California CorporationInventors: Henrik T. Jensen, Hong Shi
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Publication number: 20030201920Abstract: In accordance with the present invention a data processing circuit includes a first data path for processing first data. The first data path includes a first data storage circuit. A second data path is provided for processing second data. The second data path includes a second data storage circuit. A multiplexer having a first input coupled to the first data path and a second input coupled to the second data path receives the stored values. The multiplexer includes a select input coupled to a clock signal. A delay circuit is configured to delay storage of the second data in the second data storage circuit, wherein the first data storage circuit stores the first data in response to receiving a first timing signal, and the second data storage circuit stores the second data in response to receiving a second timing signal.Type: ApplicationFiled: May 6, 2003Publication date: October 30, 2003Applicant: Broadcom CorporationInventor: Bo Zhang
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Publication number: 20030202384Abstract: A system-on-chip (SOC) device or a random access memory (RAM) chip includes a RAM block. The RAM block includes memory cells, each of which has three transistors. Each memory cell is coupled to both a read bit line and a write bit line. A transparent continuous refresh mechanism has been implemented to read the content of a memory cell and re-write it back to the memory cell without disturbing the access (read/write) cycle, making refresh operations transparent to the system level. The continuous refresh mechanism includes a collision detection mechanism to prevent writing and reading the same memory cell at the same time.Type: ApplicationFiled: April 16, 2003Publication date: October 30, 2003Applicant: Broadcom CorporationInventors: Cyrus Afghahi, Sami Issa
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Publication number: 20030202618Abstract: An FM radio receiver includes a low noise amplifier, down conversion mixing module, local oscillation module, bandpass filter, demodulation module, and a DC offset estimation module. The low noise amplifier, the down conversion mixing module, the bandpass filter, and the demodulation module are operably coupled to recapture data from a received a radio frequency (RF) signal. The local oscillation module is operably coupled to generate the local oscillation based on a reference oscillation and a DC offset correction signal. The DC offset estimation module is operably coupled to generate the DC offset correction signal based on a determined a DC offset. The DC offset estimation module determines the DC offset prior to compensation of the local oscillation, such as during a test sequence and/or during a preamble.Type: ApplicationFiled: April 29, 2002Publication date: October 30, 2003Applicant: Broadcom Corporation a, California CorporationInventors: Henrik T. Jensen, Brima Ibrahim
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Patent number: 6639479Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.Type: GrantFiled: January 18, 2002Date of Patent: October 28, 2003Assignee: Broadcom CorporationInventors: Mike Kappes, Terje Gloerstad
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Patent number: 6639430Abstract: In a latch circuit having a bistable pair of cross connected transistors of a first polarity and a third transistor of a second polarity, a current signal greater than a bias current is received at a latch circuit port, amplified with the third transistor, and applied to the latch circuit port. This decreases the time in which the latch circuit port receiving the current signal greater than the bias current reaches a steady state voltage.Type: GrantFiled: February 27, 2002Date of Patent: October 28, 2003Assignee: Broadcom CorporationInventors: Klaas Bult, Rudy Van de Plassche, Jan Mulder
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Patent number: 6639866Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.Type: GrantFiled: November 3, 2001Date of Patent: October 28, 2003Assignee: Broadcom CorporationInventors: Mark Slamowitz, Douglas D. Smith, David W. Knebelsberger, Myron Buer
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Patent number: 6640288Abstract: An agent, in response to a write to a shared block, is configured to initiate a read exclusive transaction on an interface on which the agent communicates. Additionally, the agent is configured to indicate, to a responding agent or agents on the interface, that a data transfer is not required from the responding agent or agents in response to the read exclusive transaction. In one embodiment, the agent indicates to the responding agents that a data transfer is not required in a response phase of the transaction. Specifically, the agent may respond in such a way that the agent indicates that it will provide the data (i.e. that the agent will provide the data to itself). For example, the agent may respond with an exclusive ownership indication. On the interface for such an embodiment, an exclusive ownership response may require that the agent having exclusive access respond with the data.Type: GrantFiled: April 8, 2003Date of Patent: October 28, 2003Assignee: Broadcom CorporationInventors: Joseph B. Rowlands, Michael D. Carlson