Abstract: Using a single logical base transceiver to serve multiple physical locations is disclosed. A call traffic associated with a call associated at a mobile network with an assigned timeslot of a logical base transceiver is received. A timeslot with which the call traffic is associated is remapped from the assigned timeslot to a serving timeslot being used at a serving physical base transceiver to facilitate the call, in the event the call traffic comprises inbound call traffic being sent into the mobile network from the serving physical base transceiver, or from the serving timeslot to the assigned timeslot in the event the call traffic comprises outbound call traffic being sent from the mobile network to the serving physical base transceiver.

Abstract: According to an example embodiment, a circuit may include a first pair of differential input transistors, each coupled between at least an associated first positive clock transistor and ground; the first positive clock transistors coupled between differential output nodes and the differential input transistors associated with the first positive clock transistors, the first positive clock transistors being configured to respond to a positive input from a clock; a first inductor coupled between the differential output nodes and a voltage source; a second pair of differential input transistors, each coupled between at least an associated first negative clock transistor and ground; the first negative clock transistors coupled between the differential output nodes and the differential input transistors associated with the first negative clock transistors, the first negative clock transistors being configured to respond to a negative input from the clock; and the differential output nodes coupled between the first

Abstract: A transceiver front-end provides an interface between a transmission medium and transmitter, and between a transmission medium and receiver. The transceiver front-end includes a hybrid circuit, a high-pass filter, and a gain stage, that permits the reduction or the complete elimination of buffer amplifiers. Buffer amplifiers can be eliminated because the hybrid circuit and/or the high-pass filter are adapted so that they can be directly connected to each other, without a loss in circuit performance. Furthermore, the high-pass filter and/or the gain stage are also adapted so they can be directly connected. As such, the transceiver front-end can be constructed using all passive components, reducing or eliminating excess heat generation.

Abstract: Acknowledgment and/or receiver recovery mechanisms for scheduled responses within multiple user, multiple access, and/or MIMO wireless communications. Explicit scheduling information is provided from a first wireless communication device (e.g., an access point (AP), a transmitting wireless communication device) to a number of other wireless communication devices (e.g., wireless stations (STAs), receiving wireless communication devices) directing those other wireless communication devices a manner by which responses (e.g., acknowledgments (ACKs), block acknowledgments (BACKs), training feedback frames, etc.) are to be provided to the first wireless communication device there from. Such direction may include the order, timing, cluster assignment, etc. by which each respective wireless communication device is to provide its respective response to the first wireless communication device.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: Downstream synchronous multichannel (DSSM) communications are provided among a plurality of carriers, each being a completely DOCSIS™ 2.0-compliant downstream. The synchronous multichannels support communications with both DSSM-capable communications nodes and non-DSSM-capable communications nodes (e.g., legacy cable modems). Non-DSSM packets are transmitted on a single channel. DSSM packets are split into multiple pieces, which are transmitted simultaneously on all available channels. Since the physical delay variation (e.g., group delay change) across the adjacent carriers is small (on the order of a symbol time), the multiple pieces arrive at the receiving communications nodes at nearly the same time and can be reassembled with minimal buffering and no packet ordering problems. To avoid causing trouble for the non-DSSM-capable communications nodes, the packet pieces are encapsulated with a header that causes the non-DSSM-capable communications nodes to silently discard them.

Abstract: Methods assigning mobile users in a half-frequency division duplex (HFDD) system to a first UL group and second UL group of an uplink (UL) sub-frame, and to a first DL group and a second DL group of a downlink (DL) sub-frame, wherein the UL sub-frame is assigned a first carrier frequency and the DL sub-frame is assigned a second carrier frequency, are disclosed. One method includes determining a type of data, determining a receive CINR (carrier interference plus noise ratio), and determining a Doppler frequency parameter, for each mobile user of a plurality of mobile users.

Abstract: Methods and systems for a software defined power amplifier for multi-band, multi-standard applications are disclosed and may comprise configuring a single programmable output stage of a multi-band, multi-standard transmitter to handle transmission of a signal according to multiple wireless communication protocols and frequency ranges. The output stage may be configured by coupling a power amplifier (PA) within the programmable output stage to a switch or a duplexer, which may be coupled to one or more of multiple antennas, each of which may handle signals in a different frequency range. Each antenna may be impedance matched with the power amplifier using transformers, and may be coupled by activating at least one integrated transistor. The PA may be biased to operate in one of a plurality of classes of operation comprising Class A, AB, C and F associated with the wireless communication protocols, which may comprise EDGE, GSM, WCDMA and wireless LAN.

Abstract: A network device and method include token buckets, each token bucket associated with one of clients and virtual ports and configured to process information based on a predefined bandwidth and a strict priority/weighted deficit round robin. A maximum rate shaper module and a minimum rate meter module shape and meter whether any of the clients or virtual ports have exceeded a predefined threshold. A scheduler is configured to schedule services of the clients and to calculate a new bandwidth allocation for at least one of the clients or virtual ports when the at least one of the clients or virtual ports has exceeded the predefined threshold, the new bandwidth allocation replacing the predefined bandwidth and being proportional to the predefined bandwidth for each of the clients or virtual ports.

Abstract: A system and method for synchronizing sub-carriers in a signal processing system. Various aspects of the present invention may comprise method steps and structure that receive a sampled signal. Various aspects may produce a synchronization signal based on the sampled signal. Various aspects may generate and store a cropped version of the received sampled signal. Various aspects may read a cropped sampled signal from memory that corresponds to the received sampled signal. Various aspects may generate a restored sampled signal by adding samples to the cropped sampled signal read from memory. Various aspects may, based on the synchronization signal, output the restored sampled signal coarsely synchronized to the received sampled signal. Various aspects may determine a phase difference between the output restored sampled signal and the output received sub-carrier. Various aspects may adjust the phase of the restored sampled signal in response to the determined phase difference.

Abstract: Aspects of a method and system for varactor linearization are provided. In this regard, a relationship between control voltage and capacitance of a variable capacitor may be controlled utilizing a plurality of bias voltages communicatively coupled to a corresponding plurality of bias terminals of said variable capacitor. The variable capacitor may comprise a plurality of two-terminal unit varactors and a first terminal of each unit varactor may be coupled to an RF terminal of the variable capacitor, a second terminal of one of the unit varactors may be coupled to the control voltage, and a second terminal of each of the remaining unit varactors may be coupled to one of the bias voltages. The bias voltages may be generated via a resistor ladder and/or via the resistive nature of a portion of semiconductor substrate. The bias voltages may linearize the relationship between the control voltage and the capacitance.

Abstract: An apparatus is disclosed that includes first transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a first Ethernet communication protocol at a first data rate, second transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a second Ethernet communication protocol at a second data rate; and third transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a third Ethernet communication protocol at a third data rate.

Abstract: A circuit includes a transceiver coupled to transmit an outbound signal in accordance with a plurality of transmit parameters to at least one remote station and receive an inbound signal from the at least one remote station. The transceiver detects a packet transmission failure, selects one of a plurality of transmission failure causes, and adjusts at least one of a plurality of transmit parameters, based on the selected one of the plurality of transmission failure causes.

Abstract: Certain aspects of a method and system for dynamically adjusting intermediate frequency (IF) and filtering in microwave circuits may include generating one or more intermediate frequency (IF) signals from one or more baseband signals and/or one or more radio frequency (RF) signals. The generated one or more IF signals may be filtered to avoid detected interference and/or detected noise from out-of-band radio sources. The frequency of the generated one or more IF signals may vary depending on the detected interference and/or detected noise. The filtering of the generated one or more IF signals may be adjusted based on the variation in the frequency of the generated one or more IF signals. The one or more RF signals may be down-converted to generate the one or more IF signals. The generated IF signals may be further down-converted and dynamically filtered to generate the desired baseband signals.

Abstract: A mobile communication device includes a first wireless transceiver that receives a first inbound RF signal and that transmits a first outbound RF signal based on a first power supply signal. A second wireless transceiver receives a second inbound RF signal and that transmits a second outbound RF signal based on a second power supply signal. A processing module generates at least one power mode signal based on first transmit power control data received via the first inbound RF signal. A power management circuit adjusts a first power consumption parameter of the first power supply signal and a second power consumption parameter of the second power supply signal based on the at least one power mode signal.

Abstract: Aspects of a system and method for processing an image are presented. The method may comprise stretching contrast of an input image based on a distribution of luma values for the input image and a distribution of luma values for a desired output image. The pixels below a specified level of contrast defined by the distribution of luma values for the input image and the distribution of luma values for the desired output image are substantially stretched. The method may also comprise constructing a lookup table of the desired output luma values and stretching a contrast of the input image using the constructed lookup table. The method may also comprise applying linear function and a non-linear function to the distribution of luma values, and applying a stretch factor above a specified level of the distribution and a stretch factor below a specified level of the distribution.

Abstract: An alternate adjacent channel interference (AACI) filter is integrated into an intermediate frequency (IF) channel select filter to filter received RF signals. The IF channel select filter is an IF staged structure comprising successive IF stages. Each of the successive IF stages is a 2-biquad integrator. The AACI filter is integrated into the first IF stage of the IF channel select filter by re-using circuit components such as an operational amplifier, an input resistor, and a shunt capacitor of the first IF stage. The shunt capacitor is coupled between a middle point of the input resistor and ground. The AACI filter is realized via different equivalent implementations of the re-used circuit components of the first IF stage. A value of the shunt capacitor of the AACI filter becomes a fixed-value when a value the input resistor is inversely proportional to the bandwidth of the AACI filter.

Abstract: Super block error correction code (ECC) adaptable to communication systems including hard disk drives (HDDs) and other memory storage devices. A means is presented by which a number of blocks of information can be organized, with a degree of ECC provided thereto, and transmitted via a signal into a communication channel. In some instances, the communication channel is coupled to a storage media as in the context of an HDD, and information is written to and read from the storage media via this communication channel (e.g., “read channel”). This means is particularly well suited to applications that provide large amounts of data via any one transmission (e.g., DVR/PVR (Digital/Personal Video Recorder)). A redundant block is generated using the information of each of a number of information blocks thereby provided extra ECC on a large portion of data, and that redundant block also undergoes ECC encoding.

Abstract: Multipath signals are processed to suppress interference utilizing a programmable interface suppression module. One or more circuits that are operable to retrieve at least a portion of stored data from a memory, wherein the stored data corresponds to signals received via a particular receiving antenna and assigned to a particular finger in a rake receiver. A plurality of weighting factor values may be computed based on one or more signals received via the particular receiving antenna. Estimated signals may be generated based on the portion of stored data and the plurality of weighting factors. Residual signals may be generated based on the portion of stored data and the estimated signals. The portion of stored data may be replaced in the memory with corresponding data generated utilizing the residual signals. A plurality of interference suppressed signals may be generated based on the plurality of residual signals.

Abstract: A physical docking interface facilitates co-processing with an extended processing module of an extended computer unit in a physical docked mode, when the handheld computing unit is coupled to the extended computer unit via the physical docking interface. A quasi docking interface facilitates co-processing with the extended processing module in a quasi docked mode when the handheld computing unit is coupled to the extended computer unit via the quasi docking interface. A graphical user interface presents a selectable quasi docking interface graphic for display to a user and responds to a user selection of the selectable quasi docking interface graphic by generating a quasi docking command. The quasi docking interface couples the handheld computing unit to the extended computing unit in response to the quasi docking command.