Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.

Abstract: Certain aspects of a method and system for a dual mode subband acoustic echo canceller with integrated noise suppression may include splitting an input signal into a lowband component and a highband component. The subbands of each of the lowband component and the highband component may be processed in order to reduce an echo associated with the input signal and to suppress the noise associated with the input signal.

Abstract: A system and method, for reprogramming registers without having to reprogram unchanged registers. The registers are divided into groups based on common characteristics or functions. The values for the groups that differ from the current values are written into a linked list, which is then loaded into the appropriate registers. The linked list contains information indicating the groups of registers in the linked list.

Abstract: A system comprising a plurality of execution units configured to execute, at least in part, a plurality of instruction threads; a plurality of performance monitors, each performance monitor being configured to collect performance information related to the execution of at least one instruction thread; a selected thread identifier configured to provide, during operation, the selection of at least one instruction thread; and a performance manager configured to filter, utilizing the selected thread, the information collected by the plurality of performance monitors.

Abstract: Aspects of a method and system for customized full ephemeris compatible with standard AGPS network devices allows a GPS enabled handset to receive real-time full ephemeris from an AGPS server for calculating a position fix. The real-time full ephemeris may be generated at the AGPS server in response to one or more request for real-time full ephemeris from the GPS enabled handset. The AGPS server may be configured to provide fresh full ephemeris generated at smaller intervals such as every 10-15 minutes as approximated real-time full ephemeris. The generated real-time full ephemeris or fresh full ephemeris may be communicated to the GPS enabled handset periodically or aperiodically. Various predicted real-time full ephemeris or predicted fresh full ephemeris compatible with various standards may be generated via Short Term Orbits (STO) technology.

Abstract: A method and system for simulcasting multimedia information via a broadband access gateway and a wireless wide area network, is disclosed. An access device such as, for example, a mobile multimedia handset engaged in a call served by a wireless wide area network may migrate to within the coverage area of an associated broadband access gateway with a wireless interface. The wireless wide area network may simulcast call content to the broadband access gateway via a broadband network. A user in the proximity of the broadband access gateway may be notified of the simulcasting of the call, and may elect to continue the call via a WLAN/PAN-enabled wireless handset or other access device that is compatible with the wired and/or wireless interfaces of the broadband access gateway.

Abstract: A printed circuit board (PCB) assembly is provided that includes a PCB, an integrated circuit package, an electromagnetic interference (EMI) shield ring, and a heat sink lid. A first surface of the package is mounted to a first surface of the PCB. The EMI shield ring is mounted to the first surface of the PCB in a ring around the package. A first surface of the heat sink lid includes a recessed region and first and second supporting portions separated by the recessed region. The heat sink lid is mated with the EMI shield ring such that the package is positioned in an enclosure formed by the EMI shield ring and the recessed region of the heat sink lid. A second surface of the package may interface with a surface of the recessed region.

Abstract: Multi-user uplink communications within multiple user, multiple access, and/or MIMO wireless communication systems. Within such communication systems, uplink communications from various receiving wireless communication devices (e.g., STAs) to a transmitting wireless communication device (e.g., AP) may occur in any of a number of various dimensions or combinations thereof including MU-MIMO dimension and frequency dimension (asynchronous FDM or synchronous FDM). In accordance with such uplink communications, various considerations such as time synchronization, frequency synchronization, and/or power control (including wireless communication device grouping). When performing uplink asynchronous FDM signaling, power control as grouping is used. When performing uplink synchronous FDM signaling, time synchronization, frequency synchronization, and power control (such as including wireless communication device grouping) is performed.

Abstract: A method and apparatus is disclosed to restore or recharge one or more cells of a battery. A switching module sources an element charging current from a first input voltage to the battery when a charging control signal is at a first logical level or sinks an element discharging current from the battery to a second input voltage when the charging control signal is at a second logical level. A controller module provides the charging control signal based upon a comparison of a reference voltage and a control voltage pulse, the control voltage pulse being generated by the controller module in response to a replica current, the replica current being proportional to the element charging current. A feedback module compares a voltage of the battery to a reference voltage to provide a charging error signal.

Abstract: A scheme for sharing antenna control pins in a wireless communications device implemented on a single CMOS integrated circuit is described. By providing a routing circuit for coupling the antenna control signal to the appropriate transceiver circuitry in a multi-transceiver system, antenna control signals may be efficiently processed using a minimum of pins on the wireless communication device.

Abstract: The present invention includes a network telephone having a microphone coupled to provide voice data to a network, a speaker coupled to facilitate listening to voice data from the network, a dialing device coupled to facilitate routing of voice data upon the network, a first port configured to facilitate communication with a first network device, a second port configured to facilitate communication with a second network device and a prioritization circuit coupled to apply prioritization to voice data provided by the microphone.

Abstract: Methods and systems for a RFIC master are disclosed. Aspects of one method may include configuring an on-chip programmable device that may function as a master on a bus that has at least one device interface, for example, RFIC interface, coupled to the bus. The on-chip programmable device may generate at least one signal to control at least one device coupled to at least one device interface. The on-chip programmable device may communicate the generated signal via the bus upon receiving an input timer signal and may be configured by writing at least one event data and an index-sample data to the on-chip programmable device. The index-sample data may comprise at least a count value and an event data index. When the count value equals a value of the timer signal, event data may be fetched and executed starting with the one specified by the event data index.

Abstract: A radio frequency (RF) transmitter includes a modulation controller that generates a modulation control signal having either a first value or a second value. A driver generates an RF signal based on an upconverted signal, wherein the driver modulates the upconverted signal based on a first modulation signal when the modulation control signal has the first value. A power amplifier generates a transmit signal based on the RF signal, wherein the power amplifier modulates the RF signal based on a second modulation signal when the modulation control signal has the second value.

Abstract: Aspects of a method and system for using a wireless local area network (WLAN) phase shifter for smart antenna beam steering are presented. Aspects of the system may enable determination of an angle of arrival (AOA) for signals received at a receiving station in a wireless network. Based on the AOA value, the receiving station may enable orientation of antenna in a smart antenna system. In a switched beam smart antenna system, antenna element(s) may be selected, which are most closely oriented toward the AOA. In an adaptive array smart antenna system, antenna beam may be steered, or reoriented, based on the AOA.

Abstract: A plurality of downstream channels enables communications between a CMTS and a plurality of legacy and non-legacy cable modems. A dispersion mechanism optimizes channel bonding, such that the downstream channels are interoperable with DOCSIS™-compliant, legacy cable modems. A program identifier field distinguishes between bonded and non-bonded flows. For bonded flows, a bonding group is defined to bond a set of downstream channels. The packets for each bonding group are classified into channel queues at or near a MPEG level or a packet level. To mitigate congestion and multiplexing inefficiencies, the dispersion mechanism collects real-time information to determine which channel receives the bonded packets. The dispersion mechanism includes a queue manager and a priority manager. The queue manager dynamically creates queues and allocates queue memory. The priority manager spools the appropriate bytes to an MPEG encapsulation engine for the appropriate outgoing modulator.

Abstract: Aspects of a method and system for dynamic adaptation and communicating differences in frequency-time dependent systems may include generating a time difference weighting factor and a frequency difference weighting factor, based on at least channel estimates. A time-frequency difference may be computed by forming a weighted sum comprising a time difference and a frequency difference, where forming the weighted sum uses at least the time difference weighting factor and the frequency weighting factor. A channel quality indicator (CQI) feedback message may be generated, comprising the time-frequency difference. The time difference weighting factor and/or the frequency difference weighting factor may be generated adaptively at a base station or a mobile terminal. The time difference and/or the frequency difference may be generated from estimated Signal-to-Noise-Ratios (SNRs) associated with the channel estimates. The SNRs may be based on at least the output of an MMSE receiver.

Abstract: Amplitude modulation is provided for a polar transmitter that incorporates a translational loop. The input to the polar transmitter and translational loop may be an amplitude modulated signal. The amplitude modulation of the transmitter may be controlled via a closed loop to help ensure that the output of the amplifier accurately corresponds to the modulated input signal. The transmitter may incorporate partially integrated or separate translational and amplitude modulation loops.

Abstract: Methods and systems for processing signals via power splitters embedded in an integrated circuit package may include generating via a power splitter, one or more RF signals proportional to one or more received RF signals. The power splitter may be integrated in a multi-layer package. The generated RF signals may be processed via an integrated circuit, which may be electrically coupled to the multi-layer package. The power splitters may include quarter wavelength transmission lines. The transmission lines may include a microstrip structure or a coplanar structure. The power splitters may be bonded to one or more capacitors in the integrated circuit. The capacitors may include CMOS devices in the integrated circuit. The power splitters may include lumped devices which may include surface mount devices coupled to the multi-layer package or devices within the integrated circuit, which may be flip-chip bonded to the multi-layer package.

Abstract: According to one exemplary embodiment, a three-way splitter includes a printed element and a resistive network comprising discrete resistors. A first printed branch, second printed branch, and third printed branch distribute a received communication signal to respective outputs having substantially the same phase, frequency, and impedance. Each printed branch includes a number of substantially ninety-degree angles. In one embodiment, the printed branches are quarter wavelength transmission lines in a frequency range of 1.5 GHz. In one embodiment, the three-way splitter consumes less than one square inch of surface area on a printed circuit board, and can be used in a satellite receiving system, for example. In this embodiment, the three-way splitter is utilized for frequencies in the range of approximately 900 MHz to 2.2 GHz.

Abstract: A network device for processing data on a data network including a plurality of ports, configured to receive data from a data network and to send processed data to the data network via an egress port, a controller interface, configured to communicate with an external controller, a memory management unit, configured store data on and retrieve data from the memory and a metering unit, configured to police a flow of the processed data to be sent to the egress port. The metering unit further includes programmable registers, in communication with the controller interface, configured to be programmed through controller signals sent through the controller interface from the external controller, such at all aspects of the flow of the processed data may be controlled by the external controller.