Abstract: A system for serving an individual node in a shared communication network having a MAC layer and a PHY layer, the system being operative to interface between the MAC layer and the PHY layer. The system may include a first physical channel transferring at least one packet between the layers, a second physical channel transferring at least one burst parameter between the layers, and a third physical channel transferring at least one timing signal, for a burst characterized by the at least one burst parameter and comprising the at least one packet, between the layers.

Abstract: Methods and systems are disclosed for providing secured data transmission and for managing cryptographic keys. One embodiment of the invention provides secure key management when separate devices are used for generating and utilizing the keys. One embodiment of the invention provides secure storage of keys stored in an unsecured database. One embodiment of the invention provides key security in conjunction with high speed decryption and encryption, without degrading the performance of the data network.

Abstract: A system and method for preventing disconnect of a powered device by a power source equipment. Powered devices can have unstable power profiles. These unstable power profile can make it difficult for power source equipment (PSE) in a power over Ethernet (PoE) system to effectively manage powering of those devices. In one embodiment, a reservoir of charge having a stable power profile is provided as a charge buffer such that a PSE need not match the swings in power demands by electronic circuitry in the powered device.

Abstract: The present invention provides methods for performing payload header suppression (PHS), expansion, and verification in hardware. A PHS verify circuit reads a data packet until it reaches the location where the first byte must be compared to PHS rule verify bytes. Next, all the relevant bytes in the payload header are compared to the PHS rule verify bytes obtained from a payload header suppression rule mask. Upon completion of the compare, a flag is generated to a PHS suppress circuit indicating that verification has passed or failed. For payload headers passing the verification process, the payload header suppress circuit examines the payload header suppression mask to identify one or more bits in the payload header for which an associated byte string is to be suppressed. Next, the associated byte string for each of the identified bits are suppressed to generate a suppressed packet payload header. Finally, a payload header suppression index is added to the suppressed packet payload header.

Abstract: A digital IF demodulator includes an analog-to-digital (A/D) converter that receives an analog IF signal and converts it to a digital IF signal. A parallel multiplier then down-converts the digital IF signal to a baseband signal having a video component and an audio component. The frequency down-conversion uses a parallel multiplier driven by an outer feedback loop that corrects gross frequency errors in said digital IF signal. The digital IF demodulator also includes a video recovery circuit that selects the video component from the baseband signal and further down-converts the baseband signal to a video baseband using a video complex mixer driven by an inner feedback loop that corrects fast phase perturbations in the video recovery circuit. Finally, the digital IF demodulator includes an audio recovery circuit that (i) receives said baseband signal from the parallel multiplier, and (ii) down-converts the audio component to an audio baseband signal using an audio complex mixer.

Abstract: A supervisory communications device, such as a headend device within a communications network, monitors and controls communications with a plurality of remote communications devices throughout a widely distributed network. The supervisory device allocates bandwidth on the upstream channels by sending MAP messages over its downstream channel. A highly integrated media access controller integrated circuit (MAC IC) operates within the headend to provide lower level processing on signals exchanged with the remote devices. The enhanced functionality of the MAC IC relieves the processing burden on the headend CPU and increases packet throughput. The enhanced functionality includes header suppression and expansion, DES encryption and decryption, fragment reassembly, concatenation, and DMA operations.

Abstract: A system and method for substituting data packets into a data stream, is provided. In one embodiment, the data stream is a video data stream. The system includes packet buffers, a multiplexer, a packet substitution controller, a direct memory access (DMA) engine and a link list buffer controller. A method is also provided for substituting data packets - containing information of the same or different type—into a video data stream at variable rates using a selection mechanism driven by link list buffer control.

Abstract: A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a voice exchange, a data exchange and a call discriminator. The voice exchange is capable of exchanging voice signals between a switched circuit network and a packet based network. The signal processing system also includes a data exchange capable of exchanging data signals modulated by a voiceband carrier on the switched circuit network with unmodulated data signal packets on the packet based network. The data exchange is performed by demodulating data signals from the switched circuit network for transmission on the packet based network, and modulating data signal packets from the packet based network for transmission on the switched circuit network. The call discriminator is used to selectively enable the voice exchange and data exchange.

Abstract: Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal.

Abstract: According to one exemplary embodiment, a method for producing frequency conversion of a communication signal comprises performing a logarithmic transformation of the communication signal to form a logarithmically transformed communication signal, adding the logarithmically transformed communication signal to a logarithmic local oscillator signal, to form a sum signal, and performing an anti-logarithmic transformation of the sum signal. In one embodiment, the method may be used to down-convert a reception signal to baseband. In one embodiment, a log-antilog mixer circuit for producing frequency conversion of a communication signal comprises a signal log block configured to receive the communication signal as an input and to provide a logarithmically transformed communication signal as an output, and an antilog block configured to receive a sum signal of the logarithmically transformed communication signal and a logarithmic local oscillator signal.

Abstract: A charge pump provides charge based on a phase difference between a reference signal and a feedback signal. The relationship between the charge and the phase difference is referred to as the charge phase relationship. Charge pumps typically have a non-linear charge phase relationship. A non-linear portion of the charge phase relationship occurs about a point at which the charge and the phase difference are substantially zero. Points along charge phase relationship that represent the performance of charge pump are referred to as the charge phase characteristic of the charge pump. The charge pump includes an offset current circuit, which biases the charge pump to have a linear charge phase characteristic. For example, the charge pump is biased to have a charge phase characteristic that does not overlap with the non-linear portion of the charge phase relationship.

Abstract: Systems having a user interface comprising a filtered view of media available for consumption are disclosed. An embodiment of the present invention may provide a first user with a view that enables consumption of only the available media that matches characteristics of a media filter. The characteristics of the media filter may be specified by a second user, and the second user may define the characteristics of the media filter remotely, via a communication network. The user interface may support separate media filters for each of a number of different users. Filter characteristics such as type of media channel, the language of any dialogue, an industry rating, an overall viewer rating, and the media format may be supported. The media filter characteristics may be applied not only to what is displayed on the user interface, but also the media available for selection via a remote control.

Abstract: Secure communication of information in a communication network may comprise acquiring a security code from a second communication device by a first communication device and receiving media containing the security code such as a pin code from the first communication device. The security code may be translated into an IP address corresponding to the second communication device. The received media may be routed to the second communication device based on the IP address of the second communication device. In this regard, the IP address of the second communication device remains anonymous or unknown to the first communication device. A duration for which the security code is valid may be limited to a specific time period and/or for a particular number of uses. Notwithstanding, the security code may be acquired out-of-band.

Abstract: Methods, systems, and apparatuses for wafer-level integrated circuit (IC) packages are described. An IC package includes an IC chip, an insulating layer on the IC chip, a plurality of vias, a plurality of routing interconnects, and a plurality of bump interconnects. The IC chip has a plurality of terminals configured in an array on a surface of the IC chip. A plurality of vias through the insulating layer provide access to the plurality of terminals. Each of the plurality of routing interconnects has a first portion and a second portion. The first portion of each routing interconnect is in contact with a respective terminal of the plurality of terminals though a respective via, and the second portion of each routing interconnect extends over the insulating layer. Each bump interconnect of the plurality of bump interconnects is connected to the second portion of a respective routing interconnect of the plurality of routing interconnects.

Abstract: Aspects of a method and system for an extended range Ethernet line code are provided. A local PHY may enable converting Ethernet media independent interface (MII) data from a 4-bit packet stream to a 3-bit packet stream. The 3-bit packet stream may be mapped to first and second ternary bits streams, for example, for communication to a remote PHY utilizing PAM-3 over one or more twisted-pair wires. The 3-bit packet stream may be scrambled and/or aligned before mapping. When a single twisted-pair wire is available, the local PHY may multiplex the ternary bits streams into a single stream. Start-stream delimiters (SSD) may be inserted before the ternary bits streams and end-stream delimiters may be inserted after the ternary bits streams. Idle signals may be inserted after the ESDs and before the start of the next frame of MII data.

Abstract: An integrated circuit includes an on-chip filter component that forms a programmable bandpass filter with the at least one off-chip bandpass filter component. The programmable bandpass filter is programmable based on a control signal. An RF receiver generates inbound data in response to a received signal from the programmable bandpass filter.

Abstract: Herein described is a system and a method of detecting and correcting data bit errors using a sequence of one or more codewords transmitted through a communication channel characterized by intersymbol interference. Each of the one or more codewords incorporates one or encodes one or more parity bits. The codewords are processed by a Meta-Viterbi detector that utilizes a Meta-Viterbi algorithm. The Meta-Viterbi detector comprises an event weight processor, a computational circuitry, a parity syndrome calculator, and an error correction circuitry. The Meta-Viterbi detector receives an output generated from a Viterbi detector having 2s states and processes the received output using a trellis diagram having 2t states.

Abstract: Aspects of a method and system for polar modulation with discontinuous phase for RF Transmitters with power control may include performing by one or more circuits comprising a plurality of amplifiers, configuring one or more of the plurality of amplifiers to provide a coarse amplitude gain and a power level gain. One or more remaining ones of the plurality of amplifiers may be configured to provide an amplitude offset gain, and a signal may be amplified utilizing a combined gain provided by the one or more of the plurality of amplifiers and by the one or more remaining ones of the plurality of amplifiers. The signal may comprise modulated RF signal, and/or a phase modulated RF signal. An RF carrier signal may be modulated to generate the signal.

Abstract: There is provided a method for use in a wireless communication to avoid detection of a false modulated signal in a paged device. In one embodiment, a modulated signal is received by the paged device. Then, the modulated signal is identified by the paged device as a preliminary false modulated signal. Thereafter, the gain of at least one paged device amplifier and/or a matching threshold of the paged device is reduced by the paged device to decrease a sensitivity of the paged device to avoid detection of a future false modulated signal. In one embodiment, the wireless communication is a Bluetooth wireless communication and the paged device is a Bluetooth enabled device. An exemplary system for implementing one embodiment of the disclosed method is described.

Abstract: Signals may be communicated with A/V Bridging services between an upstream link partner and a down stream link partner, each comprising an asymmetric multi-rate Ethernet physical layer (PHY). High bandwidth A/V signals may be transmitted from the upstream link partner and low bandwidth signals may be transmitted from the downstream link partner. One or more of a time stamp, a traffic class and/or a destination address may be utilized in generating PDUs as well as data rate request and a resource reservation messages via the asymmetric Ethernet PHY. The receiving link partner may register for deliver of the PDUs. An aggregate communication rate may be distributed evenly or unevenly among one or more links for transmission and aggregated upon reception via asymmetric multi-rate Ethernet PHY operations. Compressed, uncompressed, encrypted and/or unencrypted signals may be handled. Signal processing may comprise echo cancellation, cross talk cancellation, forward error checking and equalization.