Abstract: Methods and systems for reconfigurable soft-output bit demapping, reconfigurable for different modes of operation (i.e., different transmitter/receiver configurations) and for different modulation schemes are provided. In an embodiment, a reconfigurable soft-output bit demapping system includes a mode/modulation independent equalizer, a plurality of mode/modulation independent soft-slicers coupled to the outputs of the equalizer, a plurality of mode/modulation independent post-scalers coupled to the outputs of the soft-slicers, and a mode-dependent coefficient calculator. The coefficient calculator generates parameters for configuring the equalizer, the soft-slicers, and the post-scalers according to the used mode of operation and modulation scheme.

Abstract: A method and apparatus supporting the handling of multimedia information using simulcasting using a broadband access gateway are disclosed. A broadband access gateway supporting both a personal area network and a broadband network may receive multimedia information during exchanges between access devices over a wireless wide area network. The wireless wide area network may intercept multimedia information, and may, for example, determine that the access device of the recipient is incompatible with the multimedia information. The wide area network may then redirect the multimedia information to a broadband access gateway that may cause the storage of the received multimedia information. In another representative embodiment of the present invention, the wide area network may adapt intercepted multimedia information to be compatible with the access device of the recipient, and may also redirect the original intercepted multimedia information to a broadband access gateway.

Abstract: A method for selectively controlling the flow of data through a network device is discussed. The network device has a plurality of ports, with each port of the plurality of ports having a plurality of priority queues. Congestion at one priority queue of the plurality of priority queues is detected and a virtual channel message is sent to other network devices connected to the network device causing data destined for the one priority queue to be halted. After the congestion at the one priority queue has abated, a virtual channel resume message is sent to the other network devices.

Abstract: A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective.

Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.

Abstract: A channel-select decimation filter capable of operating in multiple bandwidth modes includes a first low pass filter stage, a variable gain stage, a subtraction module a second low pass filter stage and a down-sampling module. The first low pass filter stage includes a first programmable delay module for filtering input signals to produce first low pass filtered signals. The variable gain stage applies a programmable gain to the input signals to produce gained input signals. The subtraction module subtracts the first low pass filtered signals from the gain input signals to produce first stage signals. The second low pass filter stage includes a second programmable delay module for filtering the first stage signals to produce channel-selected signals. The first programmable delay module, second programmable delay module and programmable gain are programmed to implement one of the multiple bandwidth modes.

Abstract: An IP network includes a central entity and at least one customer premises equipment (CPE) device. The central entity generates a program clock reference (PCR) clock and provides audio-visual packets to a CPE based on the PCR clock. The CPE sets a first clock based on the PCR clock for decoding operations. The CPE sets a second clock that is independent from the first clock for audio and video output operations. For example, the CPE can process the audio-visual packets using the second clock.

Abstract: A method for adjusting a DC offset slice point in an RF receiver is provided and may comprise estimating DC offset using a combination of fast tracking of an input signal and slow tracking of an input signal. If both are used, the fast tracking may be executed prior to executing the slow tracking. The fast tracking may acquire synchronizing signals transmitted before a payload. Additionally, noise tolerance may be increased in the fast tracking and the slow tracking by using tracking envelopes. The fast tracking may average acquisition envelopes and tracking envelopes using a fast tracking weighting factor to a sum of the acquisition envelopes and a slow tracking weighting factor to a sum of the tracking envelopes. Additionally, the slow tracking may average the tracking envelopes.

Abstract: A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a Printed Circuit Board (PCB) or the communication ASIC to another communication ASIC. The high-speed bit stream interface includes a plurality of signal conditioning circuits. The signal conditioning circuits service each of an RX path and a TX path and include a limiting amplifier and a clock and data recovery circuit. The signal conditioning circuit may also include an equalizer and/or an output pre-emphasis circuit. The clock and data recovery circuit has an adjustable Phase Locked Loop (PLL) bandwidth that is set to correspond to a jitter bandwidth of a serviced high-speed bit stream.

Abstract: In a high-fidelity digital modulator, a mapper is provided to minimize quantization noise, jitter, and cross-talk between multiple digital-to-analog or analog-to-digital converters. The mapper receives a quantized level from a quantizer and maps the quantized level to an output sequence. The mapper includes a table defining multiple sequences corresponding to each quantized level. Each sequence includes two or more symbols, having one of multiple values. The mapper also includes a generator that selects one of the multiple sequences as the output sequence. The last symbol of a first output sequence is equal to the first symbol of the next output sequence and so on. The generator selects the output sequence by alternating between a first and a second sequence for each quantized level received. The generator selects the output sequence by alternating between sequences having a positive and a negative common mode energy for each odd valued quantized level received.

Abstract: Systems and methods for demodulating a plurality of contiguous channels contained within a bandlimited portion of a radio-frequency (RF) input signal are provided. In an embodiment, the bandlimited portion of the RF input signal is down-converted to baseband. After down-conversion, the bandlimited portion overlaps at baseband with a mirror image of the bandlimited portion. The plurality of contiguous channels within the down-converted signal similarly overlap at baseband and subsequently occupy a bandwidth substantially equal to half that required before down-converting. Image rejection is performed in the digital domain to recover each of the plurality of overlapping channels.

Abstract: In a RF communications system, aspects for single weight antenna system for HSDPA may comprise receiving HSDPA signals via a plurality of receive antennas and individually adjusting a phase of a portion of the received HSDPA signals via a single weight. The phase adjusted portion of the received HSDPA signals may be combined with at least one of the received HSDPA signals to generate combined HSDPA signals. At least one control signal may control the adjusting of the phase of the received HSDPA signals. Discrete phases may be communicated to adjust the phase of the portion of the received HSDPA signals, where the plurality of the discrete phases may range from zero radians to substantially 2? radians. Phase shift channel estimates may be generated during the identified time to determine the discrete phase. A desired phase may be generated from the phase shift channel estimates, and the single weight may be generated from the desired phase.

Abstract: Methods, systems and computer program products to maintain cache coherency, in a System On Chip (SOC) which is part of a distributed shared memory system are described. A local SOC unit that includes a local controller and an on-chip memory is provided. In response to receiving a request from a remote controller of a remote SOC to access a memory location, the local controller determines whether the local SOC has exclusive ownership of the requested memory location, sends data from the memory location if the local SOC has exclusive ownership of the memory location and stores an entry in the on-chip memory that identifies the remote SOC as having requested data from the memory location. The entry specifies whether the request from the remote SOC is for exclusive ownership of the memory location. The entry also includes a field that identifies the remote SOC as the requester. The requested memory location may be external or internal to the local SOC unit.

Abstract: An RF integrated circuit (IC) includes a processing module that determines a selected one of the plurality of power modes based on current use characteristics of at least one application, and generates a power mode signal based on the selected one of the plurality of power modes. An on-chip power management circuit receives the power mode signal and generates a plurality of power supply signals based on the power mode signal.

Abstract: A device includes an on-chip gyrating circuit that generates a motion parameter based on motion of the device. An RF transceiver generates an outbound RF signal from an outbound symbol stream, transmits the outbound RF signal to a remote station of a wireless network, and generates an inbound symbol stream from an inbound RF signal received from the at least one remote station. A processing module is coupled to process the motion parameter to produce motion data, to convert outbound data into the outbound symbol stream, and to convert the inbound symbol stream into inbound data, wherein the outbound data includes the motion data.

Abstract: Systems and methods for demodulating a plurality of contiguous channels contained within a bandlimited portion of a radio-frequency (RF) input signal are provided. In an embodiment, the bandlimited portion of the RF input signal is down-converted to baseband. After down-conversion, the bandlimited portion overlaps at baseband with a mirror image of the bandlimited portion. The plurality of contiguous channels within the down-converted signal similarly overlap at baseband and subsequently occupy a bandwidth substantially equal to half that required before down-converting. Image rejection is performed in the digital domain to recover each of the plurality of overlapping channels.

Abstract: A system and method for using an alternative wire pair for communication on initial wire pair failure. Upon detection of a failure in a wire pair, an alternative set of one or more wire pairs can be used to support the Ethernet communication. In one embodiment, the alternative wire pairs are kept in a hot standby mode to enable almost instantaneous switching. In another embodiment, an enhanced autonegotiation process is used to automatically identify the alternative set of wire pairs that can support the Ethernet communication.

Abstract: An internet protocol telephone includes a substrate having an input and an output that are capable of being connected to the internet protocol (IP) network. A relay is disposed on the substrate and is connected between the input and the output of the substrate. The relay includes first and second native FETs that have a threshold voltage of approximately zero volts. Therefore, the relay is nominally turned-on, even when little or no voltage (or power) is applied to the IP telephone substrate, as during the discovery mode of IP telephone operation. During discovery mode, The IP phone is configured to be responsive to extended link pulses and block data packets that are associated with legacy devices. Data packets have a higher signal duration and are more continuous than extended link pulses. The IP phone includes a switchable ground that is connected to the gates of the native devices, and is controlled by a rectifier and filter circuit that are connected to the substrate input.

Abstract: Aspects of a method and system for a highly efficient power amplifier (PA) utilizing dynamic biasing and predistortion are presented. Aspects of the system may include a processor that enables computation of a value of a variable bias component of a bias current based on a bias slope value and an amplitude of an envelope input signal. The processor may enable computation of a value of the bias current based on the selected constant bias current component value and the variable bias current component value. A PA may enable generation of an output signal in response to a generated baseband signal by utilizing the bias current to amplify an amplifier input signal. The bias current may be generated based on the envelope input signal. A feedback signal may be generated based on the output signal, which may be used to predistort a subsequent baseband signal.

Abstract: Various embodiments are disclosed relating to sound enhancement for wireless audio devices. A technique may include determining one or more user-specific audio processing parameters, receiving an RF signal from a first wireless device, demodulating the received RF signal to obtain an audio signal, processing the audio signal based on the one or more user-specific audio processing parameters to generate a user-specific audio signal. The user-specific audio processing parameters may be based on user preferences, or may, for example be based on a user auditory profile or other information to allow a received audio signal to be processed to at least partially compensate for a user's specific hearing impairment.