Abstract: Aspects for measuring receiver mixer IQ mismatch in a transceiver are described. The measuring includes providing a training signal for a receiver mixer, the training signal having periodic, uncorrelated I and Q signals. A phase mismatch in the receiver mixer is determined from IQ correlation over a unit period. A gain mismatch in the receiver mixer is determined from a power estimate of both I and Q signal for the unit period.

Abstract: A low efficiency integrated circuit (IC) antenna includes an antenna element and a transmission line. The antenna element is on a first metal layer of a die and has a length less than approximately one-tenth of a wavelength or greater than one-and-one-half times the wavelength for a frequency band of approximately 55 GHz to 64 GHz. The transmission line is on the die and is electrically coupled to feed points of the antenna element.

Abstract: The invention enables a reversing IQ polarity in a bandpass filter so that the bandpass filter can filter signals with high side or low side injection.

Abstract: A clock circuit includes a waveform generator, a comparison module, and a clock signal module. The waveform generator is coupled to generate a waveform based on a reference oscillation. The comparison module is coupled to compare the waveform with a plurality of references to produce a plurality of waveform comparisons. The clock signal module is coupled to generate a clock signal from the plurality of waveform comparisons.

Abstract: Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.

Abstract: Certain aspects of a method and system for transparent TCP offload with a user space library are disclosed. Aspects of a method may include collecting TCP segments in a network interface card (NIC) without transferring state information to a host system. When an event occurs that terminates the collection of TCP segments, a single aggregated TCP segment based on the collected TCP segments may be generated. The aggregated TCP segment may be posted directly to a user space library, bypassing kernel processing of the aggregated TCP segment.

Abstract: A balun that includes a first conductor, a second conductor, and a third conductor. The first conductor has a first length. The first conductor also has a first end connected to a first balanced power amplifier output port. The second conductor has substantially the same first length. The second conductor also includes a first end connected to a second balanced power amplifier output port and a second end connected to a second end of the first conductor. The third conductor has substantially the same first length. The third conductor has a first end connected to an antenna port and a second end connected to a ground potential.

Abstract: An Internet infrastructure with network devices and end point devices containing service module manager and service modules supports packet routing and vectoring based on payload comparison with spatially related templates. The network device supports packet content analysis on arriving packet, consists of a plurality of packet switched interface circuitries, user interface circuitry, local storage comprising the service module manager software and a plurality of local service modules, and processing circuitry communicatively coupled to each of the packet switched interfaces, local storage and user interface circuit. The service module manager contains, for comparisons, header templates, spatially related payload trigger templates and spatially related payload supplemental templates. The spatially related templates attempt to identify a target data with certainty. The processing circuitry takes one or more actions on the packet of target data, by applying selected service modules.

Abstract: A system and method for detecting the presence and location of pull-down fields in a video field stream. Various aspects of the present invention may comprise method steps and circuit structure for generating an array of variance indications, each of which represents a degree of variance between two video fields in the video field stream. Various aspects may comprise comparing the array of variance indications to a pattern to detect a pull-down field in the video field stream. Various aspects may comprise comparing corresponding portions of video fields and generating a histogram of differences between the corresponding portions. Various aspects may comprise generating an indication of variance of the histogram and analyzing the indication of variance. Various aspects may comprise analyzing an array of such indications of variance and may comprise comparing the array of such indications to a pattern or plurality of patterns.

Abstract: Methods for assembling a die-down array integrated circuit (IC) device packages with enhanced thermal, electrical, and input/output properties are presented. The method includes coupling a first surface of a substrate to a first surface of a heat spreader, mounting a first surface of an IC die to the first surface of the heat spreader within a central cavity of the substrate, coupling a plurality of bond pads on a second surface of the IC die to corresponding bond pads on a second surface of the substrate with a plurality of wire bonds, and coupling a first surface of an interposer to the second surface of said IC die. A central opening is open at the first surface of the substrate and the second surface of the substrate. The central opening overlaps the central cavity formed in the first surface of the heat spreader. A plurality of electrically conductive bumps on the second surface of the IC die are coupled to corresponding bond pads on the first surface of said interposer.

Abstract: A mixer for a radio transceiver includes a commutating mixer switch having a first differential input port coupled to a DC offset cancellation path. The first differential input port of the mixer switch includes a first terminal coupled to a first end of a first resistor and a second terminal coupled to a first end of a second resistor. Second ends of the first and second resistors are configured to receive a differential input signal. The DC offset cancellation path may provide a resistively coupled DC calibration signal for reducing the magnitude of DC offsets that may be present at the input of the mixer switch. The concept can be used for either image or non-image reject mixers.

Abstract: A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency.

Abstract: A disclosed exemplary embodiment is a phase locked loop comprising a main charge pump driven by a phase error signal, and providing a first input to a loop filter. An auxiliary charge pump driven by the phase error signal feeds a second input of the loop filter. The loop filter can be an active loop filter comprising an operational amplifier and a feedback RC network. The first input of the active loop filter can be an inverting input of the operational amplifier and the second input can be a non-inverting input of the operational amplifier. An on-chip stabilizing capacitor fed by the auxiliary charge pump and coupled to the second input of the loop filter is significantly smaller than the conventional stabilizing capacitors. The loop filter outputs a regulating voltage for regulating the oscillation frequency of a voltage controlled oscillator in the phase locked loop.

Abstract: Digitally controlled phase interpolator circuit. A phase selection control word undergoes decoding to generate a switch control word. The phase selection control word includes 2 quadrant indicating bits and phase interpolating bits for a 4 clock scheme (e.g., 4 clocks having phases 0°, 90°, 180°, and 270°). Such a phase selection control word could includes 3 sector indicating bits and phase interpolating bits for an 8 clock scheme (e.g., 8 clocks having phases 0°, 45°, 90°, 135°, 180°, 225°, 270°, and 315°). The gates of a number of differential pairs of transistors receive the various clock signals. A number of switching circuits direct current from corresponding current sources/supplies to coupled sources of the differential pairs of transistors, and an output clock is taken from coupled drains of the differential pairs of transistors. One or more current sources/supplies can be implemented to provide continuous current (e.g., in an always on manner) to the differential pairs of transistors.

Abstract: Integrated circuit dies, integrated circuit packages, and methods for assembling the same are provided. An integrated circuit package includes a substrate, an integrated circuit die, a plurality of electrically conductive bump interconnects, an electrically conductive material, and one or more bond wires. The electrically conductive bump interconnects mount a first surface of the die to a first surface of the substrate. The electrically conductive material forms an electrically conductive path from a first electrically conductive feature on the first surface of the die to a second electrically conductive feature on the second surface of the die. The bond wire couples the second electrically conductive feature to a third electrically conductive feature on the first surface of the substrate. In this manner, flip chip bump interconnects and bond wires are available to interface signals of the die with the substrate.

Abstract: A disclosed embodiment is a programmable memory cell having improved IV characteristics comprising a thick oxide spacer transistor interposed between a programmable thin oxide antifuse and a thick oxide access transistor. The spacer transistor separates a rupture site formed during programming the programmable antifuse from the access transistor, so as to result in the improved IV characteristics. The programmable antifuse is proximate to one side of the spacer transistor, while the access transistor is proximate to an opposite side of the spacer transistor. The source region of the access transistor is coupled to ground, and the drain region of the access transistor also serves as the source region of the spacer transistor. The access transistor is coupled to a row line, while the spacer transistor and the programmable antifuse are coupled to a column line. The rupture site is formed during programming by applying a programming voltage to the programmable antifuse.

Abstract: A device includes a plurality of integrated circuits (ICs). An IC includes a millimeter wave (MMW) transceiver and a controller. The controller is operably coupled to the MMW transceiver and to: identify one or more other devices that have an intra-device MMW communication coverage area that overlaps with the intra-device MMW communication coverage area of the device. The controller also determines a first frequency range for use by the one or more other devices and the device for controlled radiation pattern intra-device MMW communications. The controller also coordinates allocation of a frequency use pattern to the one or more other devices and to the device for use for non-controlled radiation pattern intra-device MMW communications.

Abstract: An integrated circuit (IC) includes a plurality of circuit modules, a millimeter wave (MMW) transceiver coupled to a configurable antenna structure, and a controller. The controller is operably coupled to: receive parameters for an inter-chip MMW communication link; interpret the parameters to determine a range of operational requirements; compare the range of operational requirements with configuration options of the MMW transceiver and the configurable antenna structure; and, when one of the configuration options compares favorably with the range of operational requirements, generate a configuration signal to instruct the MMW transceiver and the configurable antenna structure to implement the one of the configuration options.

Abstract: Cross-coupled low noise amplifier for cellular applications. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. In one embodiment, this design is particularly adaptable to cellular telephone applications. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A very high output impedance is provided by using two transistors (implemented in a triple well configuration) with resistive source degeneration. A higher than typical power supply voltage can be employed (if desired) to accommodate the voltage drops of the resistors and transistors.

Abstract: A radio transceiver device includes circuitry for radiating electromagnetic signals at a very high radio frequency both through space, as well as through wave guides that are formed within a substrate material. In one embodiment, the substrate comprises a dielectric substrate formed within a board, for example, a printed circuit board. In another embodiment of the invention, the wave guide is formed within a die of an integrated circuit radio transceiver. A plurality of transceivers with different functionality is defined. Substrate transceivers are operable to transmit through the wave guides, while local transceivers are operable to produce very short range wireless transmissions through space. A third and final transceiver is a typical wireless transceiver for communication with remote (non-local to the device) transceivers.