Abstract: An RFID reader is operable to receive an inbound RF signal from an RFID tag during transmission of an outbound RF signal. The inbound RF signal from the RFID tag is a modulated, backscattered signal that includes a desired RF signal component and a blocking RF signal component. The receiver section of the RFID reader includes a preprocessing module operable to process the inbound RF signal. The preprocessing module includes an adjustable attenuation module operable to attenuate the inbound RF signal to produce an attenuated inbound RF signal and an active blocking rejection module operable to increase a ratio of the desired RF signal component to blocking RF signal component in the attenuated inbound RF signal.

Abstract: A near field communication front-end includes an up conversion module, a plurality of coils, and a down conversion module. The up conversion module is coupled to convert an outbound symbol stream into a plurality of outbound signals based on a frequency-space encoding scheme. The plurality of coils is coupled to electromagnetically transmit the plurality of outbound signals and to electromagnetically receive a plurality of inbound signals in accordance with the frequency-space encoding scheme. The down conversion module is coupled to convert the plurality of inbound signals into an inbound symbol stream in accordance with the frequency-space encoding scheme.

Abstract: A multi-mode RFID tag includes a power generating and signal detection module, a baseband processing module, a transmit section, a configurable coupling circuit, and an antenna section. In near field mode, the configurable coupling circuit is operable to couple the transmit section to a coil or inductor in the configurable coupling circuit to transmit an outbound transmit signal using electromagnetic or inductive coupling to an RFID reader. In far field mode, the configurable coupling circuit is operable to couple the transmit section to the antenna section, and the multi-mode RFID tag then utilizes a back-scattering RF technology to transmit the outbound transmit signal to RFID readers.

Abstract: An integrated circuit includes an on-chip gyrating circuit that generates a motion parameter based on motion of the IC. An RF transceiver generates an outbound RF signal from outbound data and that generates inbound data from an inbound RF signal. A processing module processes the motion parameter, generates the outbound data, and receives the inbound data.

Abstract: Super block error correction code (ECC) adaptable to communication systems including hard disk drives (HDDs) and other memory storage devices. A means is presented by which a number of blocks of information can be organized, with a degree of ECC provided thereto, and transmitted via a signal into a communication channel. In some instances, the communication channel is coupled to a storage media as in the context of an HDD, and information is written to and read from the storage media via this communication channel (e.g., “read channel”). This means is particularly well suited to applications that provide large amounts of data via any one transmission (e.g., DVR/PVR (Digital/Personal Video Recorder)). A redundant block is generated using the information of each of a number of information blocks thereby provided extra ECC on a large portion of data, and that redundant block also undergoes ECC encoding.

Abstract: A dual-band input transceiver block is formed to operably receive one of a 2.4 GHz radio frequency signal or a 5.0 GHz radio frequency transceiver signal in a manner that minimizes duplication of circuitry and creates a combined circuit path for RF front end input stages for much of the input stage. More specifically, the embodiments of the present invention include separate amplification and mixing stages whose outputs are combined by a stabilized load with circuitry for removing a common mode feedback signal. As such, downstream components, such as amplifiers, filters, analog-to-digital converters, and other input path circuit elements, are not duplicated and may be used regardless of whether the dual-band transceiver is operating in a first or second frequency band. Operation is, in the described embodiment, only one frequency input at a time though the invention is not limited to such operation.

Abstract: Traditionally, system loads are placed in parallel with the battery. This simple topology wastes the available power if the USB power and/or wall adapter is present. Recent topologies have made some improvements by powering the load by the maximum available voltage. Thus, if a USB power source or wall adapter is present, the load is powered by them rather than the battery, thus improving the system efficiency. However, since the USB power and wall adapter power are current limited, if the load requires higher current than the current limited USB or adapter, then the entire system is powered at voltage of the battery. The present invention further improves the system efficiency by distinguishing the load and powering the constant power loads by the maximum voltage and placing the constant current loads in parallel with the battery.

Abstract: A wireless communication device includes an integrated circuit (IC) and an antenna system. The IC includes a processing module and a transceiver section. The processing module establishes a wireless communication protocol, converts outbound data into an outbound symbol stream, converts an inbound symbol stream into inbound data, and establishes operational parameters. The transceiver section converts an inbound RF signal into the inbound symbol stream and converts the outbound symbol stream into an outbound RF signal. The antenna system provides a plurality of antenna structures corresponding to the plurality of operational modes of the wireless communication device, wherein the antenna system provides one of the plurality of antenna structures in accordance with the operational parameters to transceive the inbound and outbound RF signals.

Abstract: An RFID reader is operable to receive an inbound RF signal during transmission of an outbound RF signal. The inbound RF signal may be a modulated, backscattered signal from a tag that has substantially the same frequency as the outbound RF signal or at a different frequency from the outbound RF signal. The receiver section of the RFID reader is operable to down convert the inbound RF signal by using a transmitter signal generated by the transmitter section to generate at least one local oscillation signal. The receiver section then processes and digitizes the down converted inbound RF signal to produce an encoded inbound signal.

Abstract: A radio transceiver device includes circuitry for radiating electromagnetic signals at a very high radio frequency both through space, as well as through wave guides that are formed within a substrate material. In one embodiment, the substrate comprises a dielectric substrate formed within a board, for example, a printed circuit board. In another embodiment of the invention, the wave guide is formed within a die of an integrated circuit radio transceiver. A plurality of transceivers with different functionality is defined. Substrate transceivers are operable to transmit through the wave guides, while local transceivers are operable to produce very short range wireless transmissions through space. A third and final transceiver is a typical wireless transceiver for communication with remote (non-local to the device) transceivers.

Abstract: A method for an antenna architecture that handles US band cellular and broadcast channels may be provided. The method may comprise receiving at a first radio frequency integrated circuit (RFIC) integrated within a mobile terminal, first signals via a first antenna, where the first signals comprise signals within a 1900 MHz band. The method may further comprise receiving at a second RFIC integrated within the mobile terminal, second signals via the first antenna, where the second signals comprise signals within at least one of a 1900 MHz band and a 850 MHz band and receiving at a third RFIC integrated within the mobile terminal, third signals via the first antenna, where the third signals comprise signals within a VHF/UHF broadcast band.

Abstract: Systems and methods that provide receive queue provisioning are provided. In one embodiment, a communications system may include, for example, a first queue pair (QP), a second QP, a general pool and a resource manager. The first QP may be associated with a first connection and with at least one of a first limit value and an out-of-order threshold. The first QP may include, for example, a first send queue (SQ). The second QP may be associated with a second connection and with a second limit value. The second QP may include, for example, a second SQ. The general pool may include, for example, a shared receive queue (SRQ) that is shared by the first QP and the second QP. The resource manager may provide, for example, provisioning for the SRQ and may manage the first limit value and the second limit value.

Abstract: Providing accelerated video processing in a communication device may comprise receiving video data from a video source on a chip, determining a first format for at least a portion of the received video data, and determining a second format of at least a remaining portion of the received video data. At least a portion of the received video data having the first format may be routed to a first device for processing and at least a remaining portion of the received video data having the second format may be routed to a second device for processing. The portion of the received video data with the first format may comprise RGB format, while the remaining portion of the received video data with the second format comprises YUV format. The received video data comprises images with alternating video formats, which are accordingly routed to the first or second device for processing.

Abstract: Methods and systems for processing a plurality of signals are disclosed herein. Aspects of the method may comprise amplifying an input signal. The amplified input signal may be bandpass filtered. Amplification of the input signal may be adjusted based on only narrowband received signal strength indication of the bandpass filtered amplified input signal. The amplified input signal may be downconverted and a blocker signal may be bandpass filtered from the amplified input signal. Signal strength of a desired signal from the amplified input signal may be measured. The amplification of the input signal may be adjusted utilizing a triple well (TW) NMOS transistor. A control signal may be generated based on the narrowband received signal strength indication of the bandpass filtered amplified input signal. The amplification of the input signal may be adjusted based on at least one of the generated control signals.

Abstract: An automatic polarity swap is implemented in a communications system. Two or more transceivers having differential inputs and outputs are coupled together through an interface, such as a backplane to form a communications system. In such a configuration, it is possible to cross-connect the differential data lines or signals at the interface, which will cause invalid data words to received at the second transceiver. Accordingly, the present invention includes an error check and correction module that detects invalid data words after parallel-to-serial conversion. More specifically, an error check determines if the parallel differential signal represents a valid data word. This can be done, for example, by storing and comparing valid data words in a memory such as RAM. If the received data word is valid, then no corrective action is taken.

Abstract: A system and method use an aligning device to align clock signals of two logic devices before data transfer between them. In this example, the aligning device aligns a clock signal of a sequencer with a clock signal of a storage device before the sequencer transfers data to the storage device. The aligning device includes a phase detector that receives a first reference clock signal, which is used to control the storage device, and a delayed signal, which is used to control the sequencer, and generates a comparison clock signal. The comparison clock signal is filtered before being used to control a phase of a second reference clock signal, which is related to the first reference clock signal. The phase controlled second clock signal is an aligning clock signal that is feed back to a delay device to produce one or more subsequent delay device clock signals that are aligned to the storage device clock or first reference clock signal.

Abstract: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

Abstract: Systems and method for processing v-chip data for an MPEG-2 decoder with personal video recording functionality are provided. In one example, a system that processes V-Chip data with personal video recording functionality may include a data transport engine and a video decoder. The video decoder may be coupled to the data transport engine and may be adapted to parse out V-Chip data.

Abstract: A system for mitigating impairment in a communication system includes a delay block, a signal level block, a moving average window block, an impulse noise detection block, and a combiner. The delay block receives and delays each chip of a plurality of chips in a spreading interval. The signal level block determines a signal level of each chip of the plurality of chips in the spreading interval. The moving average window block determines a composite signal level for a chip window corresponding to the chip. The impulse noise detection block receives the signal level, receives the composite signal level, and produces an erasure indication for each chip of the plurality of chips of the corresponding chip window. The combiner erases chips of the plurality of chips of the spreading interval based upon the erasure indication.

Abstract: In a Power over Ethernet (POE) system, a power source equipment (PSE) device configured to deliver power to one or more powered devices (PDs) over a plurality of Ethernet transmission lines. The PSE interface includes a multi-port transmission line connector capable connecting to multiple Ethernet transmission lines, and a power source equipment (PSE) controller module integrated with the multi-port transmission line connector. The PSE controller module is capable of high power operation beyond that specified by IEEE standard 802.3af™ for powered devices. More specifically, the PSE controller is configured to deliver over 15.4 Watts, and up to 36 Watts of power, to meet the needs of high powered devices such as IP Phones, and access points. Further, the PSE controllers can utilize, currently unused, class 4 of IEEE standard 802.3af™ to identify, initiate, and classify the high power operation mode.