Abstract: The present invention provides a method for determining nonlinear distortion of a transmitter. A test symbol sequence is transmitted from the transmitter under test as an analog output signal. The analog output signal is sampled to produce a first sequence which represents the test symbol sequence as distorted by a linear distortion sequence and a nonlinear distortion sequence. The test symbol sequence is filtered via an adaptive filter to produce a second sequence such that the second sequence is approximately equal to the test symbol sequence as distorted by the linear distortion sequence. The second sequence is subtracted from the first sequence to produce an output sequence substantially equal to the nonlinear distortion sequence.

Abstract: A power efficient and reduced electromagentic interference (EMI) emissions transmitter for unshielded twisted pair (UTP) data communication applications. Digital transmit data is converted to a current-mode differential signal analog waveform by a digital-to-analog converter (DAC). DAC line driver cells are adaptively configurable to operate in either a class-A or a class-B mode depending on the desired operational modality. Selection logic circuitry asserts command signals to individual line driver cells which operate the cells in either class-A or class-B, in operative response to a DAC control word. The same DAC control word adaptively configures the line driver cells to operate in accordance with at least two ethernet-type transmission standards. Numbers of line driver cells are adaptively disabled in operative response to a DAC control word, to conform the transmitter to differing transmission standards with differing voltage swing requirements.

Abstract: A high precision charge pump used in a phase-lock-loop incorporating a phase/frequency detector is designed and constructed to substantially eliminate the effects of DC offset and glitch errors on the charge pump output current. The high precision charge pump is constructed of parallel current paths each having a central node which is, in turn, connected to a feedback element. The feedback element defines a feedback current which is applied to the charge pump so as to maintain the two central nodes at an equi-potential level and to maintain the value of the pump-down current exactly equal to the value of the pump-up current output by the device.

Abstract: Digital signals provided by a repeater connected to a plurality of clients by unshielded twisted wire pairs, are converted to analog signals which become degraded during transmission through the wires. Clients convert the degraded analog signals to digital signals. Digital signal phases are coarsely adjusted to have assumed zero crossing times coincide in-time with a clock signal zero crossing. Signal polarity, and the polarity of any change, is determined at the assumed zero crossing times of the digital signals. Pre-cursor and post-cursor responses, resulting from signal degradation, are respectively inhibited by a feed forward and a decision feedback equalizer. The time duration of post-cursor response is further inhibited by a high pass filter and a tail canceller. Phase adjustments are made, after response inhibition, by determining the polarity, and the polarity of any change, at the assumed zero crossing times.

Abstract: The output of each cell in an A-D converter on an IC chip is dependent upon the relative values of an input voltage and an individual one of progressive fractions of a reference voltage respectively introduced to the branches in a differential amplifier. To minimize output errors from cell mismatches, first and second sets of averaging impedances, preferably resistors, are respectively connected between the output terminals in the first branches, and the output terminals in the second branches, in successive pairs of cells. The impedances have relatively low values, particularly compared to the impedances of current sources connected to the branch output terminals. First and second resistive strips on the chip may be tapped at progressive positions to respectively define the impedances in the first and second sets. One end of each strip may be connected to the opposite end of the other strip to define a closed impedance loop for minimizing averaging errors at the strip ends.

Abstract: A network switch for network communications includes a first data port interface which supports a plurality of data ports which transmit and receive data at a first data rate. A second data port interface is provided; the second data port interface supports a plurality of data ports transmitting and receiving data at a second data rate. A CPU interface is provided, with the CPU interface configured to communicate with a CPU. An internal memory is provided, and communicates with the first data port interface and the second data port interface. A memory management unit is provided, and includes an external memory interface for communicating data from at least one of the first data port interface and the second data port interface and an external memory. A communication channel is provided, with the communication channel communicating data and messaging information between the at least one first data port interface, the at least one second data port interface, the internal memory, and the memory management unit.

Abstract: Digital data signals at a variable input frequency are converted by a numerically controlled oscillator and an interpolator to a signal at a fixed output sampling frequency. The conversion of the variable input frequency to the fixed output sampling frequency may be by a factor other than an integer. The interpolated digital data signals at the fixed output sampling frequency are then modulated into a pair of trigonometric signals at a programmable carrier frequency, one signal having a cosine function and the other signal having a sine function. The modulated signals at the fixed output sampling frequency are then combined to create a modulated signal at a carrier frequency determined by the frequency of the sine and cosine signals. The modulated signal is sampled at the fixed output sampling frequency and converted to a corresponding analog signal using a digital-to-analog converter.

Abstract: A network interface is presented that receives packet data from a shared medium and accomplishes the signal processing required to convert the data packet to host computer formatted data separately from receiving the data packet. The network interface receives the data packet, converts the analog signal to a digitized signal, and stores the resulting sample packet in a storage queue. An off-line processor, which may be the host computer itself, performs the signal processing required to interpret the sample packet. In transmission, the off-line process converts host-formatted data to a digitized version of a transmission data packet and stores that in a transmission queue. A transmitter converts the transmission data packet format and transmits the data to the shared medium.

Abstract: A filter apparatus includes a housing having a first body portion and a second body portion which mate together to enclose an accessible inner portion of the housing. Filtering elements disposed within the inner portion filter signals transmitted through a pair of signal carriers which pass through the inner portion. A pair of guides disposed within the inner portion maintain the electrical conductors in a predetermined positional relationship with certain of the filter elements. The guides are each actuated by placing a signal carrier against a predetermined portion of the guide and applying manual pressure against the signal carriers to cause the signal carrier to be pressed into a the predetermined positional relationship. Certain embodiments include contact push posts which pierce an insulating layer of a corresponding signal carrier to make electrical contact with the signal carrier. Other embodiments include a cutting element to sever the signal carriers to implement a four-terminal filter.

Abstract: The present invention is directed to a system and method of sending packets between ports on trunked network switches. The method includes providing a first switch having a plurality of communication ports thereupon, and providing a second switch having a plurality of communication ports thereupon. A trunk connection is provided between the first switch and the second switch, with the trunk connection including at least two of the plurality of ports from the first switch being connected to at least two of the plurality of ports of the second switch. A rules table is provided, defining a set of rules identifying which port of the trunk connection will be used for communication. A packet is sent from a first port on the first switch to a second port on the second switch. The packet is received at an ingress submodule of the first switch, and a lookup is performed on one of a source address and a destination address of the packet based upon a lookup table provided in the ingress submodule.

Abstract: An analog-to-digital converter (ADC) formed on an integrated circuit chip from a plurality of cells includes a differential amplifier having first and second branches. The branches in each cell respectively have first and second transistors respectively responsive to an input voltage and an individual one of progressive fractions of a reference voltage. The relative outputs from the branches for each cell are dependent upon the relative values of the two voltages introduced to the cell. To minimize cell mismatches and the effects of these mismatches on cell outputs, first and second sets of averaging impedances, preferably resistors, are respectively connected between the output terminals of the first branch transistors, and between the output terminals of the second branch transistors, in successive pairs of cells.

Abstract: Each packet normally consists of a preamble, start-of-frame delimiter and data. The preamble has nibbles each having a particular format. A header substituted for preamble nibbles by an individual one of the originating devices in a plurality, and an individual one of the ports in such originating device, indicates such originating device and such port. Such port in such originating device sends such modified packet to others of the originating devices and to an observing station. The header format is such that the last nibble in the header and the remaining preamble portion will not be confused with any two (2) nibbles in the header. A particular one of the originating devices indicated in the data converts the header back to the preamble format and transmits the converted packet to a receiving station. The observing station records the individual originating device, and the individual port in such device, indicated in the header.

Abstract: A modem and method for operating same. A receiver circuit of the modem is coupled to receive a continuous analog signal from a communication channel. This analog signal includes both packet and idle information. The receiver circuit monitors the analog signal to detect the presence of idle information. Upon detecting idle information, the receiver circuit enters a standby mode in which the processing requirements of the receiver circuit are reduced. A burst mode protocol is also provided, in which packets of digital information are modulated by a transmitter circuit of the modem, thereby converting the packets of digital information into analog signal bursts of discrete duration. These analog signal bursts are transmitted from the transmitter circuit to a telephone line. However, the transmitter circuit does not generate any signals between the analog signal bursts. A receiver circuit monitors the telephone line to detect the analog signal bursts.

Abstract: The output of each cell in an A-D converter on an IC chip is dependent upon the relative values of an input voltage and an individual one of progressive fractions of a reference voltage respectively introduced to the branches in a differential amplifier. To minimize output errors from cell mismatches, first and second sets of averaging impedances, preferably resistors, are respectively connected between the output terminals in the first branches, and the output terminals in the second branches, in successive pairs of cells. The impedances have relatively low values, particularly compared to the impedances of current sources connected to the branch output terminals. First and second resistive strips on the chip may be tapped at progressive positions to respectively define the impedances in the first and second sets. One end of each strip may be connected to the opposite end of the other strip to define a closed impedance loop for minimizing averaging errors at the strip ends.

Abstract: An analog-to-digital converter (ADC) formed on an integrated circuit chip from a plurality of cells includes a differential amplifier having first and second branches. The branches in each cell respectively have first and second transistors respectively responsive to an input voltage and an individual one of progressive fractions of a reference voltage. The relative outputs from the branches for each cell are dependent upon the relative values of the two voltages introduced to the cell. To minimize cell mismatches and the effects of these mismatches on cell outputs, first and second sets of averaging impedances, preferably resistors, are respectively connected between the output terminals of the first branch transistors, and between the output terminals of the second branch transistors, in successive pairs of cells.

Abstract: Analog signals encoded with quadrature amplitude modulation (QAM) pass through a coaxial cable at a particular baud rate. These signals have a carrier frequency individual to the TV station being received. They are mixed with signals from a variable frequency oscillator to produce signals at a particular intermediate frequency (IF). An analog-digital converter (ADC) converts the IF signals to corresponding digital signals which are demodulated to produce two digital signals having a quadrature phase relationship. After being filtered and derotated, the digital signals pass to a symmetrical equalizer including a feed forward equalizer (FFE) and a decision feedback equalizer (DFE) connected to the FFE in a feedback relationship. The DFE may include a slicer providing amplitude approximations of increasing sensitivity at progressive times. Additional slicers in the equalizer combine the FFE and DFE outputs to provide the output data without any of the coaxial cable noise or distortions.

Abstract: A direct broadcast satellite sends subscribers signals received from an earth-station transmitter and typically having a 10 MHz bandwidth, 6 MHz for an analog video station and 4 MHz for up to 24 digital audio stations. When a subscriber selects one of the audio stations, an FM demodulator recovers the 10 MHz signal; a variable gain amplifier amplifies the received signal; and an A/D converter digitizes the amplified signal at (e.g.) 24.576 MHz. A digital synthesizer produces trigonometric functions (sine, cosine) at (e.g.) 24.576 MHz, and mixers downconvert the signals to baseband. The sampling frequency is then reduced to 256 KHz, twice the digital audio signal baud rate. In response to the 256 KHz signals, a first servo varies a VCO frequency to obtain a regulation by the A/D converter of the digitizing frequency at 24.576 MHz and another servo regulates the frequency of the trigonometric functions.

Abstract: Four (4) unshielded twisted pairs of wires connect a hub and a computer in an Ethernet system: one (1) pair for transmission only, another for reception only and the other two (2) for transmission and reception. The signals in the wires are in packets each having timing signals defining a preamble and thereafter having digital signals representing information as by individual ones of three (3) amplitude levels. The signals received at the computer are provided with an automatic gain control (AGC) and then with digital conversions at a particular rate. A control loop operative upon the digital conversions regulates the AGC gain at a particular value. An equalizer operative only during the occurrence of the digital signals in each packet selects an individual one of the three (3) amplitude levels closest to the amplitude of each digital conversion at the time assumed to constitute the conversion peak.

Abstract: Communications link using the ionized trail of a meteor entering the atmosphere at an altitude of approximately 100 kilometers as reflectors to relay radio frequency energy beyond the horizon using a retrodirective adaptive loop. The retrodirective adaptive loop includes a plurality of conjugate antenna elements, with each conjugate antenna element having a spatial servo-loop circuit. At least two stations having antennas with conjugate elements are required for generating a retrodirective oscillating or phase locked loop.

Abstract: A digital multiplexer accommodates a large number of information signal channels per digital transmission channel through use of an improved statistical coding technique and successive frame transmission, the technique being based on channel designation and channel code permatation. The information signals are encoded into transmission code words, the code words are ordered into successive transmission frames and the transmission frames are sent over a communications highway to a remote location.