Patents Assigned to Compaq Computer Corporation
  • Patent number: 7016971
    Abstract: A distributed computer system includes links and routing devices coupled between the links and routing frames between the links. Each of the routing devices includes a congestion control mechanism for detecting congestion at the routing device and responding to detected congestion by gradually reducing an injection rate of frames routed from the routing device.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: March 21, 2006
    Assignees: Hewlett-Packard Company, IBM Corporation, Compaq Computer Corporation, Adaptec, Inc.
    Inventors: Renato J. Recio, David J. Garcia, Michael R. Krause, Patricia A. Thaler, John C. Krause
  • Patent number: 6697954
    Abstract: Context or other functional settings are protected during a power up reset sequence in a computer system, without the need to save such context or settings in static memory. A signal, representing a change in the context, is delayed beyond a critical period of indeterminacy resulting from a power up sequence. Reliable signals, set before an application of power, negotiate the delay prior to an assertion of a power up reset signal. The context or settings are preserved by bypassing the reset signal. Unreliable signals, set during an application of power, are held by the delay to allow the reset signal to clear or initialize the context or settings. The reset function operates without prior knowledge, for example as saved in static memory, of the state of the context.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: February 24, 2004
    Assignee: Compaq Computer Corporation
    Inventor: Kenneth W. Stufflebeam
  • Patent number: 6690389
    Abstract: A method for correcting the tone of an input image for display on a given output device includes the steps of generating a dither template having advantageously more threshold levels than color levels of the input image. A tone characteristic for the output device is determined by comparing actual output pixel values against expected image pixel values. The tone characteristic curve is scaled to correspond with the number of threshold values in the dither template, and is stored in a look-up table having a number of entries corresponding to the number of threshold values in the dither template. The dither template values are fed to the look-up table, which provides an adjusted dither template which reflects the tone correction required to provide an output image free of tone distortion. The adjusted dither template is then normalized in accordance with characteristics of the input and output display devices.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: February 10, 2004
    Assignee: Compaq Computer Corporation
    Inventor: Robert A. Ulichney
  • Patent number: 6658506
    Abstract: A system for accurately determining Elmore delays in DCVSL structures is disclosed. The system uses circuit simulation to determine models for Elmore delays through devices within specific circuit structures. The circuit structures include DCVSL circuits to accurately model performance of devices with such a structure. The system also determines discharge characteristics for DCVSL circuits using simulation. In order to determine Elmore delays, the system analyzes a circuit representation to locate DCVSL structures. The discharge characteristics and models are used to determine Elmore delays for each structure located.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: December 2, 2003
    Assignee: Compaq Computer Corporation
    Inventors: Nevine Nassif, James Arthur Farrell, Dale Hayward Hall, Gill Watt
  • Patent number: 6603414
    Abstract: Groups of characters, including alpha, numeric, or other symbols, are represented in a binary form by one or more first or second code representations for each character. The first code representation will have a value indicative of a predetermined number of second code representations, wherein each of the second code representations identify a corresponding one of the characters.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: August 5, 2003
    Assignee: Compaq Computer Corporation
    Inventor: L. John Postas
  • Patent number: 6591372
    Abstract: The length of the phase lock feedback path of the phase lock loop chip (PLL chip) is adjusted so that the timing of clock pulses at computer chips is measured relative to the arrival time of a clock pulse at the computer board clock pin. This adjustment of the length of the phase lock loop accounts for the length of the trace from the computer board clock pin to the PLL clock input pin. This adjustment of the length of the phase lock loop removes uncertainty between vendors in the arrival time of clock pulses at the computer chips, relative to arrival time of clock pulses at the computer board clock pin. A system designer then has control of the arrival time of a pulse at a computer chip clock pin by adjustment of the arrival time of the clock pulse at the computer board clock pin, and no variation is introduced between vendors who adopt the invention in their design of computer boards.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: July 8, 2003
    Assignee: Compaq Computer Corporation
    Inventor: John Nerl
  • Publication number: 20030120775
    Abstract: A method and apparatus for sending notifications to a user of a network management system concerning the status of a particular network device such as an SNMP manageable device. The. notification rules are preconfigured and assigned to a corresponding notification action such as an e-mail notification. The user may specify a variety of information to be included in the e-mail notification including the URL address of the network device. Once the notification actions are configured, the communications network is monitored by a management console and the state of each device is compared to the notification rules. When a notification rule is satisfied, the pre-configured e-mail notification is sent to the user. The URL for the device which sent the e-mail notification is placed in the body of the e-mail message so that the user, while reading the e-mail with an HTTP compliant URL-aware mail tool, may click on the URL to access the web-based management system for the device.
    Type: Application
    Filed: February 7, 2003
    Publication date: June 26, 2003
    Applicant: COMPAQ COMPUTER CORPORATION
    Inventor: Justin E. York
  • Patent number: 6571111
    Abstract: In a compunctions network of low power devices, power consumption of the devices is reduced by periodically receiving a timing signal in each device from a transmitter external to the network. A real-time clock in each of the devices is synchronized to the periodically received timing signal to determine a synchronized timing interval. Transmitting and receiving of data between the devices is initiated during an awake period of the synchronized timing interval. Power consumption is reduced in each of the devices during a sleep period of the synchronized timing interval, the sleep period being significantly longer than the awake period.
    Type: Grant
    Filed: August 5, 1998
    Date of Patent: May 27, 2003
    Assignee: Compaq Computer Corporation
    Inventors: Robert Nelson Mayo, William Riis Hamburgen
  • Patent number: 6567774
    Abstract: A system and method for facilitating configuration of client stations in a computer network. A virtual disk representing configuration information is formed and selectively exported via the network to the client stations. The stations are configured with the configuration information identified by the virtual disk. Snapshot disks representing modifications to the configuration information required at the client stations can also be created, transported across the computer network, and used to upgrade client station.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: May 20, 2003
    Assignee: Compaq Computer Corporation
    Inventors: Edward K. Lee, Chandramohan A. Thekkath
  • Patent number: 6563595
    Abstract: A SCSI device resides and communicates on the SCSI bus without that device being assigned a SCSI address or corresponding SCSI ID. The driver software on the host computer directs the SCSI initiator device to select itself as its target, so the initiator then only asserts one bit of the eight bit SCSI data bus. The SCSI device determines when a SELECTION phase is under way and then determines if only one bit has been asserted on the SCSI data bus. The SCSI device then responds to the initiator as being the target device, thus completing the SELECTION phase. The initiator and the SCSI device can then communicate as a normal initiator and target would during information transfer stages of the SCSI standard. This is all done without the SCSI device occupying a normal SCSI address.
    Type: Grant
    Filed: October 2, 1992
    Date of Patent: May 13, 2003
    Assignee: Compaq Computer Corporation
    Inventor: William C. Galloway
  • Patent number: 6559843
    Abstract: Volumetric data are rendered onto an image plane by first organizing the volumetric data into a plurality of blocks of data, each block of data including a plurality of voxels arranged in cubic structure. The blocks of volumetric data are stored in, and processed by a processor element array of a massively data-parallel computer system. For any viewing angle, a plurality of parallel rays are cast through the image plane to traverse the volumetric data. In a ray collection phase, each processor element, in parallel with the other processor elements, determines which segments of the rays interpolate voxels of its associated block of data. In a segment value combination phase, each processor element, in parallel with the other processor elements, determines the integrated contribution of the interpolated voxels on the path of the ray segments traversing its block of data.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: May 6, 2003
    Assignee: Compaq Computer Corporation
    Inventor: William M Hsu
  • Patent number: 6556708
    Abstract: A technique for classifying objects within an image is disclosed. In one embodiment, the technique is realized by identifying a portion of an image, and then filtering the portion of the image based upon an object characteristic and a reference within the image. The image can be a representation of a plurality of pixels, wherein at least some of the plurality of pixels are enabled to represent the identified portion of the image. The reference can be one of a reference plane or a terrain within the image.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: April 29, 2003
    Assignee: Compaq Computer Corporation
    Inventors: Andrew Dean Christian, Brian Lyndall Avery
  • Patent number: 6557115
    Abstract: The real-time test controller maintains a failure database containing a history of past failures for devices under test and selectively sorts the history for the device to be tested. The diagnostic testing sequence is then rearranged with tests having higher failure rates being conducted first. If faults are detected, a message is provided to the operator and the failure database is either manually or automatically updated with the latest fault information. In this manner, a continuously updated history of faults is maintained and the most efficient testing sequence is followed, resulting in significant time and cost savings.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: April 29, 2003
    Assignee: Compaq Computer Corporation
    Inventors: Russel L. Gillenwater, Philip J. Brisky, Kenneth G. Keels
  • Patent number: 6557014
    Abstract: A method and apparatus introduces the creation and use of two record addressing functions. One function “computeRID” assigns identifiers to records, and the other function “lookupRID” performs the related task of locating a record given its identifier.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: April 29, 2003
    Assignee: Compaq Computer Corporation
    Inventors: Pedro Cellis, Michael Heytens, Mark Melton
  • Publication number: 20030077586
    Abstract: Computer based apparatus and method automates gene prediction in a subject genomic sequence. A plurality of expert systems provide preliminary or intermediate gene predictions. A Bayesian network combiner combines the intermediate gene predictions and forms a final gene prediction. The final gene prediction accounts for dependencies between individual expert systems and dependencies between adjacent parts of the subject genomic sequence.
    Type: Application
    Filed: August 30, 2001
    Publication date: April 24, 2003
    Applicant: Compaq Computer Corporation
    Inventors: Vladimir Pavlovic, Simon Kasif, Ashutosh Garg
  • Patent number: 6549930
    Abstract: A method is provided for scheduling execution of a plurality of threads executed in a multithreaded processor. Resource utilizations of each of the plurality of threads are measured while the plurality of threads are concurrently executing in the multithreaded processor. Each of the plurality of threads is scheduled according to the measured resource utilizations using a thread scheduler.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: April 15, 2003
    Assignee: Compaq Computer Corporation
    Inventors: George Z. Chrysos, Jeffrey A. Dean, James E. Hicks, Jr., Carl A. Waldspurger, William E. Weihl
  • Patent number: 6549622
    Abstract: The system and method of the present invention facilitates encrypting and decrypting files using a fast hardware implementation of the RC4 method to enable secure access to information resources in a computer network. The network system includes a sender computer coupled via a computer network to a receiver computer. The RC4 algorithm as implemented in hardware and its associated multiport memory (included within both the sender computer and the receiver computer) enables a fast hardware implementation of the respective encryption circuit and decryption circuit. Multi-port memory allows for at either computer site a fast hardware implementation of the RC4 encryption/decryption method where reads and writes are synchronously performed.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: April 15, 2003
    Assignee: Compaq Computer Corporation
    Inventor: Donald P. Matthews, Jr.
  • Patent number: 6549215
    Abstract: An image is displayed using anamorphic video. A first portion of an image is displayed on a display at a first scale. At least one second portion of the image is displayed on the display. The at least one second portion is adjacent the first portion of the image. The second portion is displayed at a second scale higher than the first scale.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: April 15, 2003
    Assignee: Compaq Computer Corporation
    Inventor: Norman P. Jouppi
  • Patent number: 6545981
    Abstract: A system and method for facilitating both in-order and out-of-order packet reception in a SAN includes requestor and responder nodes, coupled by a plurality of paths, that maintain the good and bad status of each path and also maintain local copies of a message sequence number. If an error occurs for a transaction over a given path, the requestor informs the responder, over a good path, that the given path has failed and both nodes update their path status to indicate that the given path is bad. A barrier transaction is used by the requestor to determine whether the error is transient or permanent, and, if the error is transient, the requestor retries the transaction.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: April 8, 2003
    Assignee: Compaq Computer Corporation
    Inventors: David J. Garcia, Richard O. Larson, Stephen G. Low, William J. Watson
  • Patent number: 6539414
    Abstract: Incorporation of a collateral process as a participant in a transaction is made possible by a method and system in accordance with the present invention. Typically, after the transaction is initiated, the collateral process is called and then is registered as a participant,in the transaction. A prepare signal is sent to each registered collateral process when end stage of the transaction is reached. Then, a ready signal is received from the collateral process if the collateral process is completed successfully; and an abort signal is received from the collateral process if the collateral process does not complete successfully or a violation is detected. If a ready signal is received, a commit record is written to a log, and a commit signal is sent to each registered collateral process. In response to the commit signal, a forgotten signal is received from each registered collateral process.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: March 25, 2003
    Assignee: Compaq Computer Corporation
    Inventors: Johannes Klein, Albert C. Gondi, Sitaram V. Lanka, William J. Carley