Patents Assigned to Compaq Computer Corporation
  • Patent number: 6487628
    Abstract: A peripheral control interface provides access to a system area network for a plurality of peripheral devices connected to the PCI through an I/O bus. A plurality of virtual data channels is defined in local memory to which outstanding requests from peripherals are assigned. Physical channel engines implement the order requests through the assigned virtual data channel with accessed data stored in local memory. A subsequent request by a peripheral can then be immediately fulfilled from data stored in memory. Data channel context stored in memory includes the number of outstanding requests by a user to whom the channel is dedicated, and a physical channel engine can pre-fetch data in response to a plurality of outstanding requests from a peripheral thereby eliminating latency in fulfilling requests.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: November 26, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Peter H. Duong, Michael W. Knowles
  • Publication number: 20020169818
    Abstract: Techniques for storing objects (e.g., images) in and retrieving objects from a storage device (e.g., image store) in a rapid and efficient manner are disclosed. More particularly, the techniques include: storage of an object in and retrieval of an object from the storage device with reference to an object locator together with state and permission information, use of a directory structure of a file system to efficiently provide database structure for storage of the objects, storage and retrieval of object states as attributes of associated files in the file system, storage and retrieval of multiple versions of objects, and multi-threaded management of the storage device.
    Type: Application
    Filed: April 24, 2002
    Publication date: November 14, 2002
    Applicant: Compaq Computer Corporation
    Inventors: Christoher H. Stewart, Svilen B. Pronev, Darrell J. Starnes
  • Patent number: 6480398
    Abstract: A computer system includes a frame for attaching a plurality of electronic components including a predetermined electronic component. A cover for covering the electronic components is provided along with a mask having an opening. The mask is disposed between the frame and the cover so that a mask opening allows access to the predetermined electronic component while masking other electronic components. The cover includes an access cover panel that is released using a single button and pivoted for removal from the frame. The one-piece access cover panel is fabricated from a single piece of plastic and includes alignment tabs, pivot tabs, and snaps for attaching the access cover panel with the cover. Additionally, a metal shield is attached to the access cover panel for simultaneously shielding the predetermined electronic component when attaching the access cover panel to the cover. The metal shield reduces electromagnetic interference (“EMI”).
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: November 12, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Troy Anthony Della Fiora, Kevin L. Massaro, Kevin W. Mundt
  • Patent number: 6480376
    Abstract: A portable computer docking station housing is provided on its bottom side with a support foot structure which is pivotable relative to the housing to prop it up on a horizontal work station surface in a selectively variable one of a series of different front-to-rear tilt angles thereon. This permits the opened display screen of a docked portable computer disposed on the top side of the docking station housing to be selectively adjusted upwardly and downwardly in a vertical plane to accommodate the height and viewing preferences of a user of the docked computer. A specially designed spring-loaded, manually operable clutch mechanism is useable to releasably lock the support foot in its selected pivotal orientation relative to the housing. Various peripheral device connection ports are conveniently incorporated in the support foot.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: November 12, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Minh H. Nguyen, John E. Youens
  • Patent number: 6477663
    Abstract: A method and apparatus for providing process-pair protection to complex applications is provided. The apparatus of the present invention includes a process-pair manager or PPM. The PPM is replicated so that a respective PPM is deployed on each of two computer systems. Each computer system also hosts a watchdog process that monitors and restarts the PPM in case of PPM failures. Each PPM communicates with a respective instance of an application. The application instances may include one or more processes along with associated resources. During normal operation the primary application provides service and periodically checkpoints its state to the backup application. The backup application functions in a standby mode. The two PPMs communicate with each other and exchange messages as state changes occur. The apparatus also includes in each computer system a node watcher that is the PPM of failures of the remote computer system.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: November 5, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Luiz A. Laranjeira, Glen W. Gordon, Jill A. Jones, Irma De Leon, Yuan Sylvia Tien, Stephen M. Sanderson, Thomas J. Davidson, Charles Young
  • Patent number: 6473888
    Abstract: The present invention relates to a method and apparatus for determining capacitance and charge models for MOS devices to be used in calculating delays in a timing verifier for a circuit. The models are generated by first creating a variety of configurations of MOS devices which vary the inputs to the source, drain, and gate. Such inputs may include rising and falling values as well as constant values at VDD and VSS. Simulations are run on all of the configurations using conditions anticipated for the circuit to be analyzed. Capacitance values obtained from the simulations are used to determine models based upon length and width of the MOS devices using standard curve fitting techniques. Models then can be used for determining delays within the circuit.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: October 29, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Nevine Nassif, Madhav Desai, James Arthur Farrell, Harry Ray Fair, III, Roy Badeau, Nicholas Lee Rethman
  • Patent number: 6473774
    Abstract: A method and apparatus introduces the creation and use of two record addressing functions. One function “computeRID” assigns identifiers to records, and the other function “lookupRID” performs the related task of locating a record given its identifier.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: October 29, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Pedro Cellis, Michael Heytens, Mark Melton
  • Patent number: 6473795
    Abstract: An in-band/out-of-band alert delivery system for a computer system manager includes an alert log which maintains a record of alerts to be delivered and the status of those alerts, an alert manager for making a first attempt to deliver each alert, and a retry manager for making subsequent attempts to deliver alerts as becomes necessary and appropriate. The alert delivery system may also include a bus master interface manager for making in-band alert deliveries and a communications manager for making out-of-band alert deliveries. Telephone numbers are provided to the communications manager by an alert destination list. Out-of-band alert deliveries may be made via a modem, a universal asynchronous receiver transmitter, or the like.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: October 29, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Lin-Juan L. Danielson, Patrick E. Dobyns, Thomas J. Hernandez, Ronald A. Neyland, Richard A. Stupek, James E. Barron, Cheryl X. Chen, Andrew J. Miller
  • Patent number: 6473525
    Abstract: A method for detecting an image edge within a dithered image. A pixel within a support region is selected for processing. The differences between pixel values in the region and the selected pixel are computed to form a current difference map. Whether the selected pixel in the region differ by no more than one resolution level from any other pixel of the region is determined from the current difference map. An edge is determined not to exist within the region if the difference map for a region contains no values differing by more than one resolution level. An edge is determined to exist within a region if the difference map for the selected pixel and region contain values differing by more than one resolution level. Alternatively, a difference map for the selected region of support is determined and compared to a table of all possible valid difference maps. If a corresponding difference map is found within the table then an edge does not exist within the presently processed region of support.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: October 29, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Shiufun Cheung, Robert A. Ulichney, Robert MacNamara, Giridharan Iyengar
  • Patent number: 6470342
    Abstract: Systems and methods for supporting and maintaining a distributed global map of transaction identifiers at the gateway processes using a hashing algorithm configured on each application process to access the global maps. A global map of transaction identifiers that associates global transaction identifiers with remote local transaction identifiers is maintained at each gateway process. When an application process performing work for a particular transaction desires to export the transaction to a remote node, a hashing function configured on the application process is applied to the global transaction identifier associated with the particular transaction. Application of the hashing function to the global transaction identifier identifies one of the gateway processes. The global transaction identifier is stored to the global map associated with that gateway process.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: October 22, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Albert C. Gondi, Johannes Klein, Sitaram V. Lanka, Roger J. Hansen, Sameer Joshi
  • Patent number: 6470362
    Abstract: A computer implemented method is applied to convert a formatted document or text to an ordered list of words. The formatted document is first partitioned into first and second data structures stored in a memory of a computer. The first data structure stores text fragments, and the second data structure stores code fragments of the formatted document. Adjacent text fragments are concatenated to form possible ordered word lists. Possible words are matched against a dictionary of representative words. A best ordered word list having the fewest number of words is selected from the possible ordered word lists.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: October 22, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Robert Alan Eustace, Jeremy Dion
  • Patent number: 6470398
    Abstract: A computing environment (2) includes multiple CPUs (5a-c), multiple nonshared memory spaces and a means for implementing a select system call (10a-c).
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: October 22, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Bahman Zargham, Jim Uren, Robert Shaw, Sylvia Chan, Lars Plum, Minoo Gupta
  • Patent number: 6470443
    Abstract: A multi-threaded processor comprising a pipeline including a number of stages processing instructions belonging to a plurality of threads. A buffer stores instructions from different ones of the threads. Count logic stores count information relating to each of the threads to indicate the number of instructions in each of the corresponding threads that have a particular attribute. A selection logic circuit has an output coupled to the buffer to determine which instruction is to be read from the buffer based on the count information stored by the count logic. The count information may, for example, provide information relating to a likelihood that one or more instructions belonging to each of the threads will be cancelled; relating to a count of unresolved branch instructions; or relating to a count of outstanding data cache misses. In operation, a thread may be selected for execution based on a selected attribute to enhance processing performance.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: October 22, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Joel S. Emer, Rebecca Stamm, Trggve Fossum, Robert H. Halstead, Jr., George Z. Chrysos, Dean Tullsen, Susan Eggers, Henry M. Levy
  • Publication number: 20020149461
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Application
    Filed: June 11, 2002
    Publication date: October 17, 2002
    Applicant: Compaq Computer Corporation
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6467054
    Abstract: A storage device capable of performing diagnostics tests on itself to render an opinion of its health to a host computer is disclosed. Test commands are received over an industry-standard interface. The tests may be run in off-line or captive modes. Off-line tests are subject to interruption from the host computer whereas captive tests are not. Unless a command is received that instructs the storage device to stop testing or power-down, the storage device suspends the test, executes the host command and resumes testing. Power management is disabled while the tests are run to prevent the storage device from inadvertently powering down. A number of specific tests may be performed, including a general quick test and a comprehensive test. Failures detected during the tests are logged in a non-volatile memory of the storage device and include an indication of which component failed and at which point in the test that component failed.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: October 15, 2002
    Assignee: Compaq Computer Corporation
    Inventor: Thomas R. Lenny
  • Patent number: 6466336
    Abstract: A system is provided for scanning batch-type documents containing indicia on either a single side or on two sides of each document sheet. Misfeeds through a scanning device are identified by comparison of an anticipated number of pages with an actual number of scanned pages. Similar misfeeds may be identified by comparison of first and second series of pages in two-sided documents. Automatic collating of scanned pages is then performed where desired. The automatic collating may be based upon simple interleaving of pages, or upon recognition of page identifiers, such as page numbers in common or anticipated regions of the page. The scanning, analysis and collating operations may be followed by other processing steps, including transmission of facsimiles, printing, copying, and so forth.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: October 15, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Derrill L. Sturgeon, John C. Barker, Donald Michael Brown
  • Patent number: 6463529
    Abstract: A processor-based system includes a processing unit. The processing unit includes at least a processor and preferably also a cache memory, a cache memory controller and a numerical coprocessor. The processing unit is reset in response to a system reset signal being asserted at a reset input node and only selected portions of the processing unit are reset in response to a partial-reset signal being asserted at a partial-reset input node. The system can also include a number of other components such as video circuitry, a hard disk drive, bus interface circuitry, a speaker, a keyboard controller and a keyboard.
    Type: Grant
    Filed: February 10, 1997
    Date of Patent: October 8, 2002
    Assignee: Compaq Computer Corporation, Inc.
    Inventors: David A. Miller, Kenneth A. Jansen, Paul R. Culley
  • Patent number: 6462670
    Abstract: An identification system for a processor-based device. The identification system is readily utilized with rack-mounted devices, such as servers. The system includes an actuator, such as a pair of pushbuttons located at the front and the rear of the device. The system also includes an indicator, such as a pair of lights at the front and the rear of the device that are illuminated upon actuation of the actuator. Thus, a clear indicator is visible from the front and from the rear of the device to permit service or replacement without inadvertent disconnection of an adjacent device.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: October 8, 2002
    Assignee: Compaq Computer Corporation
    Inventors: David F. Bolognia, Kevin B. Leigh
  • Patent number: 6463532
    Abstract: A system and method for effectuating distributed consensus among members of a processor set in a multiprocessor computing system that is effective even when only a single surviving processor is operational and is achieved through joint implementation of a virtual state machine utilizing a sequence of numbered input commands. System synchronization is achieved by having all of the processors agree on the sequence of input commands so that they execute the same virtual state machine. Input commands are numbered consecutively and the processors use a set of shared stores (e.g. disk drives) to communicate amongst themselves requests (i.e. ballots) for new state machine inputs (or commands) and state machine inputs that have already been chosen (i.e. committed commands). A consensus process is used to decide upon (or commit) each command and this consensus is achieved using a majority of known system stores rather than a majority of known processors.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: October 8, 2002
    Assignee: Compaq Computer Corporation
    Inventors: James M. Reuter, Leslie Lamport, Eliezer Gafni
  • Publication number: 20020143839
    Abstract: The invention provides computer apparatus for performing a square root or division operation generating a root or quotient. A partial remainder is stored in radix-2 or radix-4 signed digit format. A decoder is provided for computing a root or quotient digit, and a correction term dependent on a number of the most significant digits of the partial remainder. An adder is provided for computing the sum of the signed digit partial remainder and the correction term in binary format, and providing the result in signed digit format. The adder computes a carry out independent of a carry in bit and a sum dependent on a Carry_in bit providing a fast adder independent of carry propagate delays. The scaler performs a multiplication by two of the result output from the adder in signed digit format to provide a signed digit next partial remainder.
    Type: Application
    Filed: December 14, 2001
    Publication date: October 3, 2002
    Applicant: Compaq Computer Corporation
    Inventors: Mark D. Matson, Robert J. Dupcak, Jonathan D. Krause, Sridhar Samudrala