Abstract: A battery pack for use in a portable computing system includes a transistor that is used both for inhibiting charging of the batteries within the system and for limiting the voltage across the batteries in the battery pack. Rather than having two separate devices to inhibit and regulate, this single transistor performs the functions of both, thus reducing component count in a battery pack.

Abstract: A layered block device driver for accessing a storage device coupled to a computer system having a platform on which a disk fault prediction application operates. The layered block device driver includes a file system driver coupled to the computer system, at least one upper level driver coupled to the file system driver, an intermediate driver having a first coupling with the upper level driver for the exchange of messages between the intermediate driver and the upper level driver and a second coupling with the application which controls the exchange of messages between the application and the storage device, and a port driver coupled to the intermediate driver and the storage device.

Abstract: A power distribution system for a multi-layer circuit board includes a board having a component layer with signal runs formed thereon, a ground layer, an insulation layer, and a power supply system. The power supply system includes a supply bus, discrete voltage supply planes, and isolation devices mounted on the component layer, each connecting one of the discrete voltage supply planes to the supply bus. The component layer has a first area for components which perform a first function and a second area for components which perform a second function. The discrete voltage supply planes include a first supply plane corresponding to the first area and a second supply plane corresponding to the second area. The first supply plane is disposed directly beneath and is shaped substantially the same as the first area, and the second supply plane is disposed directly beneath and is shaped substantially the same as the second area.

Abstract: An enhanced accessibility router includes an outer housing with a side wall opening through which a support tray man be inserted into the housing interior and removed therefrom. A variety of printed circuit boards, including a system I/O board, a CPU card, and various option cards are mounted on the tray for movement therewith. At the back end of the support tray is a specially designed latch and card support member which functions to releasably hold the tray in an outwardly withdrawn position thereof and to receive and support edge portions of the CPU card and option cards. The CPU card is captively retained on the tray by an elongated card retaining member that may be quickly and easily installed on and removed from the tray without tools. A front housing wall has an opening disposed therein and facing a PCMCIA card support structure mounted on the inner end of the support tray.

Abstract: A computer system which includes a circuit to monitor the PCI bus master grant lines and provide a disk drive activity signal if an appropriate grant line is activated. The PCI bus master grant lines are combined with mask signals, so that the grant lines not associated with a PCI bus master such as a SCSI controller are ignored. If an unmasked grant line is activated, a down counter is loaded. While the counter is at a non-zero value, a disk drive activity signal is provided. This disk drive activity signal is combined with other disk drive activity signals to drive the disk drive activity LED.

Abstract: A portable computer system including sealed acoustic suspension speaker enclosures which are each molded of a high density-low-density polymer combination, so that the low-density polymer can provide good sealing to adjacent surfaces. Preferably, neither speaker enclosure is sealed as a free standing unit, but the acoustic seal is completed only when the speaker enclosure is in place inside the portable computer.

Abstract: A dual-master data storage interface is disclosed which flexibly configures and connects data storage drives in the portable computer to optimize performance when the portable computer is operating in a stand-alone mode and to optimize accessibility to additional data storage drives when the portable computer is docked with an expansion unit. When the portable computer operates as a stand-alone unit (i.e., not docked to the expansion unit), each drive on the portable is configured to operate as a master drive to optimize performance. When the portable computer docks with the expansion unit, the first channel on the portable computer is connected via switches to both drives of the portable computer, while the second channel on the portable computer is disconnected. Further, the first data storage drive is configured as a master and the second data storage drive is configured as a slave drive on the portable computer side.

Abstract: A hash system for selecting a destination network port for each of a plurality of binary address values, such as media access control (MAC) addresses, received by a plurality of network ports including a hash memory for receiving binary hash values and for providing a corresponding port number identifying a destination network port. Each of the network ports includes hash logic for receiving a binary address value, for selecting a subset of bits of each received binary address value as a binary hash value, for providing the binary hash value to the hash memory and for receiving a corresponding port number. The subset of bits are determined by a bit enable value.

Abstract: An ink jet printhead having an ultrasonic maintenance system incorporated therein and an associated method of maintaining an ink jet printhead by purging foreign matter therefrom. To forcibly eject foreign matter from an ink-carrying channel, the ink jet printhead is ultrasonically vibrated at a frequency of at least 20 kHz. Vibration may be initiated upon cessation of print operations or at selected time intervals for selected periods of time and may take place while the ink jet printhead is located within a print area portion of an associated ink jet printer where print operations are conducted or after the ink jet printhead is shuttled to a maintenance area. Foreign matter may also be ejected by applying a purging pulse to the ink-carrying channel. The purging pulse is generated by applying a voltage differential to a sidewall actuator laterally bounding the ink-carrying channel which is twice the magnitude of the voltage differential applied to eject a droplet of ink from the ink-carrying channel.

Abstract: A notebook computer is provided and has a base housing in which a heat-generating component is located, and a lid housing pivotally secured to the base housing for pivotal movement relative thereto between open and closed positions. A relatively thin, hollow, flexible heat exchanger has a first section positioned in the base housing in heat exchange contact with the heat-generating component, a second section disposed in the lid housing in heat exchange contact therewith, and a flexible third section through which the interiors of the first and second sections are communicated. During operation of the computer, a small motor-driven pump recirculates a cooling liquid through the heat exchanger in a manner causing heat from the heat-generating component to be transferred to liquid in the first heat exchanger section, be carried therewith through the third section into the second section, and be transferred via the second section to the lid housing portion for dissipation therefrom to ambient.

Abstract: An isolated power converter architecture in which controllers are used both on the primary side and also on the secondary side of the transformer. The controller on the secondary side is the master, and the controller on the primary side is a slave controller which has only limited functionality. Each controller controls at least one switching transistor. The controller on the primary side has a start-up mode in which it drives its transistor to apply a simple waveform which couples enough power through the transformer to permit the controller in the secondary to power up.

Abstract: A communication protocol detection system for enabling a network system to detect and interface one or more network devices each operating according to at least one of a plurality of different communication protocols. In one embodiment, a network interface card (NIC) is capable of operating according to one of two different communication protocols, such as the 10Base-T and 100Base-TX Ethernet Standards. The NIC includes two corresponding transceivers, where the transceivers are interfaced to a network connector for interfacing an external network device. Control logic initially enables the 10Base-T transceiver to determine if link pulses are detected. If link pulses are detected, the 100Base-T transceiver is enabled to determine if it detects the link pulses. If so, the 100Base-T transceiver is used to establish communications, and if not, the 10Base-T transceiver is used.

Abstract: An apparatus is disclosed for predicting and making available in advance certain information, namely the address signals from an expansion bus, so as to relax the timing requirement of the burst transfer cycle. A decoder responds to the control signals of the expansion bus to detect the start and the end of a burst transfer cycle. The decoder controls a counter, which stores the initial address signals of the expansion bus at the start of the burst transfer cycle and predicts the initial address signals by incrementing the address signals during the burst transfer cycle. A multiplexer couples either the predicted address signal to the multiplexer output during the burst transfer cycle or the address signal of the EISA bus to the multiplexer output when the computer system is not performing the EMB burst transfer cycle. In another aspect of the present invention, the low order address signal of the bus is predicted using a second counter.

Abstract: A computer which includes modular structures incorporated therein provides enhanced serviceability. In a preferred embodiment, the computer has a chassis, a lid, a front bezel, an option card module, a system board module, a drive module, and a power supply module. The lid secures the option card module within the chassis. The option card module is removable from the chassis without disconnecting fasteners, option boards, or external cables therefrom. The system board module is received in the chassis and is secured therein by the option card module. The drive module has features which enable storage media devices to be conveniently installed therein and removed therefrom.

Abstract: An apparatus is disclosed for protecting a computer system from an unintended or a malicious removal of power by a user. The apparatus has a power supply for supplying power to the computer system, a non-volatile memory to store a shutdown key for authorizing a shutdown of the power supply, and a power supply shutdown circuit connected to the power supply and the non-volatile memory. The power supply shutdown circuit also includes a switch adapted to receive a power supply shutdown input from the user. Upon receipt of the shutdown input, the apparatus displays a dialog box which requests a password from the user. The apparatus compares the password with the shutdown key in the non-volatile memory and proceeds to shut-down the power supply if the shutdown key matches the password entered by the user. Otherwise, the apparatus maintains power to the computer system until a correct password has been entered.

Abstract: SCSI controller circuitry for controlling devices on a wide SCSI bus that implement the wide SCSI bus standard according to SCSI-2 is implemented with improved circuitry for providing the wide SCSI bus acknowledge signal ACKB*. Specifically, a high speed analog buffer chip is provided that can sync and source over 55 milliamps, that has a propagation delay of 1.5 nanoseconds, and that follows its input with a high degree of accuracy. Using this circuitry, glitches are eliminated in devices with high lump capacitive loads and cross-talk on the wide SCSI bus.

Abstract: With a switching converter that delivers power to a load at a regulated load voltage based upon switch control pulses from a pulse width modulator (PWM), a circuit monitors directly the level of the load voltage and, when it rises to an upper threshold, the circuit generates a feedback signal for the PWM that interrupts its generation of switch control pulses until the load voltage drops to a lower threshold voltage. When the load voltage has dropped to the lower threshold voltage and until it rises to the upper threshold voltage, the circuit generates a feedback signal for the PWM to cause it to produce switch control pulses of a maximum-power pulse width. The circuit may be enabled only in low load conditions and used in connection with the powering of personal computers.

Abstract: A memory mapping and module enabling circuit for allowing logical 128 kbyte memory blocks to be defined for any location in any module connected to a memory system. A RAM is addressed by the system address lines defining 128 kbyte blocks, with the output data providing the row address strobe enable signals for a particular memory module and the address values necessary to place the 128 kbyte block within the module. Various other parameters such as write protect status and memory location are also provided by the RAM. Circuits and techniques for programming and reading the RAM are provided. The RAM is only programmed once, with modifications to the RAM-provided write protect status and memory location values being made based on write protect and relocation status information contained in a separate register.

Abstract: In a method and system for performing a memory access cycle from a first processor to a memory address in a multi-processor system, the memory access cycle is initiated, and, prior to completion of the memory access cycle, a snoop routine is initiated with respect to the memory address. The memory access cycle is continued without awaiting responses from another one of the processors if a second one of the processors provides a signal which indicates that immediate completion of the memory access cycle will not disturb the integrity of data stored in the system.

Abstract: A computer housing is provided with enhanced interior cooling, to dissipate operating heat from its heat generating internal electronic components, using a single cooling fan disposed inside the housing. During operation thereof the fan draws ambient cooling air into the housing through a hollow support foot attached to the underside of the housing, and the bottom end opening of a hollow front bezel structure, flows the cooling air through the housing and then discharges it therefrom. A pull-out option card carrier defines an interior housing baffle that routes a large portion of the interior housing air flow across the processor portion of the computer motherboard. Additionally, a smaller quantity of ambient cooling air is drawn through side wall openings in the housing into an interior plenum upon the inner side wall of which the motherboard is mounted.