Patents Assigned to Compaq Computers, Corporation
  • Patent number: 5787084
    Abstract: An apparatus and associated method for facilitating data flow through a multiple port multicast data switch includes receiving a data packet at a first port of the multicast data switch, the data packet formed of sequentially positioned cells of data. Determining if the second port is congested and if congested sending the selected cell to the second port if and when the second port becomes uncongested within a selected period of time. If otherwise uncongested, copying the cell data to the second port.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: July 28, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Hieu M. Hoang, Brian W. Johnson
  • Patent number: 5786810
    Abstract: A method of determining an object's position and associated apparatus provides positional information in a form that may be conveniently communicated to a computer to calculate the object's position. In a preferred embodiment, representatively incorporated in a computer keyboard, a method of determining an object's position includes forming an optical grid of reflected beacons and detecting an obstruction of the reflected beacons. The preferred embodiment apparatus utilizes a single light source to detect an object's position in two dimensions.
    Type: Grant
    Filed: June 4, 1996
    Date of Patent: July 28, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Richard M. Knox, John R. Masters
  • Patent number: 5786806
    Abstract: A notebook computer is provided with a collapsible keyboard structure in which, in response to closing of the computer housing lid, a shifting mechanism retracts the keys to a storage/transport orientation in which the overall thickness of the keyboard structure is reduced by an amount essentially equal to the stroke distance of the keys. When the lid is subsequently opened, the shifting mechanism extends the keys outwardly to their extended operating positions. Incorporated into the collapsible keyboard structure is a cursor position control pointing stick device that, via the shifting mechanism, is automatically retracted to a collapsed orientation in response to a corresponding collapsing of the keys, and automatically extended back to a use orientation in response to a corresponding return of the keys to their extended use orientations.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: July 28, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Joseph R. Fester
  • Patent number: 5786687
    Abstract: In a computer having switch-mode power converter, a pulse transformer circuit drives the converter's transistor switch in response to pulses from a switch control pulse source. A primary capacitor is connected in series with the switch control pulse source and the transformer's primary winding. At the leading edge of a switch control pulse, the primary capacitor causes a positive voltage spike to appear across the primary winding and hence a positive voltage spike to be induced across the transformer's secondary winding. At the trailing edge of the switch control pulse, the primary capacitor causes a negative voltage spike to appear across the primary winding and hence a negative voltage spike to be induced across the transformer's secondary winding.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: July 28, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5784599
    Abstract: A method for setting host bus clock frequencies and processor core clock ratios in a multi-processor computer system. The method first determines original host bus frequency settings for each of the installed processors. The host bus is set to clock at the slowest of the frequency settings. Processor core clock ratios are then optimized for the new host bus frequency. The optimization process commences by determining the original processor core clock ratio settings for each processor. These ratio settings are individually optimized via an iterative process wherein the core clock ratios are incrementally increased and multiplied by the new host bus frequency. This process continues until the incremented core clock ratio yields a core clock frequency in excess of the maximum rating for the processor under test. The core clock ratio is then decremented and latched into the processor under test via a hard reset.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: July 21, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Bassam N. Elkhoury
  • Patent number: 5781407
    Abstract: A portable personal computer, such as a notebook computer, is provided with an infrared (IR) port which is accessible to IR light signals sent toward the frontal face or aspect of the computer, where the data entry mechanism, such as a keyboard or touchpad, is located. The computer system may also include a conventional, rear mounted infrared light entry port, so that infrared communications may be made to the computer from several directions, such as both the front and rear of the computer. This overcomes the need for special cabling and a separate electronics board for extra IR interface electronics in the portable computer housing, where space is typically at a premium.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: July 14, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Eric S. Brauel
  • Patent number: 5781748
    Abstract: A computer system having an expansion base for docking a portable portion of the computer system includes a bridge circuit for adaptively decoding addresses on a bus based on the docking status. Both the expansion base and the portable portion include the bridge circuit for passing cycles from a peripheral component interconnect (PCI) bus to an industry standard architecture (ISA) bus. The bridge includes internal devices and configuration registers for controlling the decoding. Bus cycles intended for internal devices and external devices connected to each respective ISA bus of the bridge circuits are positively decoded. Cycles not positively decoded and claimed are subtractively decoded by one of the bridge circuits depending on the docking status.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: July 14, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Gregory N. Santos, David J. Maguire, Dwight D. Riley, James R. Edwards
  • Patent number: 5781716
    Abstract: A fault tolerant multiple network server system in which multiple servers concurrently act as back-up servers for each other even while they are providing their own server services to the system. Rather than having an unused server monitoring for failure of a primary server and taking over control, each is act upon the network, but when its partner should fail, it assumes control of these partner servers storage subsystem. In this way, processing power of both servers is available during normal operation, but they each provide back-up capability for the other.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: July 14, 1998
    Assignee: Compaq Computer Corporation
    Inventors: John M. Hemphill, Gregory Mart Stewart, Thomas S. Lawler
  • Patent number: 5781409
    Abstract: A notebook computer display housing is pivotally connected to its associated CPU housing by a heat dissipating hinge structure having telescoped, relatively rotatable first and second sections respectively anchored to the CPU and display housings. The heat absorbing evaporation end of a first thermosyphoning heat pipe is conductively connected to a heat generating electronic component within the CPU housing, with the heat rejecting condensing end of the heat pipe defining the first hinge structure section. During computer operation, heat from the electronic component is sequentially transferred through the heat pipe and the second hinge structure section, in which the first hinge section is journaled, to the display housing for dissipation therefrom to ambient.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: July 14, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Henry E. Mecredy, III
  • Patent number: 5781925
    Abstract: In a microcomputer system implementing cache memory, the microprocessor can execute back-to-back pipelined burst operations without corrupting the internal address of the cache memory. The address strobe from the processor is blocked by the cache memory controller, allowing a burst operation to complete from or to the cache memories before the second address is strobed into the cache.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: July 14, 1998
    Assignee: Compaq Computer Corporation
    Inventors: John E. Larson, Jens K. Ramsey, Jeffrey C. Stevens, Michael J. Collins
  • Patent number: 5778413
    Abstract: A memory controller which provides a series of queues between the processor and the PCI bus and the memory system. Memory coherency is maintained in two different ways. Before any read operations are accepted from the PCI bus, both of the posting queues must be empty. A content addressable memory (CAM) is utilized as the Peripheral Component Interconnect (PCI) to memory queue. When the processor performs a read request, the CAM is checked to determine if one of the pending write operations in the PCI to memory queue is to the same address as the read operation of the processor. If so, the read operation is not executed until the PCI memory queue is cleared of the write. To resolve the problem of aborting a Memory Read Multiple operation, an abort signal from the PCI bus interface is received and as soon thereafter as can be done the read ahead cycle is terminated, even though the read ahead cycle has not fully completed.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: July 7, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Jeffrey C. Stevens, John E. Larson, Gary W. Thome, Michael J. Collins, Michael Moriarty
  • Patent number: 5778239
    Abstract: A power supply circuit is provided for a battery powered real time clock in a microprocessor based computer system. The power supply circuit monitors the output of the original battery and provides a warning indication when the battery output begins to drift or fade. A replacement battery may then be connected to the circuit. The circuit then substitutes power from the replacement battery for that from the original battery.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: July 7, 1998
    Assignee: Compaq Computer Corporation
    Inventor: B. Tod Cox
  • Patent number: 5777503
    Abstract: A control system using pulse width modulation, current-mode control to regulate a flyback converter for small input currents. The control system generates a ramp voltage indicative of an input current of the converter with an added bias to overcome the effects of switching noise attributable to parasitic elements in the converter. The ramp voltage is compared with an error voltage is order to obtain the pulse width modulated on-time of a primary switch. Thus, the control system maintains control for small duty cycles of the primary switch by having a control region immune to switching noise.
    Type: Grant
    Filed: February 22, 1996
    Date of Patent: July 7, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Richard A. Faulk
  • Patent number: 5778199
    Abstract: A method or apparatus of blocking access to a first device via a bus carrying an address enable signal in a computer system. A second device detects appearance of predetermined bus address information, and the address enable signal is blocked from the first device if the predetermined bus address information is present. A third device connected to the bus and the first device both are responsive to the predetermined bus address information, which includes bus addresses having upper bits with a non-zero value.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: July 7, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Christopher C. Wanner, Robert L. Woods
  • Patent number: 5778433
    Abstract: An apparatus for monitoring and decoding processor bus cycles and flushing a second level cache upon decoding a special flush acknowledge cycle. The CPU preferably includes an internal cache and a flush input for receiving a signal commanding the CPU to flush its internal cache. After flushing its cache by performing any necessary cycles to write back dirty data to main memory, the CPU performs a special flush acknowledge cycle to inform external devices that the flush procedure has been completed. A cache controller detects the flush acknowledge cycle and provides a flush signal to the second level cache. The cache controller then provides an end of cycle signal to the CPU to indicate that the flush cycle has been acknowledged.
    Type: Grant
    Filed: June 17, 1996
    Date of Patent: July 7, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Michael J. Collins, Gary W. Thome
  • Patent number: 5774332
    Abstract: A specially designed stand structure is used to vertically support a docking station housing, and an associated portable computer removably coupled thereto, to substantially reduce the vertical footprint of the overall docking station system. The stand structure includes a base portion having a recessed area for receiving and supporting a section of the docking station housing, and a pivotally mounted vertical holding wall structure with a transverse lower receiving platform. The vertical holding wall structure is spaced apart from and faces a vertical guide surface of the docking station housing, with the platform extending toward the guide surface.
    Type: Grant
    Filed: October 15, 1997
    Date of Patent: June 30, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Mark H. Ruch, Steven S. Homer
  • Patent number: 5772448
    Abstract: A printed circuit board that includes contact slider regions between conductive pads on the printed circuit board is disclosed. The printed circuit board is particularly suited for high density situations. According to one embodiment, a printed circuit board according to the invention includes a connection edge for insertion into a connector, a first row of conductive pads disposed on one or both sides of the printed circuit board proximate to the connection edge and extending away therefrom in a predetermined direction, and a row of slider regions disposed on one or both sides of the printed circuit board proximate to the connection edge and extending away therefrom in the predetermined direction, the slider regions being interposed between the conductive pads of the first row. The printed circuit board according to the invention is not only more reliable and easier to manufacture, but it also wears substantially better than previously designed high density circuit boards.
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: June 30, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Alexander Craig Ekrot, Bassam Nakhle Elkhoury
  • Patent number: 5774680
    Abstract: A computer system having separate, yet compatible DMA controllers on a bus. Each DMA controller for controlling at least one DMA channel, each DMA controller having an independent set of registers for performing DMA operations and a configuration register for indicating channel status and designation. A DMA master for compatibly communicating with a processor and for initializing and communicating with the multiple DMA controllers.
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: June 30, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Christopher C. Wanner, Jeffrey C. Stevens, Robert A. Lester, Dwight D. Riley, David J. Maguire, James Edwards
  • Patent number: 5774329
    Abstract: A computer includes a housing and a keyboard unit, the housing having a main circuit board with a socket connector provided thereon. The keyboard unit is detachably mounted on the housing and is provided with a ribbon cable extending into the housing and having a terminating end that is removably insertable into the socket connector. The ribbon cable is provided with a transverse restraining strip that is secured to the ribbon cable longitudinally inwardly of its terminating end and has a pair of outwardly projecting end portions. The housing is formed with engaging grooves for removably receiving these outwardly projecting end portions of the restraining strip.
    Type: Grant
    Filed: December 13, 1996
    Date of Patent: June 30, 1998
    Assignee: Compaq Computer Corporation
    Inventor: Ping-Huang Kuo
  • Patent number: 5769374
    Abstract: The screen of a computer monitor is surrounded by a generally rectangular monitor housing frame portion having an outer peripheral side edge disposed generally perpendicularly to the screen, and a rear side edge area disposed generally parallel to the screen. A mounting groove is formed in and extends continuously around the peripheral frame side edge, and a spaced series of mounting holes extend around the length of the rear side edge area. A computer peripheral device has a body portion from which a spline outwardly projects, and a mounting flange portion with a spaced pair of holes formed therein and alignable with a selected pair of the frame mounting holes. The peripheral device may be removably mounted on a selectively variable position on the screen frame portion by inserting the spline into the frame groove and inserting suitable fastening members inwardly through the mounting flange holes and into the frame mounting holes aligned therewith.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: June 23, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Randall W. Martin, Mark S. Kimbrough, Dennis J. Wasserman, Julie Heard, Kit R. Morris