Patents Assigned to Compaq Information
  • Patent number: 6347160
    Abstract: A method for inverse dithering a dithered image using a filter selected from a set of filters arranged in a preselected order is disclosed. Upon receipt of a selected portion of a dithered image, the selected portion is up-multiplied from a first amplitude resolution to a second amplitude resolution. The up-multiplied dithered image at the second amplitude resolution is then filtered by the selected filter coefficients to generate the inverse dithered image.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: February 12, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Shiufun Cheung, Robert A. Ulichney, Robert MacNamara
  • Patent number: 6343320
    Abstract: A network including one or more network subnets, a plurality of network participating devices (NPDs) and at least one management server. Each NPD initializes, gathers its status information and sends an initial beacon packet on each subnet to which it is coupled. The beacon packets are preferably confined to the subnet and are not copied to other subnets. For each subnet, each NPD collects beacon packets sent by other NPDs on the same subnet and stores the status information into a local status database including consolidated state information of all the NPDs in the group. For each subnet, each NPD periodically sends subsequent beacon packets with its status information so that all of the active NPDs have the most recent status information for all other NPDs of the same subnet. For each subnet, each NPD examines its configuration and determines whether it can serve as a group master.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: January 29, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Steven E. Fairchild, John M. Hemphill, James A. Rozzi
  • Patent number: 6341342
    Abstract: An array controller that cleans buffer memory as a background task. The controller includes a transfer buffer, a memory that stores an index or table indicating free and non-zero data sectors within the transfer buffer, and processing logic that uses the transfer buffer for data transfer operations, and when otherwise idle, that scans the index table for contiguous sections of free and non-zero data sectors of the transfer buffer and that zeroes at least one of the contiguous sections. The controller allocates buffer memory and performs parallel logic operations into the buffer, such as XOR logic operations to generate new parity data. The buffer must first be zeroed or cleaned prior to the parallel operations. With the background task, the controller is more likely to find an appropriate size buffer of free and zeroed data sectors in the transfer buffer to perform the parallel logic operations.
    Type: Grant
    Filed: November 4, 1997
    Date of Patent: January 22, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Mark J. Thompson, Vincent J. Zimmer
  • Patent number: 6341302
    Abstract: In a system for executing database queries, a directed graph of logically interconnected tasks represents an execution plan for executing a specified database query. A pair of queues are stored in a computer memory for each pair of interconnected tasks in the directed graph. One of the queues in each pair is a down queue for sending requests from a parent task to a child task, and the other is an up queue for sending replies from the child task to the parent task. Each queue is a circular buffer and includes a head pointer that points to a next location in the queue to be read, and a tail pointer that points to a next location in the queue in which data can be written. Each task checks that a queue is not full before writing data into that queue, and checks that the sibling queue is not empty before reading data from the sibling queue.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: January 22, 2002
    Assignee: Compaq Information Technologies Group, LP
    Inventor: Pedro Celis
  • Patent number: 6332180
    Abstract: Multiple instances of operating systems execute cooperatively in a single multiprocessor computer wherein all processors and resources are electrically connected together. The single physical machine with multiple physical processors and resources is subdivided by software into multiple partitions, each with the ability to run a distinct copy, or instance, of an operating system. At different times, different operating system instances may be loaded on a given partition. Resources, such as CPUs and memory, can be dynamically assigned to different partitions and used by instances of operating systems running within the machine by modifying the configuration. The partitions themselves can also be changed without rebooting the system by modifying the configuration tree. Inter-instance communication can occur in at least two different ways.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: December 18, 2001
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: James R. Kauffman, Andrew H. Mason, Paul K. Harter, Jr.
  • Patent number: 6307740
    Abstract: A portable notebook computer having a thickness of only one inch is obtained by provision of a computer housing containing a keyboard assembly and a motherboard positioned directly below the keyboard assembly, the keyboard assembly and the motherboard thereby defining a region in the enclosure. The other components comprising the computer; i.e. a hard disk drive, a PCMCIA option slot, a trackball assembly, and a DC to DC convertor, are positioned in an adjacent and generally co-planar relationship with this region. A battery housing is mounted externally on the computer housing for supplying electrical power to the computer.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: October 23, 2001
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Mark J. Foster, Michele Bovio
  • Patent number: 6295583
    Abstract: A processor of a multiprocessor system is configured to transmit a full probe to a cache associated with the processor to transfer data from the stored data of the cache. The data corresponding to the full probe is transferred during a time period. A first tag-only probe is also transmitted to the cache during the same time period to determine if the data corresponding to the tag-only probe is part of the stored data stored in the cache. A stream of probes accesses the cache in two stages. The cache is composed of a tag structure and a data structure. In the first stage, a probe is designated a tag-only probe and accesses the tag structure, but not the data structure, to determine tag information indicating a hit or a miss. In the second stage, if the probe returns tag information indicating a cache hit the probe is designated to be a full probe and accesses the data structure of the cache. If the probe returns tag information indicating a cache miss the probe does not proceed to the second stage.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: September 25, 2001
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Rahul Razdan, Solomon J. Katzman, James B. Keller, Richard E. Kessler
  • Patent number: 6289456
    Abstract: A battery-powered computer chassis intrusion detection circuit which stores the time and date that the chassis hood, components, or AC power was removed. When intrusion occurs, an alarm bit isolates the detection circuit oscillator from the circuit, effectively stopping a real time clock from incrementing the time and date. When the computer is powered back up, internal ROM checks to see if an alarm condition occurred. If so, the intrusion date and time is recorded and the user or administrator may be alerted.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: September 11, 2001
    Assignee: Compaq Information Technologies, Inc.
    Inventors: Sung Hsia Kuo, Alan M. Green