Abstract: A process for the fuzzy control of switching power supplies which have at least one inductor and at least one switching device, and a device for performing this control, the particularity whereof resides in the fact that it comprises the following steps: measuring the value of the current on the inductor; measuring the value of the input voltage of the switching power supply; measuring an error generated between a reference voltage and an output voltage of the power supply; defining fuzzy membership functions for the value of the current on the inductor, for the input voltage value, and for the error; defining an output membership function for the value of the duty cycle of the power supply; defining multiple fuzzy inference rules to which the measured values and the membership functions are applied calculating the corresponding weight functions of the membership functions; defuzzifying the results obtained by means of the weight function calculation and the application of fuzzy rules so as to obtain a real v

Abstract: In integrated structure sensing resistor for a power MOS device consists of a doped region extending from a deep body region of at least one cell of a first plurality of cells, constituting a main power device, to a deep body region of a corresponding cell of a second smaller plurality of cells constituting a current sensing device. The first plurality of cells and the second plurality of cells are formed using trench technology.

Abstract: An integrated circuit containing both power and small-signal NPN bipolar devices. The small-signal devices use lateral current flow, and are completely surrounded (laterally and vertically) by an N-type well region. The N-type well region itself is completely surrounded (laterally and vertically) by a P-type isolation region. This double isolation provides improved protection against turn-on of parasitic devices, which can cause leakage problems in the conventional device structures. Optionally a self-aligned process step is used to provide a graded base doping profile in the small-signal devices.

Abstract: A transistor threshold extraction circuit including at least two transistors of the same type each having a control terminal and having essentially a same threshold voltage, each of the two transistors also having first and second main conduction terminals, a current mirror circuit having at least two input-output terminals with the two terminals coupled respectively to the two transistors so as to supply bias currents, a voltage generator connected between the two control terminals, and a feedback path between the control terminals and one of the input-output terminals. An output of the extraction circuit is coupled to one of the control terminals.

Abstract: An oscillating circuit including a capacitor, a charge circuitry and a control circuitry. The charge circuitry includes first and second current generators having respectively first and second current values that are opposite in direction and a switching circuit designed to couple alternately the generators to the capacitor. The control circuitry has a voltage input coupled to the capacitor and an output coupled to control inputs of the switching circuit and includes a comparator with hysteresis having a lower threshold and an upper threshold. The difference between the upper threshold and the lower threshold is chosen to be substantially proportional to the ratio of the product to the sum of the two current values such that the oscillation frequency and the duty cycle do not depend on the supply voltage, the temperature and the process.

Abstract: An electro-luminescent material and solid state electro-luminescent device comprising a mixed material layer formed of a mixture of silicon and silicon oxide doped with rare earth ions so as to show intense room-temperature photo- and electro-luminescence is described. The luminescence is due to internal transitions of the rare earth ions. The mixed material layer has an oxygen content ranging from 1 to 65 atomic % and is produced by vapor deposition and rare earth ions implant. A separated implant with elements of the V or III column of the periodic table of elements gives rise to a PN junction. The so obtained structure is then subjected to thermal treatment in the range 400.degree.-1100.degree. C.

Abstract: A device integrated on a chip of a semiconductor material is disclosed which comprises an NPN bipolar transistor and an N-channel MOSFET transistor in an emitter switching configuration, both being vertical conduction types. The bipolar transistor has its base and emitter regions buried; the MOSFET transistor is formed with an N region bounded by the base and the emitter regions and isolated by a deep base contact and isolation region. To improve the device performance, especially at large currents, an N+ region is provided which extends from the front of the chip inwards of the isolated region and around the MOSFET transistor. In one embodiment of the invention, a MOSFET drive transistor is integrated which has its drain terminal in common with the collector of the bipolar transistor, its source terminal connected to the base of the bipolar transistor, and its gate electrode connected to the gate electrode of the MOSFET transistor in the emitter switching configuration.

Abstract: The present invention relates to an applied-voltage fuzzy control process for induction motors including the following steps: measuring a speed error by comparing the current speed of an electric motor with a reference speed; generating the derivative of this speed error; measuring a power error by comparing the power supplied to the motor with a reference power; applying a fuzzy control to the speed error, to the derivative of the speed error, and to the power error so as to generate the values of a drive voltage and a power supply pulse that are suitable to drive the electric motor. The fuzzy control is divided into two sections: a first one for motor speed control and a second one for motor power control.

Abstract: An integrated circuit including a power stage, a low-voltage component separated from the power stage by an isolating region and a reference potential region at a reference potential. The power stage includes an N-type substrate region which may be biased to a terminal voltage with respect to the reference potential and the isolating region has P-type conductivity. The low-voltage component includes an N-type input region receiving an input voltage. The input voltage and the terminal voltage may oscillate a few tens of volts above or below the reference potential and turn on parasitic transistors. To prevent turning on of the parasitic transistors, switchable conductive paths are interposed between the isolating region on the one hand, and the substrate region, the input region and the reference potential region on the other, for electrically connecting the isolating region to one of the substrate region, input region and reference potential region which presents instant by instant the lowest potential.

Abstract: A filter architecture for high-resolution video applications of the type comprising at least one filter block having a plurality of digital inputs which receive through an interface components of a television signal and some outputs through which to take the result of a filtering operation for noise associated with the television signal also comprises in the filter block at least one interpolator block connected to said inputs and operating with fuzzy logic to execute a television signal scanning conversion to be presented on additional outputs of the filter block.

Abstract: Power consumption by the driving circuitry of an output stage, employing a slew-rate controlling operational amplifier, is reduced by modulating the level of the current output by the operational amplifier in function of the working conditions of the output stage. Switching delay may also be effectively reduced. An auxiliary current generator forces an additional current through the conducting one of the pair of input transistors of the operational amplifier only during initial and final phases of a transition, essentially when the slew rate control loop ceases to be effective. The boosting of the bias current through the conducting input transistor is determined by the degree of unbalance of the differential input stage of the operational amplifier, without the use of dissipative sensing elements.

Abstract: An integrated structure active clamp for the protection of a power device against overvoltages includes a plurality of serially connected diodes, each having a first and a second electrode, obtained in a lightly doped epitaxial layer of a first conductivity type in which the power device is also obtained; a first diode of said plurality of diodes has the first electrode connected to a gate layer of the power device and the second electrode connected to the second electrode of at least one second diode of the plurality whose first electrode is connected to a drain region of the power device; said first diode has its first electrode comprising a heavily doped contact region of the first conductivity type included in a lightly doped epitaxial layer region of the first conductivity type which is isolated from said lightly doped epitaxial layer by a buried region of a second conductivity type and by a heavily doped annular region of the second conductivity type extending from a semiconductor top surface to said bu

Abstract: An integrated structure protection circuit suitable for protecting a power device against overvoltages comprises a plurality of serially connected junction diodes, each having a first electrode, represented by a highly doped region of a first conductivity type, and a second electrode represented by a medium doped or low doped region of a second conductivity type. A first diode of said plurality has its first electrode connected to a gate layer of said power device and its second electrode connected to the second electrode of at least one second diode of said plurality, and said at least one second diode has its first electrode connected to a drain region of the power device. The doping level of the second electrode of the diodes of said plurality is suitable to achieve sufficiently high breakdown voltage values.

Abstract: A circuit to limit the maximum current passed from a power transistor (T'p) to a load (ZL) which is connected to an output terminal of the transistor. The circuit includes an error amplifier (1'), a driver circuit (P') for the transistor (T'p), and a current detector for detecting the current (IL) flowing through the load (ZL). The current detector is provided with at least first and second terminals, includes a circuit block (2) having an input terminal connected to the control terminal of (T'p) and an output terminal connected to the current generator internal to the amplifier (1'), one input (B') of the amplifier (1') being connected to the first terminal of (Rs) and the other input (A') connected to the second terminal of (Rs). The introduction of the circuit block lowers the open-loop system gain making it stable and producing a smooth reduction of any rise in the load current (IL).

Abstract: In a MOS-technology power device chip and package assembly, the MOS-technology power device chip comprises a semiconductor material layer in which a plurality of elementary functional units is integrated, each elementary functional unit contributing a respective fraction to an overall current and including a first doped region of a first conductivity type formed in the semiconductor layer, and a second doped region of a second conductivity type formed inside the first doped region; the package comprises a plurality of pins for the external electrical and mechanical connection; the plurality of elementary functional units is composed of sub-pluralities of elementary functional units, the second doped regions of all the elementary functional units of each sub-plurality being contacted by a same respective metal plate electrically insulated from the metal plates contacting the second doped regions of all the elementary functional units of the other sub-pluralities; each of the metal plates are connected, through

Abstract: Integrated structure bipolar transistors with controlled storage time are manufactured by forming at least one bipolar transistor occupying a first area on a first surface of the silicon material, covering the first surface of the silicon material with an insulating material layer, and selectively removing the insulating material layer to open a window. The window has a second area much smaller than the first area occupied by the bipolar transistor. Therefore, by implanting into the silicon material a medium dose of platinum ions through the window and diffusing into the silicon material the implanted platinum ions, a uniform distribution of platinum inside the transistor is obtained.

Abstract: Integrated structure bipolar transistors with controlled storage time are manufactured by forming at least one bipolar transistor occupying a first area on a first surface of the silicon material, covering the first surface of the silicon material with an insulating material layer, and selectively removing the insulating material layer to open a window. The window has a second area much smaller than the first area occupied by the bipolar transistor. Therefore, by implanting into the silicon material a medium dose of platinum ions through the window and diffusing into the silicon material the implanted platinum ions, a uniform distribution of platinum inside the transistor is obtained.

Abstract: A monolithically integrated, transistor bridge circuit of a type suiting power applications, comprises at least one pair of IGBT transistors (M1 , M2) together with vertically-conducting bipolar junction transistors transistors (T1, T2). These IGBT transistors are laterally conducting, having drain terminals (9, 19) formed on the surface of the integrated circuit (1), and through such terminals, they are connected to another pair of transistors (T1, T2) of the bipolar type.

Abstract: A method for loading the memory of an electronic controller operating using fuzzy logic, whereby predetermined membership functions of logic variables, defined within a universe of discourse sampled in a finite number of points, are subjected to inference operations basically configured as IF/THEN rules with at least one front preposition and at least one rear implication. The controller includes a central control unit provided with a memory section for storing predetermined values of the membership functions which appear in the front or IF part of the fuzzy rules and have a predetermined degree of truth or membership. This method provides for storing the memory section the only values of those membership functions that have a value of the degree of membership other than zero at the points of the universe of discourse.

Abstract: A television signal scanning conversion device of the type comprising at least one filtering block having a plurality of digital inputs which receive through an interface components of an interlaced television signal comprises also at lease one calculation block connected to the signal inputs and operating with fuzzy logic. The calculation block is capable of executing a switch between at least two different interpolation procedures, to wit interfield and intrafield.