Abstract: An amplifier having an inverting and a non-inverting input and at least one output is compensated by dynamically varying the transconductance of a gain stage in accordance with the gain of the output stage of the amplifier. The amplifier comprises a gain section having at least one output, where a gm of the gain section varies with a transconductance control signal. The amplifier further comprises an output stage comprising a output drive device controlled by an output of the gain section. A bias control circuit is coupled to drive the transconductance control input of the gain section, the bias control circuit increasing a differential mode transconductance of the first gain stage when the active pullup or pulldown output drive device has low gain.

Abstract: A non-volatile memo includes the reference cells programmed to opposite logic states whose outputs are combined and then equally divided to provide a reference signal to a sense amplifier which is one half of the sum of the signals from a high conductivity data cell and a low conductivity data cell. The non-volatile memory also includes a bias voltage generator which uses a high conductivity non-volatile reference cell for a reference, and which produces a bias voltage which is coupled to current limiting transistors at the inputs of the sense amplifier so that the current into the sense amplifier is limited and therefore limits the power used by the non-volatile memory.

Abstract: A stereo digital-to-analog converter is able to operate in an 8 pin package yet to operate under a variety of serial data input formats. The normal de-emphasis pin can be used for receiving a static de-emphasis signal, an external serial clock, or programming data for the serial data formats. In addition metal and wire bond options are used to provide more flexibility in the manufacturing process.

Abstract: A analog calibration signal including at least one frequency component is generated by a very pure signal source, such as a digital oscillator and a digital-to-analog converter (DAC) that has been calibrated to be ultralinear. The analog calibration signal is converted by an analog-to-digital converter (ADC) to a digital signal. The digital signal is digitally compensated in accordance with compensation coefficients to produce a compensated digital signal. The compensated digital signal is digitally processed to isolate and measure distortion components, and the compensation coefficients are adjusted in response to the distortion components in order to reduce the distortion components. Feedback causes the distortion components to be minimized so that the compensation coefficients correct the nonlinearity in the analog-to-digital converter.

Abstract: Abnormal changes in the non-linear characteristics of electronic components are an indication of abnormal conditions such as impending component or system failure. To detect such abnormal changes in nonlinearity, an electronic circuit is subjected to a calibration signal including at least one frequency component. Nonlinearity in the electronic circuit causes distortion components to be generated from the calibration signal. Preferably the nonlinearity is characterized by compensation coefficients that digitally compensate the nonlinearity. The compensation coefficients are adjusted in a feedback loop in response to measured values of the distortion components, so that the distortion components are minimized. At the end of the adjustment process, the transfer function of the electronic circuit is specified by the compensation coefficients, which are stored in memory.

Abstract: A decimation filter includes a plurality of integration stages, at least one decimation stage, and a plurality of differentiation stages followed by a FIR filter. At least one of the integration stages, the decimation stage, and the differentiator stages, and the FIR filter are implemented in a single ALU which includes a single adder, a ROM, and a RAM. The different sampling rates of the integrator stage and the FIR filter requires the storage of intermediate results in RAM of the FIR filter calculations.

Abstract: An amplifier with controlled output impedance utilizing current and voltage feedback to set gain and output impedance is disclosed. The voltage feedback is provided by feedback resistor connected from the output to the inverting input. The current feedback is provided by feeding a current proportional to the output current directly to the inverting input of the amplifier. An error amplifier is used to maintain the proper ratio of the current feedback to the output current and to cancel the effects of the output device impedance on the overall output impedance. Two such amplifiers driven by complimentary signals form a differential amplifier with controlled output impedance. Because the output impedance is a function of the voltage feedback resistance and the current feedback ratio, it is possible to digitally control the output impedance by changing the feedback resistance and/or the current feedback ratio.

Abstract: Digital linearity correction is obtained by generating a digital calibration signal having at least one frequency component, converting the digital calibration signal to an analog signal, and detecting distortion in the analog signal generated from the calibration signal by nonlinearity to produce a compensation coefficient used to digitally compensate the digital input of the digital-to-analog converter. The compensation coefficient is adjusted in a feedback loop so that the distortion is minimized. Preferably the calibration signal has two frequencies, and the distortion is an intermodulation component having a substantially lower frequency. The intermodulation component, for example, is selected by an R-C low-pass filter, digitized by an analog-to-digital converter, and detected by digital signal processing. The analog-to-digital converter may have low resolution, low dynamic range and a low sampling rate.

Abstract: A ratiometric converter receives an external sense signal and external reference signal and provides an output signal which is proportional to the sense signal and inversely proportional to the reference signal. Electromagnetic interference and noise coupled onto the sense and reference lines are effectively removed by converting the sense signal to a digital signal and converting the reference signal to a digital signal. The digital sense signal is then filtered through a low pass filter to provide a filtered signal, and similarly, the digital reference signal is filtered through a low pass filter to provide a filtered digital reference signal. A divider circuit then divides the filter digital sense signal by the filter digital reference signal to provide the output signal.

Abstract: The present invention relates to a signal driver circuit for driving a liquid crystal display panel. The signal driver circuit provides level shifting within the circuit to lower the power consumption of a liquid crystal display module while still providing a wide analog voltage range to the liquid crystal display elements. Furthermore, reference voltages are provided to decoding circuits by using distributed resistors. The decoding circuits utilize a cell layout that allows data to bused into the cell through polysilicon that also operates as the gate of the decode input transistors. The decode input transistors are arranged in strands of abutting transistors which may be connected in series or in parallel. Moreover, the decode cell input transistors may all be of the same conductivity type.

Abstract: A 1-bit discrete time digital-to-analog converter which samples a reference voltage and ground potential onto two charging capacitors during a sample phase of each sampling period, and which transfers the charge on one of the capacitors, as determined by a digital input signal, onto an integrator during a transfer phase of said sampling circuit, draws current from the reference voltages which is independent of the data into the converter. The improvement comprises the addition of at least one phase to each sampling period so that the current drawn from said reference voltage is essentially independent of said digital input signal.

Abstract: The output gates of a delta-sigma modulator can generate i(t) transient signal in the power supply lines of a delta-sigma modulator. These i(t) spikes, which would otherwise produce non-linearities which can be coupled into the frequency band of interest of the modulator, are made to be linear by using return-to-zero data encoding and by providing multi-bit outputs to the delta-sigma modulator in which the output states all have equal numbers of logic ones at the output lines for each of the output states.

Abstract: A switched-capacitor integrator with chopper stabilization performed at the sampling rate virtually eliminates the flicker noise and any low frequency interference generated by the amplifier. The integrator samples the input and then passes the sampled input to the feedback capacitor during each chopping phase of the amplifier to thereby provide a double-sampled integrator. The output of the integrator is sampled at the end of each cycle of the chopping signal.

Abstract: An integrated circuit apparatus and method is provided for utilizing voltage dividers and differential amplifiers. An apparatus and method for dividing a voltage with a resistor voltage divider and for employing the voltage divider in an integrated circuit. The resistor voltage divider utilizes inaccessible compensation taps that are placed between nonlinearly spaced output taps. The compensation taps reduce the impact of tap resistance on the voltage divider transfer function. The number of inaccessible compensation taps placed between output taps is dependant upon a chosen tap density that is substantially maintained across the body of the resistor voltage divider. The resistor may be used in integrated circuits employing amplifiers, such as volume control circuitry. A differential amplifier is provided with an input common mode feedback loop that compensates for signal distortion due to a common mode signal.

Abstract: A method and apparatus for calibration of errors in a monolithic reference includes a bandgap voltage reference (50) that outputs an untrimmed voltage and a temperature voltage. The untrimmed voltage and temperature voltage are input to a delta-sigma A/D converter (52) which has the output thereof processed through a digital filter (54) to output data on a data bus (58) for storage in an EEPROM (60). The EEPROM (60) is operable in one mode to store temperature history data and, in another mode, to store temperature compensation data. In one mode, temperature compensation parameters are retrieved from the EEPROM (60) and utilized by a multiplier/accumulator circuit (74) to generate compensation factors which are output as a digital word to a DAC (76) for controlling a trim circuit (14). The trim circuit (14) provides a temperature compensation for the output of the bandgap voltage reference (50).

Abstract: An audio mixer circuit on an integrated circuit chip performs a calibration operation on power up which calibrates out most of the offset voltages of the operational amplifiers used in the mixer. The calibration logic includes a shared calibrate circuit which provides timing signals to each operational amplifier and its associated calibration circuitry. The calibration operation is performed by digitally controlling and changing the bias current into each of the operational amplifiers until the offset voltage is compensated. A class A flip-flop circuit is used in the digital counter of the calibration circuitry to drive a current digital-to-analog converter.

Abstract: A modified lossy integrator digital-to-analog converter includes an amplifier (46) that receives an input on a summing node (48) and provides an output on a node (52). A feedback capacitor (50) is disposed across the input and output and has an output switched-capacitor (54) disposed in parallel therewith to passively distribute the charge thereacross. Switches (60) and (66) are operable to control the switching operation of the capacitor (54). Two input switched capacitors (70) and (94) are controlled by associated switches to switch charge onto the summing node (48) in a first clock cycle .phi..sub.2. A one-bit data stream modulates the operation such that either the charge from the capacitor (78) is dumped onto the summing node (48) or the charge from the capacitor (94) is dumped onto the summing node (48). This operation during the .phi..sub.2 cycle provides an integrated output that is slew-limited.

Abstract: The thermal noise generated through the feedback capacitor of a delta-sigma modulator is attenuated by transferring a reference voltage through the capacitor in two separate steps during each sampling period. This permits a reduction in the size of the feedback capacitor, thereby reducing thermal noise, without increasing the voltage on the switching capacitors on the summing node side of the feedback capacitors which would induce degradation due to hot electron effects.

Abstract: An apparatus and method is provided for dividing a voltage with a resistor voltage divider and for employing the voltage divider in an integrated circuit. The resistor voltage divider utilizes inaccessible compensation taps that are placed between nonlinearly spaced output taps. The compensation taps reduce the impact of tap resistance on the voltage divider transfer function. The number of inaccessible compensation taps placed between output taps is dependant upon a chosen tap density that is substantially maintained across the body of the resistor voltage divider. The resistor may be used in integrated circuits employing amplifiers, such as volume control circuitry.

Abstract: A low drift integrated circuit resistor structure has a forced high end and a forced low end. A sense high connection is located proximate to the force high connection, and a sense low connection is located proximate to the force low connection. The structure also has at least one internal sense connection. This structure can be used in an instrumentation amplifier that includes an operational amplifier which regulates the current between the force high connection and the force low connection in response, in part, to the current sensed in the internal sensing connection of the resistor structure. The sense high connection and the sense low connection form the outputs of the instrumentation amplifier.