Patents Assigned to Cypress Semiconductor
  • Publication number: 20220196437
    Abstract: A method can include in a first phase of a sensing operation, controlling at least a first switch to energize a sensor inductance; in a second phase of the sensing operation that follows the first phase, controlling at least a second switch to couple the sensor inductance to a first modulator capacitance to induce a first fly-back current from the sensor inductance, the first fly-back current generating a first modulator voltage at the first modulator capacitance, and in response to the first modulator voltage, controlling at least a third switch to generate a balance current that flows in an opposite direction to the fly-back current at the first modulator node. The first and second phases can be repeated to generate a first modulator voltage at the first modulator capacitance. the modulator voltage can be converted into a digital value representing the sensor inductance. Related devices and systems are also disclosed.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 23, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Andriy Maharyta, Mykhaylo Krekhovetskyy
  • Publication number: 20220200438
    Abstract: A system includes a transformer having a primary winding and an auxiliary winding at a primary side of an AC-DC converter, the auxiliary winding reflecting an output voltage of a secondary winding of the transformer. A primary side controller includes an over-voltage protection (OVP) pin and an OVP circuit. A voltage divider includes a first resistor coupled between the auxiliary winding and the OVP pin and a second resistor coupled between the first resistor and a ground. The voltage divider provides, to OVP pin, a reduced voltage that is proportional to the output voltage. In absence of a pulse signal from a secondary side controller, the OVP circuit turns off a gate driver that drives a primary switch in response to the OVP voltage exceeding a reference OVP voltage. The primary switch is coupled between the primary winding of the transformer and the ground.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Rashed Ahmed, Murtuza Lilamwala
  • Publication number: 20220190960
    Abstract: Disclosed are techniques for removing dribble bits following the end-of-packet (EOP) of a High-Speed data packet inserted by the transmission envelope detector of a repeater/hub that interconnects electronic devices compliant with Universal Serial Bus (USB) Specification Revision 2.0 or higher. A physical layer logic (PHY) of a first port of the repeater/hub receives a High-Speed data packet to store a recovered bit stream into an elastic buffer. The recovered bit stream may include dribble bits inserted by the PHY after the EOP. The repeater/hub reads the recovered bit stream from the elastic buffer for transmission through the PHY of a second port. The repeater/hub monitors the EOP. When the EOP is detected, the repeater/hub prevents transmission of the dribble bits of the recovered bit stream following the EOP from the second port, eliminating the intended receiver of the High-Speed data packet from the complexity of dealing with dribble bits.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 16, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Godwin Gerald Arulappan, Pradeep Kumar Bajpai
  • Patent number: 11362667
    Abstract: A device includes a master delay-lock loop (DLL) having a phase frequency detector connected in series with a charge pump that is to generate a control voltage. A slave DLL is coupled to the master DLL and has a delay line including a buffer to receive a slave clock and a series of delay cells coupled between the buffer and an output terminal that is to output a delay clock, the series of delay cells variably controlled by the control voltage. The master DLL and the slave DLL are powered by a power supply that experiences undershoot or overshoot in response to a load transient. A dummy load is coupled between the delay line of the slave DLL and an output of the power supply, the dummy load including an exclusive OR gate that receives, as inputs, a first output of the buffer and the delay clock.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: June 14, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kazuyoshi Futamura, Kazuhiro Tomita, Koji Okada, Hiroyuki Matsunami
  • Publication number: 20220182845
    Abstract: An apparatus is provided. The apparatus comprises a controller configured to operate in an access point (AP) mode. The apparatus also includes a processing device. The processing device is configured to transmit a signal to one or more stations (STAs) to prevent the one or more STAs from using a frequency band. The frequency band is shared by the one or more STAs and a radio. The processing device is also configured to detect that the frequency band is available for use by at least one STA of the one or more STAs to transmit uplink signals to the controller without interfering with the radio; and in response, transmit a trigger frame to the at least one STA to schedule the at least one STA to transmit the uplink signals to the controller using the frequency band.
    Type: Application
    Filed: October 15, 2021
    Publication date: June 9, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventor: Rajendra Kumar Gundu Rao
  • Patent number: 11355185
    Abstract: A semiconductor device that has a silicon-oxide-nitride-oxide-silicon (SONOS) based non-volatile memory (NVM) array including charge-trapping memory cells arranged in rows and columns and configured to store one of N×analog values. Each charge-trapping memory cells may include a memory transistor including an angled lightly doped drain (LDD) implant extends at least partly under an oxide-nitride-oxide (ONO) layer of the memory transistor. The ONO layer disposed within the memory transistor and over an adjacent isolation structure has the same elevation substantially.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: June 7, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Krishnaswamy Ramkumar, Venkatraman Prabhakar, Vineet Agrawal, Long Hinh, Santanu Kumar Samanta, Ravindra Kapre
  • Patent number: 11356058
    Abstract: An example voltage controlled oscillator includes an inductor, a capacitor coupled to the inductor, and a signal source coupled to the inductor and the capacitor to sustain an oscillating signal. The voltage controlled oscillator includes a first varactor coupled to the inductor and the capacitor, wherein the first varactor is biased by a first bias voltage and is configured to change a frequency of the oscillating signal based on a first control voltage signal. The voltage controlled oscillator includes a second varactor coupled to the inductor, the capacitor, and the first varactor, wherein the second varactor is biased by a second bias voltage and is configured to compensate temperature variation of the frequency of the oscillating signal over a plurality of frequency bands based on second control voltage signal.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: June 7, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Chenxi Huang, Yung Chen
  • Publication number: 20220171481
    Abstract: A sense unit for inductive sensing or capacitive sensing is described. The sense unit may include a first terminal coupled to a first node, a first electrode coupled to the first node, and a second terminal. The sense unit may include a second electrode coupled to the second terminal. In a first mode, a first signal is received at the first terminal and a second signal is output on the second terminal, where the second signal may be representative of a capacitance of the sense unit. The sense unit may include an inductive coil. The sense unit may include a first capacitor. The inductive coil and the first capacitor are coupled in parallel between the first node and ground. In a second mode, a third signal is received at the first terminal and a fourth signal is output on the second terminal.
    Type: Application
    Filed: November 23, 2021
    Publication date: June 2, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Markus Unseld, Cathal O'Lionaird, Paul Walsh, Oleksandr Hoshtanar
  • Publication number: 20220164057
    Abstract: A touch screen display and corresponding devices and methods are disclosed, the touch screen display comprising a touchscreen having a plurality of capacitive sensors and a passive dial having one or more conductive elements, the passive dial mounted within an active area of the touchscreen such that the one or more conductive elements are proximate to the face of the touchscreen and move in conjunction with a rotation of the passive dial. The touch screen display may further include a touchscreen controller to detect an angle of the passive dial using conventional capacitive sensing techniques.
    Type: Application
    Filed: September 1, 2021
    Publication date: May 26, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Andriy Yarosh, Jens Weber
  • Patent number: 11343778
    Abstract: Systems, methods, and devices shape waveforms associated with transmission of data from wireless communications devices. Methods may include identifying, using a processing device, a plurality of portions of a Bluetooth packet for transmission from a wireless communications device, the plurality of portions comprising a first portion and a second portion. Methods may also include determining, using the processing device, a first transmit power associated with the first portion and a second transmit power associated with the second portion, the determining being based, at least in part, on whether the first portion or second portion is used in packet detection. Methods may further include transmitting the first portion of the Bluetooth packet using the first transmit power, and transmitting the second portion of the Bluetooth packet using the second transmit power.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: May 24, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kamesh Medapalli, Yanbing Zhang, Yan Li, David G. Wright
  • Patent number: 11342429
    Abstract: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 24, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Shenqing Fang, Chun Chen, Unsoon Kim, Mark T. Ramsbey, Kuo Tung Chang, Sameer S. Haddad, James Pak
  • Publication number: 20220141709
    Abstract: A multi-protocol network and methods for operating the same are provided. The method begins with establishing a wireless-connection between a first transceiver in a first device and a second-transceiver in a second device using a wireless-protocol. First, wired-protocol packets and non-packet data are received and converted in the first device to second-packets compatible with the wireless-protocol by inserting synchronization-bits non-packet data in a preamble field of the packets. This is initiated by sensing arrival of the preamble without waiting for a start of data, thus lowering the latency of the propagation of the second-packets. The second-packets are transmitted from the first transceiver to the second, and converted to third-packets compatible with the wired-protocol by removing the synchronization-bits. Latency is improved by initiating/starting a packet to the wired controller before a data portion of the packet is received.
    Type: Application
    Filed: September 24, 2021
    Publication date: May 5, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Victor Simileysky, Kiran Uln, Saishankar Nandagopalan
  • Publication number: 20220141250
    Abstract: A device may generate network profile data indicating a set of network parameters detected by the device. The device may encrypt the network profile data and may transmit the encrypted network profile data to a network device, such as a router, or a server. The router or server may analyze the encrypted network profile data to determine if the device is secure. The router of server may perform one or more security measures if the device is not secure.
    Type: Application
    Filed: October 4, 2021
    Publication date: May 5, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventor: Hui Luo
  • Patent number: 11320946
    Abstract: Embodiments described herein provide capacitive sensor devices and methods for operating capacitive sensor devices. A first number of electrodes on the capacitive sensor array is activated. A signal is received from each of the first number of electrodes with a second number of receiver circuits on a controller associated with the capacitive sensor array. The first number is greater than the second number. It is determined if an object is proximate the capacitive sensor array based on the signals received from the first number of electrodes.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: May 3, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Viktor Kremin, Roman Ogirko
  • Patent number: 11316441
    Abstract: Controlling gate-source voltage with a gate driver in a secondary-side integrated circuit (IC) controller for a secondary-controlled AC-DC converter is described. In an example embodiment, the gate driver is configured to programmably control the gate-source voltage and the slew rate of a secondary-side provider field effect transistor (FET) in the converter.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: April 26, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventor: Pulkit Shah
  • Patent number: 11316687
    Abstract: Disclosed are apparatus and methods for programming a plurality of nonvolatile memory (NVM) devices. Each NVM device self-generates and stores a unique encryption key. Each NVM device concurrently receives an image from a multiple-device programming system to which all the NVM devices are communicatively coupled. Each NVM device encrypts the received image using such NVM device's unique encryption key to produce a unique encrypted image for each NVM device. Each NVM device stores its unique encrypted image within a nonvolatile memory of such NVM device. The unique encryption key can then be securely transferred to a host device for decrypting the image accessed from one of the NVM devices.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: April 26, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Clifford Zitlaw, Markus Unseld, Sandeep Krishnegowda, Daisuke Nakata, Shinsuke Okada, Stephan Rosner
  • Patent number: 11307712
    Abstract: Systems, methods, and devices improve the sensitivity of capacitive sensors. Devices may include an attenuator configured to receive an input from at least one sense electrode of a capacitive sensing device. The attenuator may be included in a sensing channel of a capacitive sensor. Devices may further include a signal generator coupled to an input of the attenuator. The signal generator may include one or more processors configured to generate a sinusoidal signal based, at least in part, on one or more noise characteristics of a scan sequence associated with one or more transmit electrodes of the capacitive sensing device, and provide the sinusoidal signal to the input of the attenuator.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: April 19, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Viktor Kremin, Oleksandr Pirogov, Vadym Grygorenko, Jens Weber
  • Publication number: 20220116771
    Abstract: Devices, systems and methods use a first communication interface to connect with a local device via a first protocol and use a second communication interface to connect with a server via a second protocol. Embodiments relay secure communications between the local device and the server for authentication of the at least one local device by the server and responsive to authentication of the local device by the server, transmit information for storage in a secure memory of the authenticated local device.
    Type: Application
    Filed: October 6, 2021
    Publication date: April 14, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Hui Luo, Hongwei Kong, Kaiping Li, Sungeun Lee, Sridhar Prakasam
  • Publication number: 20220113855
    Abstract: Disclosed are sensing systems and methods that eliminate CPU intervention or interrupts when performing sensor scans of a touch interface, supports low power sensing operation without requiring periodic wake up of the CPU, and is scalable to multi-channel or multi-chip sensor configuration to support large touch screens or a high number of sensors. A sensor scanning module may operate in a chained-scan using direct memory access (CS-DMA) mode or an autonomous scan-multiple scan (AS-MS) mode to perform scanning of all sensors within a frame without requiring CPU intervention or generating CPU interrupts after every scan in the frame. The sensor scanning module may operate autonomously in a low-power always-on scan (LP-AOS) mode for multiple frames without CPU interaction until a touch event is detected. The CPU may operate in a low power sleep mode during the scan while providing consistent refresh rate and low touch-to-system wake up latency.
    Type: Application
    Filed: August 3, 2021
    Publication date: April 14, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Vibheesh Bharathan, Andrew Kinane
  • Patent number: 11300536
    Abstract: Technology directed to non-contact liquid sensing is described. One processing device includes a multi-port network, a capacitance measurement circuit, and a digital processing circuit. Processing device measures a first set and a second set of currents associated with a first electrode and a second electrode coupled to an exterior surface of a container holding liquid. Processing device determines independent impedances of the container, the liquid, and the liquid and container using the first set of currents and the second set of currents. Processing device determines an electrical property of the liquid using the independent impedances of the liquid.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: April 12, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Igor Kolych, Igor Kravets, Oleksandr Karpin, Andriy Maharyta