Patents Assigned to Cypress Semiconductor
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Publication number: 20240430870Abstract: A method includes receiving a plurality of frames from an access point. The method further includes determining a carrier frequency offset (CFO) estimate for each of the plurality of frames received from the access point. The method further includes computing a final CFO estimate based on the CFO estimates. The method further includes changing, based on the final CFO estimate, a first phase of a radio frequency phase-locked loop (RF PLL) to a second phase.Type: ApplicationFiled: June 21, 2023Publication date: December 26, 2024Applicant: Cypress Semiconductor CorporationInventors: Amit Shaw, Nutan Reddy ANNAPU REDDY
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Patent number: 12174698Abstract: An apparatus for on demand access and cache encoding of repair data. In one embodiment the apparatus includes an integrated circuit having a data cache in data communication with a non-volatile memory, a controller of a built-in self-test-and-repair (BISTR) circuit, and a plurality of registers. The controller is configured to read data from the data cache and store it into a first of the plurality of registers.Type: GrantFiled: March 24, 2022Date of Patent: December 24, 2024Assignee: Cypress Semiconductor CorporationInventor: Senwen Kan
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Patent number: 12176909Abstract: Apparatuses and methods of capacitance-to-digital code conversion are described. One capacitance-to-digital converter (CDC) includes front-end circuitry, including a comparator. The CDC further includes a first capacitive digital-to-analog converter (CDAC) coupled to a first input of the comparator and, in a first phase, to a sensor cell. The CDC further includes a second CDAC coupled to a second input of the comparator and, in a second phase, to the sensor cell. The front-end circuitry provides a digital output. The digital output is proportional to a sensor capacitance of the sensor cell.Type: GrantFiled: October 20, 2021Date of Patent: December 24, 2024Assignee: Cypress Semiconductor CorporationInventors: Paul Walsh, Mark Healy
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Publication number: 20240421785Abstract: Implementations disclosed describe techniques and systems for calibrating parameters of a radio frequency power amplifier. The disclosed techniques include, among other things, identifying an initial power amplifier (PA) parameter set of a radio frequency (RF) module. A plurality of candidate PA parameter sets is generated. A set of error values for each of the plurality of candidate PA parameter sets is determined. A subset of the plurality of candidate PA parameter sets is identified. Each error value of the set of error values of each candidate parameter set in the subset satisfies an error threshold. A final PA parameter set is stored.Type: ApplicationFiled: June 16, 2023Publication date: December 19, 2024Applicant: Cypress Semiconductor CorporationInventors: Kuan-Yu Chen, Chun-Min Wang
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Publication number: 20240421717Abstract: A flyback-converter with synchronous-rectifier (SR) sense architecture is provided. A secondary side controller includes a SR-sense pin coupled through an external resistor to a drain of an SR on the secondary-side, a negative-sensing-detector, a peak-detector, a zero-crossing-detector, all coupled to the pin, and a resistor network (Rn) coupled between the pin and ground. The Rn includes a first resistor (R1) to couple the pin and to ground through a first switch (S1) during negative-sensing to divide a voltage (VSR_drain) coupled to the pin, and a second, higher resistance resistor (R2) to couple the pin to ground through a second switch (S2) during peak-detection to divide VSR_draincoupled to the pin. S1 and S2 are controlled by register-transfer-level circuit in the SSC. A line-feed-forward (LFF) circuit is coupled to the pin through an active diode to receive an undivided VSR_drain and mirrors diode current to control the converter in LFF mode.Type: ApplicationFiled: October 31, 2023Publication date: December 19, 2024Applicant: Cypress Semiconductor CorporationInventors: Partha MONDAL, Arun Khamesra, Santosh Kulkarni
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Publication number: 20240421824Abstract: A wireless device includes a radio having a front end and a first local oscillator (LO) and control logic coupled to the radio. The control logic determines, from a received trigger frame, a carrier frequency offset (CFO) between a first carrier frequency of the first LO and a second carrier frequency of a second LO of an access point operating in a multi-user transmission mode. The control logic triggers, based on the CFO, an LO trim of the first LO to adjust the first carrier frequency to match, within a threshold tolerance, the second carrier frequency. The radio can then transmit, to the access point, a protocol data unit frame using the trimmed first LO, the protocol data unit frame being associated with the multi-user transmission mode.Type: ApplicationFiled: June 16, 2023Publication date: December 19, 2024Applicant: Cypress Semiconductor CorporationInventors: Amit Shaw, Nutan Reddy Annapu Reddy
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Publication number: 20240422768Abstract: Systems, methods, and devices provide coexistence between collocated transceivers in wireless devices. Methods include receiving, at a scheduler, scheduling information identifying activity of a first transceiver during a designated period of time, and identifying, using a scheduler associated with a second transceiver, activity of the second transceiver during the designated period of time, the second transceiver being collocated with the first transceiver in a wireless device. Methods also include scheduling, using the scheduler, activity of the second transceiver based on an overlap of transmit activity of the first transceiver with transmit activity of the second transceiver.Type: ApplicationFiled: June 15, 2023Publication date: December 19, 2024Applicant: Cypress Semiconductor CorporationInventors: Sandeep Sarma Munukutla, Suprojit MUKHERJEE, Raghavendra KENCHARLA, Ayush SOOD
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Publication number: 20240419209Abstract: Systems and methods described herein fan out a source clock signal within the MCU to produce a plurality of clock signals. The systems and methods distribute the plurality of clock signals to a plurality of input/output (I/O) groups within the MCU, wherein each of the plurality of VO groups correspond to a different one of a plurality of power domains of the MCU. The systems and method provide the plurality of clock signals to a plurality of peripherals coupled to the plurality of I/O groups.Type: ApplicationFiled: June 14, 2023Publication date: December 19, 2024Applicant: Cypress Semiconductor CorporationInventor: Jiawei Liang
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Publication number: 20240421839Abstract: Methods and systems for improving digital pre-distortion calibration of a radio frequency power amplifier. The disclosed method includes, among other things, initiating digital pre-distortion calibration of a power amplifier of a radio frequency (RF) module, determining, based on a transmission power of a training signal transmitted to the power amplifier between a first transmission power value and a second transmission power value, a set of estimated coefficients, generating, based on a subset of the set of estimated coefficients, a set of predicted coefficients, wherein the set of predicted coefficients are derived from a fitting curve applied to the subset of the set of estimated coefficients, and storing the set of estimated coefficients and the set of predicted coefficients.Type: ApplicationFiled: June 14, 2023Publication date: December 19, 2024Applicant: Cypress Semiconductor CorporationInventors: Amit Shaw, Kempraju Gopinath
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Publication number: 20240410848Abstract: One or more computing devices, systems, and/or methods are provided. In an example, a method comprises measuring a first charge generated by a first excitation signal and transferred during a first time interval to a first electrode mounted to a container holding a test fluid, measuring a second charge generated by a second excitation signal and transferred during a second time interval to the first electrode, and determining a parameter of the test fluid based on a first charge transfer curve generated based on the first charge and the second charge.Type: ApplicationFiled: June 6, 2023Publication date: December 12, 2024Applicant: Cypress Semiconductor CorporationInventors: Volodymyr BIHDAY, Yaroslav BERKO, Igor KRAVETS, Mykhaylo KREKHOVETSKYY, VasyI MANDZIY, Marian MULIARCHYK, Andrii Tsemko
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Publication number: 20240409008Abstract: A child detection device for a child safety seat for an automobile according to an example includes a plurality of sensors to be positioned on the child safety seat, wherein the plurality of sensors includes at least one capacitive sensor to generate analog capacitive signals. The child detection device includes a conversion circuit to convert the analog capacitive signals to digital capacitive values. The child detection devices includes a controller to identify movement of an object based on the digital capacitive values, and determine whether a child is positioned in the child safety seat based on the digital capacitive values and the identified movement.Type: ApplicationFiled: June 6, 2023Publication date: December 12, 2024Applicant: Cypress Semiconductor CorporationInventors: Volodymyr Bihday, Oleg Kapshii, Andriy Maharyta, Mykhaylo Krekhovetskyy, Marian Muliarchyk, Yaroslav Berko
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Patent number: 12166416Abstract: A power supply includes a first (main) power converter and a second (auxiliary) power converter disposed in parallel with the first power converter to produce an output voltage to power a dynamic load. The second power converter includes a primary inductive path magnetically coupled to a secondary inductive path. A controller controls a flow of first current through the primary inductive path of the second power converter to control flow of second current supplied by the secondary inductive path to the dynamic load. During steady state conditions, the first power converter produces the output voltage while the second power converter is deactivated. During transient load conditions, the second power converter provides current boost capability to maintain a magnitude of the output voltage within a desired range.Type: GrantFiled: September 27, 2021Date of Patent: December 10, 2024Assignees: Infineon Technologies Austria AG, Cypress Semiconductor (Canada), Inc.Inventors: Kennith K. Leong, Matthias J. Kasper, Luca Peluso, Darryl Tschirhart
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Patent number: 12167449Abstract: A method can include, in a wireless device connected to a first network and configured to transmit over a medium, while a detected packet is being received: determining if the detected packet has a network identification value, the network identification value identifying a network in which wireless devices are connected; when at least the network identification value of the detected packet matches that of the first network, setting a timer value that prevents transmissions on the medium by the wireless device during the duration of the detected packet; and when at least the network identification value of the detected packet does not match that of the first network, dropping the detected packet before it is fully received and not setting the timer value.Type: GrantFiled: October 5, 2021Date of Patent: December 10, 2024Assignee: Cypress Semiconductor CorporationInventors: Sri Ramya Thota, Ashok Nimmala, Suprojit Mukherjee, Ayush Sood, Rakshith Ravindra Gore
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Publication number: 20240406619Abstract: A method includes receiving a first signal, wherein the first signal is an audio signal. The method further includes providing the first signal to a first comparison circuit. The method further includes providing the first signal to a second comparison circuit. The method further includes receiving, from the first comparison circuit, a first comparison signal. The method further includes receiving, from the second comparison circuit, a second comparison signal. The method further includes providing a wake-up signal to a processing device based on the first comparison signal and the second comparison signal.Type: ApplicationFiled: June 5, 2023Publication date: December 5, 2024Applicant: Cypress Semiconductor CorporationInventors: Eashwar Thiagarajan, Rodolfo Gondim Lossio, Ding Ma, Nidhin Mulangattil Sudhakaran, Andrew Page, Ashutosh Pandey, Bert Sullam
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Publication number: 20240405905Abstract: A wireless device includes a receiver to receive a packet via one or more antennas. A frame synchronization detection circuit coupled to the receiver identifies a data pattern within a portion of the packet. A correlation circuit coupled to the frame synchronization detection circuit identifies one or more properties of the data pattern and computes one or more values of a correlation peak using a correlation method. An adaptive threshold circuit coupled to the correlation circuit determines a correlation threshold value using the one or more properties of the data pattern and the one or more values of the correlation peak.Type: ApplicationFiled: June 2, 2023Publication date: December 5, 2024Applicant: Cypress Semiconductor CorporationInventor: Claudio REY
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Publication number: 20240404544Abstract: A method includes receiving, by a processing device, an audio sample of a distorted voice. The method further includes extracting a first set of characteristics from the audio sample. The method further includes selecting a second set of characteristics. The second set of characteristics is associated with one of a set of reference audio samples. The method further includes generating an undistorted audio sample. The undistorted audio sample is based on the distorted audio sample, the first set of characteristics, and the second set of characteristics.Type: ApplicationFiled: June 5, 2023Publication date: December 5, 2024Applicant: Cypress Semiconductor CorporationInventors: Oleg KAPSHII, Igor KRAVETS, Andrii TSEMKO, Ashutosh PANDEY
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Patent number: 12160737Abstract: In general, techniques are described by which to perform secure fine time measurement for wireless communication protocols. An initiating station comprising wireless communication circuitry may be configured to perform the techniques. The wireless communication circuitry may be configured to receive, in accordance with a wireless networking protocol for communicating between the initiating station and a responding station, a first fine time measurement specifying a first time. The wireless communication circuitry may also be configured to receive, in accordance with the wireless networking protocol and for the corresponding first time, a first message integrity code. The wireless communication circuitry may next be configured to authenticate, based on the first message integrity code, the responding station to establish that the fine time measurement is from a trusted responding station.Type: GrantFiled: December 18, 2020Date of Patent: December 3, 2024Assignee: Cypress Semiconductor CorporationInventors: Hui Luo, Saishankar Nandagopalan
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Patent number: 12160756Abstract: Systems, methods, and devices perform unified demodulation operations for wireless communications devices. Methods may include receiving, at a buffer of a wireless communications device, a data packet, and performing, using a processing device, one or more synchronization operations based on one or more operational modes of a wireless communications protocol. Methods may additionally include identifying, using the processing device, a type of the data packet, configuring, using the processing device, a receive chain of the wireless communications device to perform a type of demodulation operation based on the identified type of the data packet.Type: GrantFiled: September 15, 2021Date of Patent: December 3, 2024Assignee: Cypress Semiconductor CorporationInventors: Yanbing Zhang, Hongwei Kong, Patrick Cruise
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Publication number: 20240394452Abstract: A method can include storing operation data in entries of memory mapped storage circuits of an integrated circuit (IC) device. The operation data of a single entry can include configuration data, an action value, and channel data having channel bits corresponding to different signal channels. Operation of the analog circuit can be configured with the configuration data. Signal channels to an analog circuit can be configured with channel data. In response to a first action value of the entry, selecting a next entry and the analog circuit and signal channels with configuration data of the next entry. In response to a second action value, ending operations of the analog circuit. Corresponding devices and systems are also disclosed.Type: ApplicationFiled: May 24, 2023Publication date: November 28, 2024Applicant: Cypress Semiconductor CorporationInventors: Bert Sullam, Nidhin MULANGATTIL SUDHAKARAN, Andrew PAGE, Eashwar THIAGARAJAN
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Publication number: 20240397416Abstract: Disclosed are methods and systems for a WLAN device to select an operating dynamic frequency selection (DFS) channel that minimizes the probability of radar interference by using aiding information. The aiding information may be a crowd-sourced database of geo-tagged radar zones including one or more DFS channels used within the geo-tagged radar zones that are detected by a plurality of WLAN devices. The WLAN device may query the crowd-sourced database for a geo-tagged radar zone that is nearby to determine if a radar operates on an overlapping DFS channel so it may switch to a different channel. In one aspect, the aiding information may be periodic special action frames broadcast by a WLAN beaconing device over the operating channel of the WLAN device. The special action frames may carry information on one or more channels used by a near-by radar and recommended alternative channels to use by the WLAN device.Type: ApplicationFiled: June 6, 2024Publication date: November 28, 2024Applicant: Cypress Semiconductor CorporationInventors: Dhruvaraja Kunjar, Vinoth Sampath