Patents Assigned to Dallas Semiconductor
  • Patent number: 6219789
    Abstract: An electronic module having at least a microprocessor and co-processor on a single integrated circuit. The electronic module can be contained in a small housing. The electronic module provides secure bidirectional data communication via a data bus. The electronic module may include an integrated circuit comprising a microprocessor, and a co-processor adapted to handle 1,024-bit modulo mathematics primarily aimed at RSA calculations. The electronic module is preferably contained in a small token sized metallic container and will preferably communicate via a single wire data bus which uses a one-wire protocol.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: April 17, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Wendell Little, Andreas Curiger, Stephen N. Grider, David A. Bunsey, James E. Bartling, Shyun Liu, Bradley M. Harrington
  • Patent number: 6217213
    Abstract: A temperature-controlled counter/clock arrangement is provided where th rate or frequency of the counting is temperature dependent. This allows for a measuring of thermal accumulation and/or history. The temperature sensing is based upon the use of the varying current that will flow through a toward biased semiconductor diode. In one embodiment a constant voltage source is used so that the current variation will follow Arrhenius's law.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: April 17, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Michael L. Bolan, Kevin E. Deierling, William Lee Payne, II, Hal Kurkowski
  • Patent number: 6215635
    Abstract: A direct-to-digital temperature sensor is formed with a single switched-capacitor integrator, having a digital sequencer control.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: April 10, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventor: James Cong Nguyen
  • Patent number: 6209791
    Abstract: A secure monetary system comprises an electronic module and equipment to access the electronic module. The electronic module comprising a substantially token-shaped module and secure memory circuitry to store monetary information. The secure memory positioned in the substantially token-shaped module. The equipment accesses and manipulates the monetary information stored in the memory in the electronic module. The equipment comprises memory to store control and encryption programs and the memory is coupled to a microprocessor, which is also coupled to the electronic module and a control panel. The microprocessor is secure.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: April 3, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Michael L. Bolan
  • Patent number: 6208114
    Abstract: An apparatus for monitoring the condition of a battery. The apparatus includes a battery clip that is used to secure a battery to a battery connection and a battery monitoring IC. The battery monitoring IC takes a “load vs. no-load measurement” and the results are recorded in a register. When the battery reaches a certain low voltage state, register bits are set and an output is generated. Furthermore, the exemplary embodiment includes a removal detection circuit for detecting removal and replacement of the battery and for preventing voltage floating on the battery output line.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: March 27, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Brian W. Jones, Scott E. Jones
  • Patent number: 6198329
    Abstract: A circuit and associated method for determining the offset bias of a comparator by first shorting together the inputs of the comparator to apply the same voltage signal at each of the inputs of the comparator. The voltage signal at one of the inputs is then offset a select amount by applying varying selected resistances from a variable resistor to the comparator. The variable resistor is controlled by a programmable controller that is responsive to an input clock signal. At each selected amount of offset applied to the input, the output is monitored to determine if the output of the comparator has flipped, or changed state. When the output flips, the corresponding resistance setting is used to compensate for the corresponding offset bias of the comparator.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: March 6, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: William Richard Ezell, Robert Mounger
  • Patent number: 6191955
    Abstract: An electronic module comprises (a) an electrical assembly of electrical components and a cap. The cap surrounds a portion of the electrical assembly of electrical components to form a pocket between a portion of the electrical assembly of electrical components and the cap. The cap has at least one sidewall, each of the at least one sidewalls having an end, one of at least one sidewalls proximately positioned to at least one electrical lead and having at least one notch positioned in the end, the pocket filled with an encapsulant. A process comprises providing a cap and filling the cap with encapsulant, placing an electrical assembly of electrical components in the cap filled with the preselected amount of encapsulant, and allowing the electrical assembly to seat to a proper depth.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: February 20, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Joe Guillot, Michael Quan Dinh, Bill Roberts, Linda M. McLemore
  • Patent number: 6182235
    Abstract: A microcontroller integrated circuit incorporating a user configurable pulse width modulator. The pulse width modulator circuitry is configurable to be a single, for example 32-bit pulse width modulator, or a plurality of pulse width modulators each having a bit width that is divisible by the single 32-bit pulse width modulator (e.g., 2, 4, 8 or 16-bit pulse width modulators).
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: January 30, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Edward Tang Kwai Ma, Frank Victor Taylor, III, Sai Bun Samuel Wong
  • Patent number: 6167527
    Abstract: An improved clocking system for micro controllers is provided. The micro controller has two mechanisms by which the clocking is provided. One clock is provided by an external clock signal which is generally crystal controlled. A second mechanism for providing the clock is also present. This second clock can be useful as the "primary" or first clock which is generally a crystal oscillator may take several milliseconds to stabilize following a restart from a stop mode. The second clock mechanism can for example be an internal ring oscillator or other type of clock which although not as accurate as a crystal clock does not require the several milliseconds to recover.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: December 26, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Wendell Little, Stephen Grider, Joseph Triece
  • Patent number: 6160458
    Abstract: A temperature compensated crystal oscillation circuit adapted to be contained within a small device package and providing an output frequency accuracy of approximately +/-2 ppm over a temperature range or less than 2 minutes per year over the temperature range. The device includes crystal and a single integrated circuit wherein the integrated circuit has a temperature sensing circuit with a digital output, control circuitry, a memory circuit and a switched capacitor array for compensating the oscillation of the crystal oscillator over temperature.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: December 12, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Douglas Gene Cole, Ranganath Bagade, Titkwan Hui
  • Patent number: 6145035
    Abstract: A system comprising a card device for effectuating a transaction when presented to a transaction terminal, the card device including a memory and a first energy source, the source for powering the memory for a period of time, and a card cradle carrier for storing the card device when the card device is not engaged in the transaction. The card cradle carrier is formed of a substantially rigid material and forms at least a portion of a personal effect. In accordance with the teachings of the present invention, the card cradle carrier includes a second energy source for recharging the first energy source when the card device is received for storage by the card cradle carrier.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: November 7, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Chao C. Mai, Francis A. Scherpenberg, Titkuan Hui, Wayne Mendenhall
  • Patent number: 6141764
    Abstract: An initializer that responds to change in a power supply potential level, for generating an initialize signal to initialize a circuit to a select state, the initializer includes a power-on reset circuit that switches between an active and a powered-down state, and is for generating the initialize signal. The initializer also includes a wake-up circuit that monitors the power supply potential level and switches the power-on reset circuit from the powered-down state to the active state when selected change in the power supply potential level occurs.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: October 31, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventor: Richard William Ezell
  • Patent number: 6137264
    Abstract: A rechargeable battery pack with low powered, gas gauge circuitry for monitoring and accumulating various operating parameters of the rechargeable battery pack, includes a current monitor for measuring the current flow into and out of a battery cell in the rechargeable battery pack. An integrated current accumulator connected to the current monitor is used to maintain a measure of the net charge having flowed into and out of the battery cell. A charging current accumulator, which is also coupled to the current monitor, is used to maintain a measure of the total charge having flowed into the battery cell, while a discharging current accumulator is used to maintain a measure of the total charge having flowed out of the battery cell. A highly accurate oscillator is used to drive the accumulators to greatly increase the accuracy of the gas gauge functions derived therefrom.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: October 24, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Richard E. Downs, Richard William Ezell, James M. Douglass
  • Patent number: 6122704
    Abstract: Coin-shaped one-wire communication modules with a flange for mounting convenience may be attached to contact extensions on items such as work totes for ease of communication. A host computer can keep track and locate multiple items which have mounted communication modules with use of a single data line and a single ground line for all of the modules.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: September 19, 2000
    Assignee: Dallas Semiconductor Corp.
    Inventors: Steven N. Hass, Michael L. Bolan
  • Patent number: 6118690
    Abstract: A dual storage cell memory includes an array of dual storage cells, each of the dual storage cells containing a first memory cell and a second memory cell. The first and second memory cells are well known six-transistor static memory cells with the addition of transfer circuitry for transferring data directly from the internal data nodes of each of the memory cells to its corresponding complementary memory cell without requiring the use of the enable transistors or the bit lines associated with each of the dual storage cells.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: September 12, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Ching-Lin Jiang, Clark R. Williams
  • Patent number: 6115441
    Abstract: A temperature detector comprising temperature sensing circuitry, calibration circuitry, and power regular circuitry. The temperature sensing circuitry has an output that varies with temperature to create a temperature variation. The calibration circuitry is coupled to receive the output that varies with temperature to create a temperature variation. The calibration circuitry interprets the temperature variation and outputs a valve that represents the temperature. The power supply regulator circuitry coordinates power to the temperature sensing circuitry.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: September 5, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: James Michael Douglass, Gary V. Zanders, Donald R. Dias, Robert D. Lee
  • Patent number: 6111734
    Abstract: An electrostatic discharge (ESD) protection circuit including a first isolation structure on a first path, a second isolation structure on a second path, and a discharging element such as a Harrington diode structure connected to the first and second isolation structures. The isolation structures may comprise resistive elements. The ESD protection circuit is adaptable for use with microcircuits positioned in portable data carriers.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: August 29, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Bradley M. Harrington, Thomas L. Polgreen
  • Patent number: 6112275
    Abstract: A method of communicating information between a host device and a potentially portable module device which measures thermal accumulation over time via a temperature controlled counter. The temperature controlled counter may operate using substantially Arrhenius' law. The host device communicates with the portable module via a single wire bidirectional data bus. The single wire bus and one-wire communication protocol allows data flow between a host and a plurality of devices connected to the single wire bus. The single wire bus allows for a great versatility of uses for the portable module.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: August 29, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Michael L. Bolan, Kevin E. Deierling, William Lee Payne, II, Hal Kurkowski, Donald R. Dias, Gary V. Zanders, Robert D. Lee, Guenter H. Lehmann
  • Patent number: 6108751
    Abstract: A system architecture which provides efficient data communication, over a one-wire bus, with a portable data module which does not necessarily include any accurate time base whatsoever. The time base in the module can be extremely crude (e.g. more than 4:1 uncertainty). An open-collector architecture is used, with electrical relations defined to absolutely minimize the drain on the portable module's battery. The protocol has been specified so that the module never sources current to the data line, but only sinks current. The protocol includes signals for read; write-zero; write-one; and reset. Each one-bit transaction is initiated by a falling edge from the host. The time base in the module defines a delay, after which (in write mode) the module tests the data state of the data line. In read mode, after a falling edge the module does or does not turn on its pull-down transistor, depending on the data value.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: August 22, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Robert D. Lee, Stephen M. Curry, Michael L. Bolan, Hal Kurkowski, Donald R. Diaz, Francis A. Scherpenberg, Kevin E. Deierling
  • Patent number: D430119
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: August 29, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Nicholas M. G. Fekete, Elaine J. Gattenby, Michael L. Bolan