Patents Assigned to Dallas Semiconductor
  • Patent number: 6105013
    Abstract: The present invention relates to an electronic module used for secure transactions. More specifically, the electronic module is capable of passing information back and forth between a service provider's equipment via a secure, encrypted technique so that money and other valuable data can be securely passed electronically. The module is capable of being programmed, keeping track of real time, recording transactions for later review, and creating encryption key pairs.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: August 15, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Donald W. Loomis, Christopher W. Fox
  • Patent number: 6091318
    Abstract: A metalization layer formed as part of a bump connection/flip chip process for a semiconductor circuit is also used to form a sense resistor or other passive components. The metalization layers normal composition can also be altered so as to change or control the value of the so formed resistor or to improve the temperature stability of the resistor. Other passive components such as capacitors or inductor can also be formed in this layer.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 18, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Robert D. Lee, Gary V. Zanders, James Walling, Steven N. Hass
  • Patent number: 6085983
    Abstract: A secure monetary system comprises an electronic module and equipment to access the electronic module. The electronic module comprising a substantially token-shaped module and secure memory circuitry to store monetary information. The secure memory positioned in the substantially token-shaped module. The equipment accesses and manipulates the monetary information stored in the memory in the electronic module. The equipment comprises memory to store control and encryption programs and the memory is coupled to a microprocessor, which is also coupled to the electronic module and a control panel. The microprocessor is secure.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: July 11, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Michael L. Bolan
  • Patent number: 6081154
    Abstract: Gas gauge circuitry for monitoring and accumulating various operating parameters of a rechargeable battery with selected parameters being used to determine the remaining operating life of a rechargeable battery, and includes a current monitor for measuring the current flow into and out of the rechargeable battery. An integrated current accumulator is connected to the current monitor and is used to maintain a net accumulated total of current flowing into and out of the rechargeable battery. A charging current accumulator, which is also coupled to the current meter is used to maintain the total current flowing into the rechargeable battery, while a discharging current accumulator is used to maintain the total current flowing out of the rechargeable battery. A highly accurate, oscillatory circuit is used to drive the accumulators to increase the accuracy of the gas gauge functions therefrom.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: June 27, 2000
    Assignee: Dallas Semiconductor
    Inventors: Richard William Ezell, James M. Douglass
  • Patent number: 6064316
    Abstract: An access control system, has at least one door to a secured area, each door having a strike plate, a host computer, at least one door control module coupled to the host computer, one door control module for every door; and at least one door reader coupled to the at least one door reader coupled to the door control module to activate the strike plate to release the door. The access control system further has at least one electro-mechanical key to independently actuate a lock that corresponds to the door(s). A master keying device to rekey the lock that corresponds to door(s). The host system records information selected from the group consisting of time of entry, place of entry, identification of entered party, and/or any combination thereof.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: May 16, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Mark Glick, Nicholas M. G. Fekete, Michael L. Bolan, Jeffrey D. Owens
  • Patent number: 6058467
    Abstract: An 8051 instruction set compatible microcontroller utilizing four or less clock cycles per machine cycle. The microcontroller is designed utilizing standard hardware design language techniques (HDL) and standardized cells. The microcontroller uses both a standard 8051 style special function register and a duplicate register to perform instructions requiring indirect memory accessing.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: May 2, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: David Broxterman, Stephen D. Sandelin
  • Patent number: 6036101
    Abstract: Coin-shaped one-wire communication modules with a flange for mounting convenience may be attached to contact extensions on items such as work totes for ease of communication.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: March 14, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Steven N. Hass, Michael L. Bolan
  • Patent number: 6038655
    Abstract: A microprocessor on-board RAM provides both the usual random access by addressing and a subset of memory cells with their contents continually available on a secondary bus paralleling the data bus. This secondary bus may be used for register indirect addressing without a separate register read when the RAM subset includes the registers for register indirect addressing. The processor also has a two stage output driver for limiting maximum output current and feedback-controlled clock period partitioning.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: March 14, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Wendell L. Little, Stephen N. Grider, Joseph Wayne Triece
  • Patent number: 6035382
    Abstract: An integrated circuit with a secure memory location is comprised of a memory and a circuit which receives a twenty-four bit command word. At least one location in the memory stores at least one secure subkey. The circuit responds to the command word with an access to a secure memory location if and only if the command word specifies a starting address of a secure subkey and the command word is transmitted in both true and bit complimented form. Each subkey is made up of a 64-bit ID field, a 64-bit password field and a 384 bit secured data field.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: March 7, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Robert D. Lee, Scott J. Curry
  • Patent number: 6028166
    Abstract: A method and apparatus for generating mixed and degassed resin. Resin is added to, and stored in, a feed tank where air is forced into the resin from the bottom of the tank to mix the resin. The resin is drawn into a hold tank through a feed-to-hold tank tube by creating a vacuum within the hold tank. Resin flows out of the tube and onto a rotating plate located within the hold tank. The rotating plate provides a surface area for degassing the resin and further directs the resin to an inner surface of the hold tank which provides additional surface area for degassing the resin. A hold tank proximity sensor detects when the hold tank is full of resin and the vacuum is terminated. A low level proximity sensor detects the absence of resin in a dispense tank and a crossover valve is opened, air pressure is applied to the hold tank and resin is forced from the hold tank and into the dispense tank via a hold-to-dispense tank tube.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: February 22, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventor: Joseph Martin Guillot, Jr.
  • Patent number: 6021494
    Abstract: This invention relates to a small portable microprocessor based circuit (electronic module) that contains information about the user of the circuit that is known or inherently known by the user. The circuit is small enough to fit inside a thickened U.S. nickel and enables a user to perform secure transactions such as money transfers, information transfers, access control, etc. The electronic module is designed to be extremely secure both physically and electronically. Furthermore, the electronic module is useless to a person other than the designated user.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: February 1, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Michael L. Bolan, Nicholas Fekete
  • Patent number: 6021046
    Abstract: A thermal protection system that comprises an assembly of at least one electrical component and a heat shield surrounding the electrical component, wherein the heat shield forms a pocket between the electrical element and the heat shield and associated methods. The electrical element has at least one electrical lead. The system permits the electrical lead(s) to increase in temperature sufficient to permit soldering of the electrical lead(s) to a second electrical element. The thermal protection system also comprises a heat sink to protect the electrical element, which comprises a heat capacity material. The system also comprises electrical lead(s) with a low-cross sectional area.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: February 1, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Neil McLellan, Mike Strittmatter
  • Patent number: 6020634
    Abstract: The replaceable power module includes a power section positioned between a cover and a frame. The cover is provided with clips to permit the attachment and detachment of the cover to the base as well the attachment and detachment of the power module to a surface mounted integrated circuit. The frame is provided with an opening for receiving the integrated circuit, and electrical contacts for electrically connecting the power module to the leads of an integrated circuit. The power section is electrically coupled to the frame and includes a battery and a crystal oscillator for controlling the integrated circuit.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: February 1, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Mark A. Gerber, Michael K. Strittmatter, Neil McLellan, Joseph P. Hundt
  • Patent number: 6018228
    Abstract: A battery charger with charging parameter values derived from communication with a battery pack to be charged. Communication is over a one-wire bus with battery pack transmissions in response to charger inquiries. The battery charger may be in the form an integrated circuit driving a power transistor or other controllable DC supply. A battery pack may contain a program with multiple charging currents and charging interval termination methods such as time, temperature rise, and incremental voltage polarity. A lack of communication may be invoke a default charging program or denial of access to the charger. The charger also communicates over a high-speed three-wire bus with an external computer for analysis of identification information acquired from the battery and for control of the charger.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: January 25, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: Donald R. Dias, Robert D. Lee
  • Patent number: 6016255
    Abstract: Coin-shaped one-wire communication modules with a flange for mounting convenience may be attached to contact extensions on items such as work totes for ease of communication. A host computer can keep track and locate multiple items which have mounted communication modules with use of a single data line and a single ground line for all of the modules.
    Type: Grant
    Filed: March 15, 1993
    Date of Patent: January 18, 2000
    Assignee: Dallas Semiconductor Corp.
    Inventors: Michael L. Bolan, Nicholas M. G. Fekete
  • Patent number: 6014051
    Abstract: A circuit, for incorporation into an electrical system, for providing a clock signal frequency to other circuitry such as a microprocessor and/or co-processor circuitry. The clock signal frequency varies its speed depending on the available voltage and current from a host power source. The circuit maximizes clock frequency by lowering the available voltage and increasing the available supply current. The circuit can therefore provide a higher clock speed and more current for switching transistors.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: January 11, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventor: Wendell L. Little
  • Patent number: 6011417
    Abstract: A circuit and associated method for determining the offset bias of a comparator by first shorting together the inputs of the comparator to apply the same voltage signal at each of the inputs of the comparator. The voltage signal at one of the inputs is then offset a select amount by applying varying selected resistances from a variable resistor to the comparator. The variable resistor is controlled by a programmable controller that is responsive to an input clock signal. At each selected amount of offset applied to the input, the output is monitored to determine if the output of the comparator has flipped, or changed state. When the output flips, the corresponding resistance setting is used to compensate for the corresponding offset bias of the comparator.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: January 4, 2000
    Assignee: Dallas Semiconductor Corporation
    Inventors: William Richard Ezell, Robert Mounger
  • Patent number: 6005424
    Abstract: An integrated dynamic interconnect device for connecting and disconnecting at least a portion of a parasitically powered integrated electronic circuit, includes a power input, a power output, a signal input to receive a connect/disconnect signal, and an integrated switching mechanism which is responsive to the signal input receiving a connect/disconnect signal to electrically connect and disconnect the power input and the power output.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: December 21, 1999
    Assignee: Dallas Semiconductor Corp
    Inventor: James M. Douglass
  • Patent number: 6002274
    Abstract: A transmission line sampling circuit for a T1 line is disclosed. A multi phase oscillator is connected to a plurality of state machines which are connected in parallel to a transmission line. The use of a plurality of state machines to sample the transmission line effectively increases the sample rate of the transmission line beyond that which can ordinarily be supported by a single phase oscillator running at the same frequency of the multi phase oscillator. The outputs of the plurality of state machines are provided to an arbitrator and to a MUX wherein the arbitrator decides which of the four state machines outputs should be switched through the MUX and produced transmitted on an output line.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: December 14, 1999
    Assignee: Dallas Semiconductor
    Inventors: Michael D. Smith, Michael R. Williamson
  • Patent number: 5998858
    Abstract: A secure electronic data module containing a monolithic semiconductor chip of the type having a memory that is protected by a combination of hardware and software mechanisms such that unauthorized access to the data stored in the memory is prevented. The monolithic semiconductor chip comprises a plurality of solder bumps for attaching the chip to a substrate that may be a printed circuit board or another chip; a multi-level interlaced power and ground lines using minimum geometries; and a detection circuit block for detecting an external trip signal that may be produced by a pre-specified change in an operating condition brought on by unauthorized accessing, or an internal trip signal that may be produced by shorting of power and ground lines or by a change in an oscillator's frequency, also associated with or appurtenant to unauthorized accessing of the secure memory.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: December 7, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Wendell L. Little, Stephen M. Curry, Steven N. Grider, Mark L. Thrower, Steven N. Hass, Michael L. Bolan, Ricky D. Fieseler, Bradley M. Harrington