Patents Assigned to Dallas Semiconductor
  • Patent number: 5994967
    Abstract: An integrated, crystalless oscillator includes a voltage controlled oscillator circuit for generating an output signal, and a frequency-locked feedback network to stabilize the frequency of the output signal. The frequency-locked feedback network includes a divide-down circuit and a frequency-controlled variable resistor, the divide-down circuit divides down the frequency of the output signal to produce a feedback frequency which is used to control the frequency-controlled variable resistor. The control voltage for the voltage controlled oscillator circuit is derived from the voltages across a fixed resistor and the frequency-controlled variable resistor. The voltages across these resistors drive an amplifier, with the output of the amplifier being the control voltage for the voltage controlled oscillator circuit.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: November 30, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Cong Dinh Nguyen
  • Patent number: 5994970
    Abstract: A temperature compensated crystal oscillation circuit adapted to be contained within a small device package and providing an output frequency accuracy of approximately +/-2 ppm over a temperature range or less than 2 minutes per year over the temperature range. The device includes a crystal and a single integrated circuit wherein the integrated circuit has a temperature sensing circuit with a digital output, control circuitry, a memory circuit and a switched capacitor array for compensating the oscillation of the crystal oscillator over temperature.
    Type: Grant
    Filed: March 23, 1998
    Date of Patent: November 30, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Douglas Gene Cole, Ranganath Bagade, Titkwan Hui
  • Patent number: 5994770
    Abstract: An apparatus includes a circuit positioned in a housing, which circuit includes an input/output module having a parasitic power sub-module. The circuit further includes a scratchpad memory, coupled to the input/output module; a programmable memory, coupled to the scratchpad memory; and a control module, coupled to the input/output module, the scratchpad memory and the programmable memory. In certain variations, the input/output module further includes at least one of a one-wire bus and a three-wire bus in addition to a bus arbitrator.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: November 30, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Bradley M. Harrington, Hal Kurkowski, James P. Cusey
  • Patent number: 5991887
    Abstract: An initializer that responds to change in a power supply potential level, for generating an initialize signal to initialize a circuit to a select state, the initializer includes a power-on reset circuit that switches between an active and a powered-down state, and is for generating the initialize signal. The initializer also includes a wake-up circuit that monitors the power supply potential level and switches the power-on reset circuit from the powered-down state to the active state when selected change in the power supply potential level occurs.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: November 23, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Richard William Ezell
  • Patent number: 5982241
    Abstract: A monolithic oscillator having dual programmable fixed frequency outputs includes crystal-less oscillator circuitry utilizing frequency-locked feedback to generate ai signal having a select frequency, the frequency being stabilized over temperature and voltage by compensation circuitry associated with the crystal-less oscillator circuitry. A programmable prescaler is coupled to the crystal-less oscillator circuitry for varying the frequency of the signal generated by the crystal-less oscillator circuitry by a select amount. The monolithic oscillator further includes inputs for receiving an external signal, such as an external reference signal, or for connection to a crystal for providing an alternative frequency reference. A multiplexer is used to select either the external signal (or crystal) or the signal from the crystal-less oscillator circuitry to be used for the output signal.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: November 9, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Cong Dinh Nguyen, Stephen Christopher Brightman
  • Patent number: 5982202
    Abstract: A method and apparatus for pre-biasing a sensing amplifier. A sense amp bias transistor connects a first latching transistor and a second latching transistor to ground while the sense amplifier is being precharged. The connection of the first latching transistor and the second latching transistor to ground through the sense amp bias transistor discharges any additional charge which may have built up on the inputs of the first latching transistor and the second latching transistor as a result of a Vbump condition. The sense amp bias transistor is enabled concurrently with the precharging of the sense amplifier. The sense amp bias transistor can be enabled by a controller, or alternatively, enablement is effectuated by inverting the signal which precharges the sense amplifier.
    Type: Grant
    Filed: May 13, 1998
    Date of Patent: November 9, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Marvin L. Peak, Jr.
  • Patent number: 5978927
    Abstract: In a data bus environment where a host device and a plurality of other devices are connected to the bus, the time required for the first and the last device to respond to a host request is measured. Once the time required between the first and the last response is known, then a read/write window time can be minimized thereby increasing the speed of communication over the data bus.
    Type: Grant
    Filed: March 5, 1996
    Date of Patent: November 2, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Wendell L. Little, David A. Bunsey, Jr.
  • Patent number: 5974504
    Abstract: A secured metal token using a single wire communication system is employed to dispense units of value and to provide a secure storage device for controlling the dispensing of articles or service items. The metal token can be formed of two pieces with a simplified electronic circuit inside which can contain units of value for the dispensing of items using the memory within the metal token as a secure vault. The token uses a simple two wire (ground and combined clock/data) arrangment. As goods are purchased or services rendered the value of those good or services is deducted from a prestored amount within the token.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: October 26, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Robert D. Lee, Stephen M. Curry, Michael L. Bolan, Hal Kurkowski, Donald R. Diaz, Francis A. Scherpenberg, Kevin E. Peirling
  • Patent number: 5961356
    Abstract: A receptacle apparatus for a compact electronic module for effectuating data communication between the module and an interface circuit. The receptacle apparatus includes a cover arrangement and a combined locking and communication effecting structure. The receptacle apparatus is also designed in various embodiments to be installed on a removeable cover of a system so as not to hamper with removal of that cover.
    Type: Grant
    Filed: May 1, 1998
    Date of Patent: October 5, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Nicholas M. G. Fekete
  • Patent number: 5963105
    Abstract: In an integrated crystal-less device that generates an output signal with the frequency of the output signal dependent at least in part on a resistive element, there is provided circuitry for providing compensation for the temperature coefficient the of resistive element, the circuitry includes a bandgap reference and a resistive network. The bandgap reference utilizes components having stable temperature coefficient to generate a first voltage, a reference voltage, and also to generate second voltage, a voltage proportional to absolute temperature. The resistive network includes two trimmable resistors, which are trimmed such that the resistive network in combination with the bandgap reference compensates for the absolute value of the resistive element in a selected temperature range.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: October 5, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventor: Cong Dinh Nguyen
  • Patent number: 5959926
    Abstract: A programmable power controller controls power between a primary power source and a secondary power source and powering first circuitry. The primary power source has a first voltage and the secondary power source has a second voltage. A control register has a first field, which is field used to activate circuitry used to direct power from the primary power source to the secondary power source. First logic circuitry compares the first voltage and the second voltage to determine which is greater and then couples the primary power source or the secondary power source, depending upon which is greater, to power the first logic circuitry, second logic circuitry, and memory. The memory is coupled to the first logic circuitry and is read and written to via an input/output buffer.
    Type: Grant
    Filed: April 13, 1998
    Date of Patent: September 28, 1999
    Assignee: Dallas Semiconductor Corp.
    Inventors: Brian W. Jones, Alan Mark Morton
  • Patent number: 5949880
    Abstract: The present invention relates to system, apparatus and method for communicating valuable data from a portable module to another module via an electronic device. More specifically, the disclosed system, apparatus and method are useful for enabling a user to fill a portable module with a cash equivalent and to spend the cash equivalent at a variety of locations. The disclosed system incorporates an encryption/decryption method.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: September 7, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Donald W. Loomis, Michael L. Bolan
  • Patent number: 5940510
    Abstract: The present invention rotates to system, apparatus and method for communicating valuable data from a portable module to another module via an electronic device. More specifically, the disclosed system, apparatus and method are useful for enabling a user to fill a portable module with a cash equivalent and to spend the cash equivalent at a variety of locations. The disclosed system incorporates an encryption/decryption method.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: August 17, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Stephen M. Curry, Donald W. Loomis, Michael L. Bolan
  • Patent number: 5933039
    Abstract: Digital signal delay lines with electrically programmable and trimmable delay times, including electrically erasable and reprogrammable delay times. Floating gate field effect transistors are programmed to select current, capacitance, and/or threshold and thereby set a delay time determined by acurrent charging of a capacitor up to a threshold voltage. Trimming after packaging avoids package offsets. Temperature and power supply voltage compensation by current combining gives compensation compatible with the electrical programming.
    Type: Grant
    Filed: March 25, 1997
    Date of Patent: August 3, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Titkwan Hui, Robert W. Mounger
  • Patent number: 5923159
    Abstract: A digital potentiometer capable of being connected directly to an electronic switch is disclosed. The digital potentiometer for example may utilize a 64 step resistor array, which would then have 64 steps. Each of the steps have precise values so as to accurately attenuate a signal in logarithmic steps. The logarithmic resistor is connected to a gate device which in turn has a voltage source connected to it designed to provide the threshold or turn-on voltage for the device for each of the 64 steps and wiper points of the resistor array.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: July 13, 1999
    Assignee: Dallas Semiconductor Corp.
    Inventor: Richard William Ezell
  • Patent number: 5920096
    Abstract: A system architecture which provides efficient data communication, over a one-wire bus, with a portable data module which does not necessarily include any accurate time delay circuit whatsoever. The time delay circuit in the module can be extremely crude. An open-collector architecture is used, with electrical relations defined to absolutely minimize the drain on the portable module's battery. A protocol has been specified so that the module never sources current to the data line, of the one-wire bus but only sinks current. The protocol includes signals for read; write-zero; write-one; and reset. Each one-bit transaction is initiated by a falling edge of a voltage signal from the host. The time delay circuit in the module defines a delay, after which (in write mode) the module tests the data state of the data line. In read mode, after a falling edge of a voltage signal from the host the module does or does not turn on a pull-down transistor, depending on the value of the bit read.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: July 6, 1999
    Assignee: Dallas Semiconductor, Inc
    Inventor: Robert D. Lee
  • Patent number: 5913552
    Abstract: A thermal protection system that assembly of at least one electrical components and a heat shield surrounding the electrical component, wherein the heat shield forms a pocket between the electrical element and the heat shield and associated methods. The electrical element has at least one electrical lead. The system permits the electrical lead(s) to increase in temperature sufficient to permit soldering of the electrical lead(s) to a second electrical element. The thermal protection system also comprises a heat sink to protect the electrical element, which comprises a heat capacity material. The system also comprises electrical lead(s) with a low-cross sectional area.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: June 22, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Neil McLellan, Mike Strittmatter
  • Patent number: 5914543
    Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 22, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Francis A. Scherpenberg, Eric W. Mumper, John W. Rea, Robert D. Lee
  • Patent number: 5913181
    Abstract: A comparator which for example can be used for a digital potentiometer is shown. Specifically, a dual differential input circuit with a push/pull amplifier at the output stage is disclosed wherein a crossing is detected in an inputted signal as the crossing occurs and wherein the push/pull amplifier pair at the output stage provides very fast detection of a crossing. This is particularly useful in acting as a trigger mechanism for changes in a digital potentiometer for example to elements noise caused as "wiper changes" occur.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: June 15, 1999
    Assignee: Dallas Semiconductor Corp.
    Inventor: Richard William Ezell
  • Patent number: 5912548
    Abstract: An electronic device for monitoring the operating conditions of a rechargeable battery, and includes a temperature monitor for monitoring the operating temperature of the rechargeable battery; a voltage determiner coupled to the rechargeable battery for measuring the potential level of the rechargeable battery; a one wire interface for outputting the information corresponding to the potential level of the rechargeable battery and the information corresponding to the temperature monitored by the temperature monitor; and a power regulator coupled to the rechargeable battery for supplying regulated power from the rechargeable battery to the temperature monitor and the voltage determiner. The voltage determiner includes an analog to digital converter and utilizes a successive approximation technique to determine and output a digital value corresponding to the potential level of the rechargeable battery.
    Type: Grant
    Filed: April 9, 1998
    Date of Patent: June 15, 1999
    Assignee: Dallas Semiconductor Corp.
    Inventors: Richard E. Downs, Robert Mounger