Abstract: The present document relates to a pre-charge circuit of electronic circuits having Miller compensation and significant output capacitance such as LDOs or multistage amplifiers. The pre-charge circuit limits an inrush current right after enabling of the electronic circuit. The pre-charge circuit limits and clamps the fast charging of the Miller capacitor. A delay circuit disables the pre-charge circuit when the bias conditions of the Miller capacitor are close to normal bias conditions.

Abstract: The present document relates to the compensation of voltage variations within power converters. A driver circuit for a solid state light source is described. The driver circuit comprises a switched-mode power converter comprising a switch; wherein the switched-mode power converter is configured to convert an input voltage at an input of the switched-mode power converter into an output voltage at an output of the switched-mode power converter. Furthermore, the driver circuit comprises current sensing means configured to determine a sensed current signal indicative of a current through the switch; and voltage sensing means configured to determine a sensed voltage signal indicative of the input voltage. In addition, the driver circuit comprises a control unit configured to determine a gate control signal for putting the switch into an off-state, based on the sensed current signal and based on the sensed voltage signal.

Abstract: The present document relates to power converters. In particular, the present document relates to the protection of the power switches of power converters. A controller configured to control a switched-mode power converter is described. The controller comprises a control pin for controlling a state of a power switch of the switched-mode power converter using a control signal; and a sensing pin for receiving a sensed current signal indicative of a current through the power switch. The controller is configured to detect a break-through situation of the power switch based on the state of the power switch and based on the sensed current signal.

Abstract: An apparatus and method for a system with improved power supply rejection ratio (PSRR) over a wide frequency range. The improved PSRR is achieved by negating the influence of the parasitic capacitance associated with the bias lines and the introduction of a regulated power supply with embodiments associated with providing a ripple free and regulated supply. With reduction of parasitic capacitance, and providing an ENABLE switch by a pre-regulated supply, the degradation of the PSRR is achieved. The embodiments include both n-channel and p-channel MOSFETs implementations, and a positive and negative regulated power supply voltage. With the combined influence of the utilization of the VREG supply, and the lowering of battery-to-bias line capacitance using design layout and improved floor planning an improved PSRR over a wide frequency distribution is achieved.

Abstract: A method for determining the temperature of an electronic component in an electronic device comprises supplying a current to the electronic component via a power converter device, measuring an input current supplied to the power converter device, determining a power dissipation of the electronic component based on the measured input current, a value for an efficiency of the power converter device and an output voltage of the power converter device, and determining the temperature of the electronic component based on the determined power dissipation and a thermal resistance value for the electronic component.

Abstract: The present document relates to the measurement of the current through a transistor. In particular, the present document relates to a circuit arrangement which allows an accurate measurement of the current through a power transistor. A circuit arrangement is described. The circuit arrangement is configured to provide an indication of a current flowing through a pass switch, when the pass switch is arranged in parallel to the circuit arrangement. The circuit arrangement comprises a matching unit which comprises a switch bank comprising a plurality of parallel reference switches; a resistor bank comprising a plurality of serial reference resistors; and a reference current source configured to provide a reference current flowing through the switch bank and the resistor bank. The resistor bank and the switch bank are arranged in series.

Abstract: An apparatus of an exponential current digital-to-analog converter (IDAC) using a binary-weighted MSB to efficiently drive current controlled light emitting diode (LED) devices. The apparatus comprises of an exponential current digital-to-analog converter (IDAC) current source, a voltage buffer to create an active cascode at the output stage, and an error amplifier that by means of a DC-DC converter voltage loop imposes an appropriate voltage at the output of the IDAC, depending on the current load set to drive the LEDs. The definition of the apparatus involves defining an exponential LSB and exponential MSB current mirrors according to a defined methodology.

Abstract: The present document relates to a current sensing and/or control circuit with reduced sensing errors. A current control circuit for controlling a load current into an electronic device is described. The current control circuit comprises an array of control transistors configured to adjust the load current provided at an output of the array of control transistors. The load current is drawn from a power supply at an input voltage. Furthermore, the power supply is coupled to an input of the array of control transistors. The circuit further comprises a reference transistor coupled to the power supply at an input of the reference transistor and a reference current source configured to draw a reference current at an output of the reference transistor.

Abstract: Automatic and robust anti-shoot-through glitch-free operation of half-bridge control pre-driver and power stage circuits have been achieved by using multiple feedback control signals. These feedback signals are taken both from the gates of power devices on high side and low sides and from the gates of one or more devices on both high side and low side that enable power device ON state. No duty cycle limitation is required of the input signal. The control logic uses NAND/NOR RS latches. The solution disclosed can readily be scaled to higher order of feedback loops providing even greater level of robustness.

Abstract: Power converters, such as switched-mode power converters comprise a reduced number of sensing pins. A power converter is configured to convert electrical energy at an input voltage into electrical energy at an output voltage. The power converter comprises a power switch configured to be switched between on- and off-states; and a controller configured to generate a control signal for putting the power switch into the on-state and off-state, respectively; wherein the control signal is generated based on a first and second measurement signal from the power converter external to the controller. The controller comprises a sensing pin configured to sense the first measurement signal, when the power switch is in on-state, and configured to sense the second measurement signal, when the power switch is in off-state.

Abstract: A circuit and a method for improving the performance of voltage regulators subject to load transients is presented. An auxiliary circuit generates an auxiliary current at an output of a voltage regulator. The auxiliary circuit comprises transient detection means to detect a load transient at the output of the voltage regulator. The auxiliary circuit comprises an auxiliary impedance to be coupled at one end to the output of the voltage regulator, and an auxiliary switch to modify a voltage level at the other end of the auxiliary impedance by closing or opening the auxiliary switch. The auxiliary circuit comprises a control unit to control the auxiliary switch, subject to the detection of a load transient at the output of the voltage regulator, to modify the voltage level at the other end of the auxiliary impedance.

Abstract: A time off estimator and an adaptive controller implemented on an integrated circuit to emulate current dependent zero crossing circuitry to permit improved performance of a buck type switching mode power supply. The time off estimator circuit is enhanced by an automatic correction circuit for the timing of a zero crossing where energy to a reference capacitor returns to zero and is turned off awaiting the next cycle where the capacitor is again charged and discharged.

Abstract: A circuit and method is described for automatically testing multiple LDO regulator circuits on an integrated circuit chip independent of an ATE. Each LDO regulator is tested for voltage at a specified current output capability, wherein the output driver transistor is formed by at least two pass transistors, which are each tested for voltage output at a particular current capability. The test results are delivered back to the ATE and for a failed test, the gate voltage of the pass device can be observed through an analog multiplexer to enable debug.

Abstract: A method for charging a battery is provided, wherein current pulses are supplied to the battery, wherein each pulse is followed by a rest period during which no current is supplied to the battery, and wherein the state of charge of the battery is determined during the rest period.

Abstract: A low dropout (LDO) regulator with a limited startup inrush current is disclosed. The LDO includes a power source, error amplifier, pass transistor, feedback network, and a current limit control whose input is electrically connected to the pass transistor and the electrical output of the error amplifier and whose output limits current during startup. The LDO can include a current control limit comparator including a power source, and output of the pass transistor. The LDO can also include a bypass mode current control limit comparator having a first input voltage of the error amplifier, and a second input voltage from the error amplifier.

Abstract: Circuits and methods to improve dynamic load transient performance of circuits supplying high current and having parasitic resistances are disclosed. These circuits comprise e.g. LDOs, amplifiers or buffers. The circuits and methods are characterized by including parasitic resistances, caused by bond wires, metallization of pass devices, and substrate routings, in a loop for fast transient response. Furthermore the circuits comprise a stabilization circuit within said loop and a separate pad for said loop.

Abstract: A differential audio amplifier system and a related system to generate an output signal free or with only very limited clipping are disclosed. It provides a solution to solve the problem of limited electrical speaker amplifier output power available (e.g. inside battery driver applications). A differential speaker amplifier has positive and negative supply rails. In a first embodiment of the disclosure the negative supply rail is connected to the output of an inverting buck-boost converter and the positive supply rail is directly connected to VSS voltage. In a second embodiment of the disclosure the positive supply rail is connected to the output of a buck-boost converter and the negative supply rail is directly connected to a positive battery voltage.

Abstract: A switching regulator with an output high threshold voltage setting and an output low threshold voltage setting that permits a plurality of different operating modes to be established. Combined with these two threshold voltages is the ability to adjust both threshold voltages over the full range of the regulator output voltage, which yields switching regulator modes of forced normal operation, automatic where the operating mode is dependent upon output current and forced sleep mode.

Abstract: A communication system with SSL light bulb assemblies comprises a first and a second transceiver. The first transceiver comprises a magnet, and the second transceiver comprises a switched-mode power converter which comprises an inductor element with an inductor core material having a magnetic field dependent permeability. The magnet and the inductor core material of the inductor element are magnetically coupled. The first transceiver is configured to modulate a magnetic field generated by the magnet to generate a modulated downstream magnetic field indicative of downstream data, and the second transceiver is configured to extract the downstream data from a measurement signal from the power converter. The measurement signal is dependent on an inductor value of the inductor element.

Abstract: The efficient control of a plurality of high side switches, e.g. the high side switches of half bridges is presented. A control circuit contains a charge provisioning unit to provide an electrical charge. The control circuit contains a plurality of sets of high control switches for the plurality of high side switches, respectively; wherein each set of high control switches is used to arrange the charge provisioning unit in parallel to a gate-source capacitance of the respective high side switch. The control circuit comprises a controller to, during a phase of a plurality of different phases, control a respective set of high control switches from the plurality of sets of high control switches to arrange the charge provisioning unit in parallel to the gate-source capacitance of the respective high side switch from the plurality of high side switches, to switch on the respective high side switch.