Abstract: The present document relates to voltage regulators (101). In particular, the present document relates to the testing of voltage regulators subject to load transients. A test device (110) configured to generate a load current to be drawn at an output of a voltage regulator (101) is described. The test device (110) comprises a load connector (116) for coupling the test device (110) to the output of the voltage regulator (101); a transistor (113) configured to modulate the current through the load connector (116) subject to a control signal (123); wherein the current through the load connector (116) corresponds to the load current; a current sense resistor (112) arranged in series with the transistor (113) and configured to provide a feedback voltage (121) which is substantially proportional to the load current; and an operational amplifier (111) configured to generate the control signal (123) based on the feedback voltage (121) and based on a target voltage (122).

Abstract: The present document relates to a current sensing circuit. In particular, the present document relates to a current sensing circuit which provides reliable indications of the current through a transistor. A current sensing circuit configured to provide an indication of a load current through a pass device is described. The current sensing circuit comprises a sensing replica of the pass device and a sensing resistor arranged in series with the sensing replica. The sensing resistor is arranged such that a voltage drop at the sensing resistor provides an indication of the load current through the pass device.

Abstract: This application relates a method and a control circuit for determining a charge current of a battery connected to a modulated load, wherein a current limited power source is connected in parallel to the modulated load and the battery for supplying a load dependent current up to a predetermined current limit to the modulated load and the battery. The control circuit comprises means for measuring a current flowing through the battery; means for indicating an overload condition of the current limited power source; and means for determining the charge current of the battery. The means for indicating an overload condition are configured to indicate an overload condition when a sum of a current drawn by the modulated load and a current flowing into the battery exceeds the predetermined current limit of the current limited power source.

Abstract: A circuit for a flat panel display, capable of displaying images, is provided. The circuit includes an image storage block for storing the images to be displayed, a display and timing controller block controlling the display operation, an image pixel matrix containing a multitude of rows and columns arranged pixel elements. The circuit also includes one or more controlled row driver blocks, one or more controlled column driver blocks, and a pixel pre-charge mechanism for pre-charging the pixel elements employing a back to back pre-charge operation applied to a row and/or column drive activated pixel element display operation. The back to back pre-charge operation signifies that during every other operating sequence a pre-charge operation is replaced by an activated pixel element display operation.

Abstract: This invention relates to driver circuits used within high voltage power supplies, e.g. for light bulb assemblies. A driver circuit providing electrical energy at an output derived from electrical energy at an input is described. The driver circuit comprises a power converter, a controller, a supply voltage capacitor, and is configured to provide a supply voltage to the controller. A start-up resistor is coupled to the input of the driver circuit, charges the supply voltage capacitor, and is coupled to the supply voltage capacitor during start-up of the driver circuit. A back-up capacitor is coupled to the output of the driver circuit and with the supply voltage capacitor if a voltage at the back-up capacitor exceeds the supply voltage by a forward voltage threshold, and is decoupled from the supply voltage capacitor if the supply voltage exceeds the voltage at the back-up capacitor by a reverse voltage threshold.

Abstract: Power converters, such as switched-mode power converters comprise a reduced number of sensing pins. A power converter is configured to convert electrical energy at an input voltage into electrical energy at an output voltage. The power converter comprises a power switch configured to be switched between on- and off-states; and a controller configured to generate a control signal for putting the power switch into the on-state and off-state, respectively; wherein the control signal is generated based on a first and second measurement signal from the power converter external to the controller. The controller comprises a sensing pin configured to sense the first measurement signal, when the power switch is in on-state, and configured to sense the second measurement signal, when the power switch is in off-state.

Abstract: The programming of programmable memory devices, e.g. one-time programmable (OTP) memory device is presented. In particular, efficient methods and systems for generating the supply voltage for programming a programmable memory device are described. A controller configured to control the programming of a data word into a programmable memory device is described. The controller is configured to set one or more digital control signals for programming the data word into the programmable memory device. Furthermore, the controller is configured to, subsequent to setting the one or more digital control signals, increasing a device supply voltage for the programmable memory device from a default operation level to a programming level.

Abstract: A driver circuit using a power converter allows free-wheeling detection and/or provision of supply voltage. A circuit controls a switching state of a power switch. A first port of the switch is coupled to an inductor. The circuit is coupled to a control port of the switch wherein the control port of the switch is different from the first port of the switch. The circuit comprises a unit generating a signal for controlling the switching state of the switch wherein the signal is provided to the control port of the switch. Furthermore, the circuit comprises free-wheeling sensing means to detect an oscillation of a voltage at a measurement port of the switch wherein the measurement port of the switch is different from the first port of the switch and wherein the oscillation of the voltage at the measurement port indicates free-wheeling of the inductor.

Abstract: A method for stabilizing the output frequency of an oscillator comprises providing a temperature model to capture the temperature characteristics of a second oscillator when measured by a first oscillator, measuring a value indicative of the frequency of the second oscillator by using the first oscillator, determine a temperature of the second oscillator based on the measured value indicative of the frequency of the second oscillator and the temperature model, determining a compensation amount for the frequency of the first oscillator from the determined temperature, and providing a compensated output frequency of the first oscillator as a stabilized output.

Abstract: Circuits and methods to improve dynamic load transient performance of circuits supplying high current and having parasitic resistances are disclosed. These circuits comprise e.g. LDOs, amplifiers or buffers. The circuits and methods are characterized by including parasitic resistances, caused by bond wires, metallization of pass devices, and substrate routings, in a loop for fast transient response. Furthermore the circuits comprise a stabilization circuit within said loop and a separate pad for said loop.

Abstract: A driver circuit of solid state light bulb assemblies including light emitting diodes comprises a first power converter stage converting an input voltage into an intermediate voltage; a second power converter stage converting the intermediate voltage into a drive voltage for the light source; and a controller. The controller comprises a first control unit generating a first control signal for the first power converter stage; a second control unit generating a second control signal for the second power converter stage; and a state control unit determining a target state of the light source; wherein the first and second control units are receiving information indicative of the target state; and wherein the first and second control units are generating the first and second control signals based on the information indicative of the target state.

Abstract: An amplifier circuit and a method of amplification using automatic gain control (AGC) are disclosed. A method for reducing distortions incurred by an audio signal when being rendered by an electronic device is described. The method comprises receiving an input signal; determining signal strength; determining a frequency-dependent AGC filter; wherein the frequency-dependent AGC filter is adapted to selectively attenuate the input signal within a number N of predetermined frequency ranges, according to corresponding N degrees of attenuation; wherein N predetermined frequency ranges depend upon a rendering characteristic of the electronic device; and wherein the N-degrees of attenuation depend upon the signal strength; and attenuating the input signal using the frequency-dependent AGC filter to obtain an output signal for rendering by the electronic device.

Abstract: A driver circuit for programmable solid state light bulb assemblies including light emitting diodes is operable to provide a drive current to a light source of the light bulb assembly. The controller comprises a data storage unit storing a test scenario for calibration of the light bulb assembly; wherein the test scenario indicates a sequence of states of the light source; wherein a state of the light source is associated with settings of the driver circuit; a data input unit receiving a command signal via a modulated electricity supply signal; and a data processing unit retrieving the test scenario from the data storage unit; in dependence of the received command signal, generating a control signal for operating the light source in at least one state of the sequence of states of the test scenario; and to output the control signal.

Abstract: A control circuit for a switch, configured to measure the drain-to-source current of the switch is described. The control circuit is configured to control an external transistor and comprises a control pin coupled to the gate of an external transistor. The external transistor and a level shifting unit are coupled to the control pin and configured to isolate an AC current from the control pin; at a time instant subsequent to the first pulse duration, the isolated AC component of the voltage potential is indicative of a drain-to-source current through the external transistor.

Abstract: The present document relates to voltage mirror circuits. A voltage mirror circuit, having an input node and an output node is configured to provide substantially equal voltage levels at the input node and the output node. The voltage mirror circuit comprises an input current source transistor, an input gain transistor arranged in series with the input current source transistor such that the input gain transistor is traversed by the bias current, wherein the voltage level at the input node corresponds to the voltage drop across the input current source transistor and the input gain transistor. An intermediate gain transistor forms a first current mirror with the input gain transistor. An output current source transistor forms a second current mirror with the intermediate current source transistor. An output gain transistor is wherein the voltage level at the output node corresponds to the voltage drop across the output current source transistor and the output gain transistor.

Abstract: A level shifter does not require any DC (standby) current consumption and has a fast operation with low propagation delay. The level shifting from input to output voltage ranges is performed by a pair of level shifting capacitors. The input-output power voltages domains are unrestricted and flexible. DC isolation is deployed between power domains. Symmetrical rise/fall times are without duty cycle distortion. Over voltage stress is reduced by using metal capacitors. Finally the level shifter does not use high-voltage devices for level shifting purpose. Embodiments of level shifters provide one-way level shifting and bi-directional level shifting.

Abstract: The present document discloses a driver circuit for the high side switch of a half bridge at ultra-high voltage. The half bridge comprises the high side switch coupled to an input voltage Vin and to a midpoint of a low side switch. The driver circuit comprises a control signal generation unit generating a stream of control pulses and a control logic generating a gate voltage for the high side switch using a supply voltage Vcc based on the control pulses, a supply voltage capacitor generating the supply voltage Vcc, and a decoupling capacitor coupled on a first side to the control signal generation unit and on a second side to the control logic, to the midpoint of the half bridge via a first charging switch, and to the supply voltage capacitor via a second charging switch.

Abstract: A buck converter device with a zero-cross comparator with an adaptive threshold. The buck converter comprises of a control block that controls a first p-channel MOSFET switch, and a second n-channel MOSFET switch. The p-channel MOSFET switch and the n-channel MOSFET switch provide a sense signal utilizing parasitic bipolar junction transistors. The p-channel MOSFET provides a sense current for the pnp parasitic bipolar junction transistor, The n-channel MOSFET provides a sense current for the npn parasitic bipolar junction transistor. The sense current is stored on a capacitor, and establishes an adaptive offset adjustment to a zero-cross comparator.

Abstract: Patching of program code stored in and directly executed from an OTP is supported by a patch mechanism that does not rely on additional hardware, external intervention or RAM. The features of the disclosure include using a patch daisy chain, delay considerations, non-destructive patching and nested subroutine calls. The techniques disclosed are equally applicable for OTP with an unprogrammed value of “1” as for unprogrammed values of “0”.

Abstract: Methods and circuits for linearly controlling a limited, constant current during startup of LDOs, amplifiers, or DC-to-DC converters independent of load capacitor size and controlling a clean transition without glitches from a constant current (CC) mode during startup to a constant voltage (CV) mode during normal operation (CC-CV method) are disclosed. The constant current control loop and the constant voltage control loop are implemented in such a way that at the end of startup the voltage loop has taken over control and the current loop is moved far away from its active transistor region, allowing a switch of modes to occur without any nasty transitions on the output.