Patents Assigned to Dongbu Electronics
  • Patent number: 7635898
    Abstract: Semiconductor devices and methods for fabricating a semiconductor devices are disclosed. A disclosed method comprises: forming a first gate electrode functioning as a flash memory; forming first spacers on sidewalls of the first gate electrode; forming a second gate electrode functioning as a normal gate electrode; forming a source/drain region with a shallow junction by performing a first ion implantation process using at least one of the first spacers as a mask; forming second spacers on a sidewall of the first spacer and on sidewalls of the second gate electrode; forming a source/drain region with a deep junction by performing a second ion implantation process using the second spacers as a mask.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: December 22, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Seok Su Kim, Chee Hong Choi
  • Patent number: 7632755
    Abstract: Disclosed are: (i) a method for forming an intermetal dielectric layer between metal wirings using a low-k dielectric material, and (ii) a semiconductor device with an intermetal dielectric layer comprising a low-k dielectric material. The method comprises the steps of: (a) forming a metal layer on a semiconductor substrate; (b) forming a plurality of metal wiring patterns by etching the metal layer selectively; (c) forming a first dielectric layer on the substrate and the plurality of metal wiring patterns; (d) forming a low-k dielectric layer on the first dielectric layer, the low-k dielectric layer having a lower dielectric constant than the first dielectric layer; and (e) forming a second dielectric layer on the low-k dielectric layer.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: December 15, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Hyoung Yoon Kim
  • Patent number: 7632731
    Abstract: A method of fabricating a semiconductor device consistent with the present invention, the method comprising: forming an insulation film on a substrate; forming a mono-atomic layer of barrier ions at the insulation film; forming a gate insulation film in which the barrier ions are stabilized by an annealing process; forming a gate electrode on the gate insulation film; forming a spacer at a side surface of the gate electrode; and forming source/drain impurity regions at a side surface of the gate electrode.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: December 15, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Dae Young Kim
  • Patent number: 7632699
    Abstract: A method for manufacturing a CMOS image sensor that independently forms a poly routing line connected to a gate poly of a reset transistor is provided. In an embodiment, a semiconductor substrate is prepared defining a device isolation region and an active region. Subsequently, a plurality of gate polys are formed on a predetermined portion of the active region. A photodiode is formed in a portion of the semiconductor substrate located at one side of one of the plurality of gate polys. After an oxide layer is deposited on the semiconductor substrate including the gate polys, the oxide layer is selectively removed to form oxide layer patterns for exposing a portion of the plurality of gate polys. After a polysilicon layer is deposited on the oxide layer pattern, the polysilicon layer is selectively removed to form a routing line connected to the portion of the plurality of gate polys.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: December 15, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Hee Sung Shim
  • Patent number: 7629238
    Abstract: Disclosed are an isolation structure and a method for forming the same. The present isolation structure includes a substrate having a first semiconductor layer having a first lattice parameter, a second semiconductor layer having a second lattice parameter larger than the first lattice parameter, and a strained semiconductor layer; a well in the substrate; a plurality of isolation layers in the strained semiconductor layer and the second semiconductor layer, defining an active region; and a plurality of punch stop layers under the isolation layers.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: December 8, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Myung Jin Jung
  • Patent number: 7625800
    Abstract: A method for fabricating a MOS transistor is suitable for modifying the configuration of a gate electrode. The method includes coating a first oxide layer on a semiconductor substrate and removing a predetermined width of the first oxide layer; forming an LDD region in the substrate; forming a gate spacer on the substrate; forming a channel in the LDD region, forming a gate oxide layer; forming a polysilicon gate electrode; and forming source/drain diffusion regions. Accordingly, a line width of the gate electrode can be reduced without employing lithography of high precision, and an area reserved for salicide can be maximally secured on the gate and source/drain regions.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: December 1, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong Geun Lee
  • Patent number: 7625822
    Abstract: A method for manufacturing a semiconductor device deposits a plurality of bottom antireflective coating films to prevent a standing wave caused by a light source of a short wavelength in forming a fine pattern. The method includes forming a pattern formation layer on an entire surface of a wafer, forming two or more bottom antireflective coating films on the pattern formation layer, forming a photoresist film pattern on a predetermined region of the bottom antireflective coating films, etching the bottom antireflective coating films using the photoresist film pattern as a mask, forming sidewall spacers at sides of the photoresist film pattern, and etching the pattern formation layer using the sidewall spacers and the photoresist film pattern as masks.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: December 1, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Hyun Kang
  • Patent number: 7626157
    Abstract: A image sensor has a plurality of microlens disposed across an image area in which centrally disposed red pixels are provided with smaller microlenses and peripherally disposed red pixels are provided with larger microlenses. The size differential, which amounts to a small percentage to compensate for a refractivity differential per wavelength of incident light across the image area, prevents the generation of a reddish effect in an output image. The image sensor includes a color filter array having separate color filters including a long-wavelength filter, and a plurality of microlenses respectively formed on the separate color filters, wherein the microlenses corresponding to the long-wavelength filter have relative sizes differing according to disposition with respect to the color filter array.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: December 1, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Sang Sik Kim
  • Patent number: 7622376
    Abstract: A method for manufacturing a semiconductor device using a polymer is provided, wherein a first insulating layer is formed on a substrate, and a first photoresist pattern is formed over the first insulating layer. A polymer is formed around the first photoresist pattern, the polymer having an opening exposing a portion of the first insulating layer, the opening having a predetermined width, the first insulating layer is etched using the polymer as a mask to expose a portion of the substrate, and the first photoresist pattern and the polymer are removed. A gate insulating layer is formed on the exposed portion of the substrate, and a polysilicon layer is formed on the gate insulating layer and the etched first insulating layer. The polysilicon layer is planarized until the first insulating layer is exposed, to form a gate, and the exposed first insulating layer is removed.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: November 24, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Sung Ho Kwak
  • Patent number: 7622764
    Abstract: Semiconductor devices and a fabricating method therefore are disclosed.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: November 24, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jin Hyo Jung
  • Patent number: 7622356
    Abstract: There are provided a method for fabricating a MOSFET. The method includes: substrate, forming a semiconductor substrate, a germanium layer by implanting germanium (Ge) ions into a semiconductor substrate, forming an epitaxial layer doped with high concentration impurities over the germanium layer, forming a gate structure on the epitaxial layer, and forming source/drain regions with lightly doped drain (LDD) regions in the semiconductor substrate. The germanium layer supplies carriers into the epitaxial layer so that short channel effects are reduced.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: November 24, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong Soo Cho
  • Patent number: 7618830
    Abstract: Rapid thermal processing apparatus methods are disclosed. In a disclosed apparatus, rapid thermal processing is carried out when the residual oxygen detected by a residual oxygen detector does not exceed a predetermined tolerance level. Accordingly, it is possible to prevent the contact resistance of the wafers from increasing due to the presence of excessive oxygen.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: November 17, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae-Won Han
  • Patent number: 7618887
    Abstract: A method of forming a metal line in a semiconductor device including forming a first insulation layer and a first etch stop layer on a conductive layer, and forming a first photosensitive layer pattern on the first etch stop layer; forming a first opening by etching the first etch stop layer; forming a second insulation layer and a second etch stop layer on the first insulation layer and the first etch stop layer, and forming a second photosensitive layer pattern on the second etch stop layer; forming a second opening by etching the second etch stop layer; simultaneously forming an inter-connection groove and a via hole by etching the first insulation layer and the second insulation layer using the second etch stop layer and the first etch stop layer as a mask; and forming a metal line by filling the inter-connection groove and the via hole with conductive materials.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: November 17, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Se-Yeul Bae
  • Patent number: 7612395
    Abstract: CMOS image sensors and methods for fabricating the same are disclosed. A disclosed CMOS image sensor comprises: a semiconductor substrate; a photo diode; a microlens located over the photo diode; and a color filter layer located over the microlens.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: November 3, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: In Gyun Jeon
  • Patent number: 7611918
    Abstract: A CMOS image sensor and a method of fabricating the same are provided. The CMOS image sensor includes: an epitaxial layer of a first conductivity type, formed in a semiconductor substrate of the first conductivity type; a blue photodiode region of a second conductivity type, formed in the epitaxial layer at a first depth; a green photodiode region of the second conductivity type, spaced apart from the blue photodiode region and formed in the epitaxial layer at a second depth larger than the first depth; and a red photodiode region of the second conductivity type, spaced apart from the green photodiode region and formed in the epitaxial layer at a third depth larger than the second depth.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: November 3, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Hwang Joon
  • Patent number: 7611950
    Abstract: A method for forming shallow trench isolation in a semiconductor device. The method includes forming a pad oxide and a pad nitride on a semiconductor substrate in successive order, forming a trench in the substrate by etching the pad nitride, the pad oxide and the substrate, removing a portion of the pad oxide to expose top corners of the trench, and rounding the exposed portion of the top corners of the trench by a wet chemical etch.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: November 3, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jung Ho Kim
  • Patent number: 7611940
    Abstract: Disclosed are a CMOS image sensor and a manufacturing method thereof.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: November 3, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Joung Ho Lee
  • Patent number: 7611962
    Abstract: A method for fabricating a semiconductor device can prevent a leakage current and the decrease of threshold voltage by rounding corners of a trench. The method may include the steps of forming a pad insulating layer in a semiconductor substrate defined with an active region and a device isolation region, forming a first trench, forming polymer at inner sidewalls of the first trench, forming a second trench, removing the polymer, forming an oxide layer by thermally oxidizing the semiconductor substrate, and forming insulating layers for device isolation in the first and second trenches.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: November 3, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Sung Ho Kwak
  • Patent number: 7611921
    Abstract: A method for manufacturing a CMOS image sensor is disclosed. The method includes the steps of: forming a passivation oxide and a passivation nitride after forming a pad; performing a hydrogen anneal; selectively removing the passivation nitride and cleaning the passivation oxide; opening and cleaning the pad by removing the passivation oxide from the pad region; forming a pad protection membrane; forming color filter array, planarization layer and a plurality of microlenses; and removing the pad protection membrane from the pad region. A circle defect in a pixel region may be removed according to the disclosed method for manufacturing the CMOS image sensor. Accordingly, the sensitivity of the CMOS image sensor may be increased by raising the quality of the CMOS image sensor and reducing reflectance of the light.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: November 3, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jin Han Kim
  • Patent number: 7612318
    Abstract: Disclosed are a complementary metal oxide semiconductor (CMOS) image sensor and a method for fabricating the same, which are capable of effectively preventing a cross talk effect. The CMOS image sensor includes a semiconductor substrate; device isolation regions provided on the semiconductor for defining device regions therebetween; photocharge generating portions provided on the device regions for receiving external light and for generating and storing electric charges; light concentrating portions provided over the photocharge generating portions for concentrating the external light onto corresponding photocharge generating portions; and cross talk preventing portions for preventing the light passing through the light concentrating portions from being incident onto adjacent photocharge generating portions.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: November 3, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: In-Gyun Jeon