Patents Assigned to dspace digital signal processing and control engineering GmbH
  • Patent number: 9971321
    Abstract: A method for influencing a control program of a control unit, the control program having a plurality of first functions configured for controlling an actuator. The program code of the control program is examined for the occurrence of function calls, and the branch addresses and return addresses connected with the function calls, and the variables connected with the applicable first functions, are ascertained with the names of the variables and with the applicable memory addresses. The ascertained first functions and variables assigned to the applicable first functions are stored with the connected memory addresses in a first mapping table, and from a comparison of the first mapping table with a second predefined mapping table, function names are assigned to at least a portion of the first functions, and at least one first value of one of the variables is replaced by a second value.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: May 15, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Andre Rolfsmeier, Thorsten Hufnagel
  • Publication number: 20180101501
    Abstract: A method for configuring a real or virtual electronic control unit, wherein a control unit software is executed on the control unit, and the control unit software comprises a basic software layer, the basic software layer is configured by a module configuration file by setting values of parameters, the scope of the configurable parameters being defined in a first module definition file which contains the identifiers of the configurable parameters. The first module definition file is replaced by a second module definition file, and a conversion of the first module configuration file into a second module configuration file takes place.
    Type: Application
    Filed: October 11, 2017
    Publication date: April 12, 2018
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Sebastian FISCHER, Markus SUEVERN, Thomas GEWERING, Barbara KEMPKES
  • Patent number: 9940297
    Abstract: A method for manipulating the bus communication of an electronic control device is provided, wherein the bus communication includes a bus hardware-independent first communication layer and a bus hardware-dependent second communication layer. The first communication layer encodes at least one piece of information in a first protocol data unit and transmits it to the second communication layer and/or the first communication layer receives the first protocol data unit from the second communication layer and decodes the first information from the first protocol data unit. The second communication layer generates bus hardware-dependent bus information from the first protocol data unit or from an additional protocol data unit derived from the first protocol data unit for transmission via the bus and/or the second communication layer generates the first protocol data unit or an additional protocol data unit, from which the first protocol data unit can be derived.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: April 10, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Ortwin Ludger Franzen, Ralf Stolpe, Ulrich Kiffmeier
  • Publication number: 20180088911
    Abstract: A method for generating production code from a block diagram on a host computer is provided. A block in the block diagram has a number of input ports for receiving signals and a number of output ports for sending signals. The processor identifies a first block in the block diagram. The input signal is traced back to a second block upstream of the first block. Compliance with a optimization condition is checked, the optimization condition being fulfilled when a group of adjacent blocks has an assignment operation that affects one or more elements of the input signal while leaving at least one element of the composite variable unchanged. A combined production code is generated for the group of adjacent blocks when the optimization condition is fulfilled so that the combined production code includes write instructions for those elements of the composite variable that are affected by the assignment operation.
    Type: Application
    Filed: September 23, 2016
    Publication date: March 29, 2018
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Sebastian MOORS, Michael MAIR, Tanja MOLDENHAUER, Volker STRAETGEN
  • Patent number: 9929734
    Abstract: In a method for changing a configuration of a programmable logic module, an initial configuration of the programmable logic module is read in, with a result that a logic description, in particular a mapped netlist, of the initial configuration is at least partially available. One or more logic elements and/or connection elements from the logic description of the initial configuration of the programmable logic module are replaced or reconfigured and a logic description of a target configuration having one or more additional logic elements are created, none or a plurality of elements of the initial configuration being missing in the target configuration.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: March 27, 2018
    Assignee: DSPACE DIGITAL SIGNAL PROCESSING AND CONTROL ENGINEERING GMBH
    Inventors: Frank Mertens, Marc Dressler
  • Patent number: 9928803
    Abstract: A computer-implemented method for generating a control program that is executable on a control system from a graphical control model. A better utilization of the control system is achieved in that the graphical control model is translated into program code such that the generated program code has at least one FXP operation and at least one FLP operation, and in that the generated program code is translated into the executable control program such that when the control program is executed on the control system a portion of the control program is executed on the FXP unit and another portion of the control program is executed on the FLP unit.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: March 27, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Sebastian Hillebrand, Karsten Fischer
  • Publication number: 20180060457
    Abstract: A computer-implemented method for comparing block diagrams, the block diagrams describing a temporal evolution and/or internal states of a dynamic system in a technical computing environment on a host computer, wherein a block in the block diagram may comprise input ports for receiving signals and output ports for sending signals. The method includes opening a first block diagram, converting the first block diagram to an intermediate form, the conversion comprising filtering using a filter script, opening a second block diagram, converting the second block diagram to an intermediate form, the conversion comprising filtering using a filter script, determining existing differences between the intermediate form of the first block diagram and the intermediate form of the second block diagram, and outputting the determined differences. Also, a non-transitory computer readable media and computer system is provided.
    Type: Application
    Filed: August 29, 2016
    Publication date: March 1, 2018
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Ulf HOMANN, Michael KNAUP
  • Publication number: 20180060467
    Abstract: A method for simulating a collision situation between two vehicles for testing a driver assistance system in a driving simulator or in a Vehicle-in-the-Loop scenario. A fellow vehicle simulated on a simulation computer is assigned a trajectory that passes through a point of collision of a planned collision between the fellow vehicle and an ego vehicle that is not controlled by the simulation computer. The driver assistance system is equipped to exchange data with the simulated environment in real time and to influence the driving behavior of the ego vehicle in a collision situation. A target distance to the point of collision is determined for the fellow vehicle that the fellow vehicle would have to have in order to arrive at the point of collision simultaneously or substantially simultaneously with the ego vehicle, under the assumption that it travels at the specified arrival speed.
    Type: Application
    Filed: August 30, 2017
    Publication date: March 1, 2018
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Sebastian SCHULTE, Frank Schuette, Rainer FRANKE, Martin KLUSTRACH
  • Patent number: 9891806
    Abstract: A method and data processing system for linking a plurality of data structures of a data processing system with a plurality of elements of a man-machine interface (MMI) are provided. The method includes the steps: provision of an MMI with a plurality of elements, arranging a plurality of data structures in a list, selection of an element of the MMI by a user, automatic linking of a first data structure from the list with the selected element of the MMI, and setting the beginning of the list to the data structure that follows the previously linked data structure in the list. The steps of selection of an element of the MMI by a user, automatic linking of a first data structure from the list with the selected element of the MMI, and setting the beginning of the list to the data structure are carried out repeatedly.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: February 13, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Sebastian Schulte
  • Publication number: 20180039566
    Abstract: A computer-implemented method for testing a control program that is modeled as one or more blocks of a block diagram in a computing environment. A first user interface is provided for selecting a simulation mode for the block diagram and a second user interface is provided for selecting a compiler intended for production code compilation. When it is confirmed that a software-in-the-loop simulation mode has been selected in the first user interface, the blocks of the block diagram are converted to a production code and is compiled to an executable using the compiler selected in the second user interface. By running the executable on the host computer while recording one or more data points based on input/output signals and/or evaluating the compliance of the one or more data points to one or more criteria, the control program corresponding to the one or more blocks is tested.
    Type: Application
    Filed: August 5, 2016
    Publication date: February 8, 2018
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Frank LUENSTROTH, Renate HEIN
  • Patent number: 9886294
    Abstract: A method for executing a first application program of a first control unit on a computer, wherein functions for controlling actuators and/or sensors and/or functions for processing and/or providing data from actuators and/or sensors are executed by the first application program. A first interface between a control unit hardware and a first application program of the control unit is established by the control unit operating system. A first virtual control unit operating system and a first virtual application program are generated by compilation. A simulation environment interface is made available by the simulation environment for transfer of a data item and/or of an event to the first virtual application program and/or the virtual control unit operating system. The simulation environment initiates and controls an execution of the first virtual application program within the control unit operating system within the first virtual machine through the simulation environment interface.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: February 6, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Dominik Holler
  • Patent number: 9869264
    Abstract: A computer-implemented method for calculation and output of control pulses by a control unit having a first computing unit and a second computing unit, wherein the control pulses are output by the control unit to an internal combustion engine. The calculation of the control pulses is optimized in that the first computing unit calculates a control pulse pattern with triggering information for multiple future control pulses at a first sampling rate using prior state data of the engine, and transmits the calculated control pulse pattern to the second computing unit, that the second computing unit at a second sampling rate that is greater than the first sampling rate of the first computing unit corrects the triggering information of the control pulses that are currently to be output using current state data of the engine, and that control pulses are output to the engine based on the corrected triggering information.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: January 16, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Laszlo Juhasz, Dirk Berneck
  • Patent number: 9870440
    Abstract: A method for generating a netlist of an FPGA program. The model of the FPGA program is composed of at least two components, each component being assigned a separate partition on the FPGA. An independent build is carried out for each component and an overall classification is generated from the components, wherein the build jobs are automatically started after a trigger event and the trigger event is a saving of a component, the exiting of a component of the design, or a time-controlled, automated initiation of a build.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: January 16, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Heiko Kalte, Dominik Lubeley
  • Patent number: 9864355
    Abstract: A test device for testing at least a portion of a virtual control unit with a simulation environment in a simulator, having the virtual control unit and the simulation environment. The virtual control unit has at least one software component with an external data interface. The simulation environment has a data interface for indirect data exchange with the virtual electronic control unit. A reduced dependency between the virtual control unit and the simulation environment with the result that electrical fault simulation with virtual electronic control units is possible in a simpler way, is achieved in that a virtual control unit pin module and a virtual manipulation unit are additionally provided between the virtual control unit and the simulation environment, the two units transmit a virtual physical control unit signal through a virtual control unit pin of the virtual electronic control unit pin module. The virtual manipulation unit outputs a manipulated virtual physical control unit signal.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: January 9, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Ortwin Ludger Franzen, Karsten Kruegel
  • Publication number: 20180004236
    Abstract: A method for regulating a volume flow rate, and a test stand with a liquid circuit for carrying out the method is provided. A pump and a flow control valve are connected in series in the liquid circuit, and the orifice width of the flow control valve is set as a function of a setpoint value of the volume flow rate of the liquid, in order to specify, on the basis of the orifice width, a characteristic curve of the pump that plots the volume flow rate over the differential pressure. Once a characteristic curve has been specified, the differential pressure of the pump is set such that the volume flow rate corresponds to the setpoint value of the volume flow rate.
    Type: Application
    Filed: July 3, 2017
    Publication date: January 4, 2018
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Fabian FEILCKE
  • Patent number: 9857820
    Abstract: A device connectable to a control device for simulating an effect of at least one electrical or electronic load being connected to at least one terminal of the control device includes: a processing unit configured to at least one of compute and make available a control variable corresponding to the effect of the at least one electrical or electronic load that is to be simulated, and a power supply device: The power supply device includes at least one auxiliary voltage source configured to form at least one of a current source and a current sink and configured to receive the control variable from the processing unit. The at least one auxiliary source is configured to draw a current from the control device or impress a current on the control device based on the received control variable.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: January 2, 2018
    Assignee: DSPACE DIGITAL SIGNAL PROCESSING AND CONTROL ENGINEERING GMBH
    Inventors: Joerg Bracker, Marc Dolle
  • Publication number: 20170357503
    Abstract: A computer-implemented method for editing data object variants of at least one software tool is described and presented, whereby the data object variants have at least one common software/hardware attribute and in each case a configuration of the attribute. It is possible to react to changing configurations of hardware attributes of different data object variants and thereby to changing matching groups during the editing of a data object variant in that for at least one attribute matching configurations of the attribute in different data object variants are captured and that for the attribute information on matching groups of data object variants is stored with the matching configurations of the attribute.
    Type: Application
    Filed: August 28, 2017
    Publication date: December 14, 2017
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Martin KRONMUELLER
  • Patent number: 9841954
    Abstract: A method for generating production code from a block diagram in a technical computing environment on a host computer. A first block receives a first input signal that has a plurality of elements. A size of a first required signal of the external function is determined and compared to a size of the first input signal. When the size of the first required signal corresponds to the size of an element in the first input signal a production code is generated enclosing a call of the external function by a loop consecutively addressing each of the plurality of elements in the first input signal. When the size of the first required signal corresponds to the size of the first input signal a production code is generated having a call of the external function without enclosing loop over the elements in the first input signal.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: December 12, 2017
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Sebastian Hillebrand, Uwe Seidler
  • Patent number: 9836384
    Abstract: A testing device for real-time testing of at least a part of a virtual electronic control unit with an electronic control unit code is provided. The testing device has a computing unit of a first type, and a computing unit of a second type. The testing of a virtual electronic control unit with electronic control unit code, which is executable on the computing unit of the second type with a second instruction set, is made possible in that a computing unit of the first type executes an emulator for emulating the computing unit of the second type and the emulator executes the electronic control unit code. The emulator also has a simulation environment interface for exchanging data and/or events with the simulation environment.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: December 5, 2017
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Robert Leinfellner, Timo Kerstan
  • Publication number: 20170329877
    Abstract: A method for creating an FPGA netlist generated from an FPGA source code and at least one shadow register. The FPGA source code defines at least one function and at least one signal. The shadow register is assigned to the at least one signal, and is arranged and provided to store the value of the assigned signal at runtime. An option for reading out the stored signal value at runtime is provided. The function defined in the FPGA source code is not changed by the shadow register. The function described by the FPGA source code is executed by the FPGA, and a functional decoupling of the shadow register from the function described in the FPGA source code is provided. Via the decoupling, the shadow register maintains the signal value stored at the time of the decoupling while the function described in the FPGA source code is being executed.
    Type: Application
    Filed: May 3, 2017
    Publication date: November 16, 2017
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Heiko KALTE, Dominik LUBELEY