Abstract: A test device for testing a distance sensor operating with ultrasonic waves, wherein the distance sensor to be tested comprises at least a sensor radiating element for emitting a transmission signal and a sensor receiving element for receiving a reflected signal. For effective and accurate testing and stimulation of the distance sensor, the test device has a test receiving element for receiving ultrasonic waves emitted from the distance sensor to be tested, and at least one test radiating element for radiating test ultrasonic waves, and a signal processing unit, wherein ultrasonic waves received by the test receiving element are transmitted as a received signal to the signal processing unit and the signal processing unit, as a function of the received signal and simulation distance information relating to a distance to be simulated, and determines an excitation signal for the test radiating element.

Abstract: A computer-implemented method for generating program code based on one or more blocks of a block diagram, at least one block including a block variable. The method comprises opening the block diagram in a model editor, retrieving generation settings for the block variable from a data definition tool, the generation settings comprising a scope of the variable, determining that a modification rule is referenced in the generation settings, and retrieving the referenced modification rule from the data definition tool, wherein a modification rule comprises a filter condition and one or more code changes. A processor generates program code based on the block diagram and the generation settings and applies the referenced modification rule to the block variable in the generated code, which includes verifying that the filter condition is fulfilled for the block variable and applying the code changes to each occurrence of the variable in the code.

Abstract: A method for computer-based simulation or control of a dynamic system using a computer includes: cyclically receiving, by a programmable logic device, at least one input signal; calculating, by the programmable logic device, at least one matrix multiplication; and outputting, by the programmable logic device, at least one output signal. A configuration of the programmable logic device includes: a parallel multiplication of blocks of at least two elements of a matrix by at least one input-signal-dependent element of a vector, and an adder tree for multiplication results. Successive blocks of the matrix are temporarily stored in a pipeline and processed sequentially. A target number of blocks and a target adder stage are determined based on a number and/or values of parameters of at least one system equation. Processing of blocks for a current cycle is terminated based on the target number of blocks and the target adder stage being reached.

Abstract: A heat sink with a first sub-area and a second sub-area, designed for contacting a large area of a printed circuit board populated with electronic components. A thermal isolation extends between the first sub-area and the second sub-area, and a rigid mechanical connection that spans the thermal isolation connects the first sub-area to the second sub-area. As a result, the heat sink allows an assignment of sub-areas to electronic components on the printed circuit board, and contributes to mechanical stabilization of the printed circuit board.

Abstract: A module with a functional unit for generating a data stream with a data output for outputting the data stream to a serialization unit provided for receiving a data stream from a serialization unit of a first series. A serialization unit of a second series is set up to serialize the data stream and output it through the data output, and a configuration data input receives configuration data defining a first register configuration of a serialization unit. A mapping of register addresses of the serialization unit of the first series to register addresses of the serialization unit of the second series can be stored in a data memory of the module. The configuration unit is set up to read in the configuration data, to use the mapping, and to configure the registers of the serialization unit of the second series according to the configuration of the second register.

Abstract: A computer-implemented method for integrating at least one signal value into a virtual control unit. The virtual control unit is executed on a simulation platform by means of a personal computer and requires at least one input signal, wherein at least one signal value can be assigned to the input signal. A simulation function provides at least one first simulated signal value to the virtual control unit. The microcontroller abstraction layer has a software component for integrating the first simulated signal value and a second external signal value into a virtual control unit, wherein the second external signal value is provided by an external peripheral device. A user makes a selection for the input signal via a user interface as to whether the software component is to use the first simulated signal value or the second external signal value.

Abstract: A method for generating a technical system model executable on a test unit, wherein the test unit and the executable model are designed for real-time-capable testing of a control unit connected to the test unit, and wherein the executable model is constructed from a plurality of executable submodels communicating with each other, wherein each executable submodel has a separate address space and/or is executed on a separate processor or separate processor core when a test of a control unit connected to the test unit is being run.

Abstract: A method for troubleshooting the program logic of a computer system. A first logic circuit and a first monitoring circuit, which is communicatively isolated from it, are programmed on a first programmable gate array of the computer system. A second logic circuit and a second monitoring circuit, which is communicatively isolated from it, are programmed on a second programmable gate array of the computer system. After an error has been detected in the program logic of the computer system, a first signal line, which applies a signal from the first logic circuit to a first signal input of the first monitoring circuit, is programmed in the first programmable gate array without changing the first logic circuit, and a second signal line, which applies a signal from the second logic circuit, is programmed in the second programmable gate array without changing the second logic circuit.

Abstract: A method for semi-automated development data management for control devices includes saving a development data model in a central data store comprising a plurality of mutually related configuration data units, wherein the configuration data units each store control commands and/or configuration parameters. The method further includes providing a ruleset and identifying an initial configuration data unit, wherein it is possible, using the ruleset, to identify further configuration data units automatically on a basis of a relationship thereof with the initial configuration data unit. In addition, the method includes applying the provided ruleset to the development data model in order to identify a subset of configuration data units within the development data model and saving the identified subset.

Abstract: According to the invention, simulation code and production code are generated as source code from a model. The model comprises one or more blocks which specify a desired behavior of a program, in particular a control program. At least one of the blocks is marked with a simulation code attribute. Simulation code is generated for those blocks that include a simulation code attribute. Production code is generated for all other blocks. The generated source code includes both simulation code and production code. The simulation code portions are contained in the source code in a separable manner from the production code portions.

Abstract: A method for simulating a sensor system includes checking whether an intersection of the first image and the second image exists and assessing whether or not the second virtual object is perspectivally occluded. In case an intersection exists, the Euclidean distance between the sensor and the first virtual object is smaller than the Euclidean distance between the sensor and the second virtual objects, and the size of the intersection exceeds a pre-defined threshold value, the second virtual object is assessed as perspectivally occluded. In case an intersection does not exist, the Euclidean distance between the sensor and the first virtual object is not smaller than the Euclidean distance between the sensor and the second virtual objects, or the size of the intersection exceeds a pre-defined threshold value, the second virtual object is assessed as not perspectivally occluded.

Abstract: A method for event-based simulation of a system, the simulation comprising a first computing unit and at least one second computing unit, the first computing unit has a simulation time, the second processor has an operating system layer and an application layer. The second computing unit has a system time in the operating system layer, with at least the second computing unit executing a simulation application. At least one simulation object is executable on the simulation application, and the first computing unit manages an event queue, with at least one event per simulation step being listed in the event queue. The event is associated with a process to be executed by the simulation object and a simulation time provided for execution of the process.

Abstract: A computer-implemented method for training an artificial neural generator network of generative adversarial networks for the purpose of approximating second test results from an identified subset of first test results of a virtual test of a device for at the least partial autonomous guidance of a motor vehicle. The invention also relates to a computer-implemented method for training an artificial neural discriminator network, a test unit, a computer program and a computer-readable data carrier.

Abstract: A method for preparing block diagrams having one or more blocks for code generation in a computing environment comprising a model editor, a data definition tool and a code generator. The block diagram is opened in the model editor, wherein a first block is a hierarchical block comprising a plurality of subordinate blocks, at least one input port and at least one output port connected by signals. Minimum values and maximum values are received for the input and output ports, determining scaling parameters for the input and output ports based on the received minimum and maximum values. Scaling parameters are determined for each subordinate block in the first block, wherein the scaling parameters of at least one subordinate block are determined based on the scaling parameters of at least one output port. Also, a method for generating program code, a non-transitory computer readable medium and a computer system are provided.

Abstract: A method for creating a model of a technical system, is provided, the model being compatible with a simulation device. The simulation device is a simulation device set up for control unit development and the compatible model is executable on the simulation device. The method includes: providing a simulation-device-incompatible model of the technical system; providing a virtual execution environment, wherein the simulation-device-incompatible model of the technical system is executable in the virtual execution environment; and encapsulating the simulation-device-incompatible model of the technical system and the virtual execution environment in a compatible container unit forming the compatible model of the technical system. The incompatible model of the technical system can be addressable via the compatible container unit and the virtual execution environment on simulation device.

Abstract: A method for transferring changes between block diagrams having cyclically calculated models of blocks connected to signals includes: applying a plurality of transformation rules to the first block diagram to obtain a first intermediate model, wherein a transformation rule includes a rule for identifying blocks and a change to be applied to recognized blocks, wherein at least one extension block is inserted and/or at least one basic block is deleted; comparing the second block diagram to the first intermediate model; determining at least one configuration rule from the comparison, a configuration rule comprising a rule for identifying a block or parameter and a change to be applied to an extension parameter; applying the plurality of transformation rules to the third block diagram to obtain a second intermediate model; and applying the at least one configuration rule to the second intermediate model to obtain a fourth block diagram.

Abstract: A method for generating source code from one or more blocks of a block diagram includes: generating the block diagram; determining whether the descriptors of first and second block variables are concordant or different and whether or not first and second blocks are located in the same region; and implementing the first and second block variables as a single variable or as two separate variables in the source code based on the determination of whether the descriptors of the first and second block variables are concordant or different and whether or not the first and second blocks are located in the same region. The first and second block variables are implemented in the source code as a single variable if the descriptors of the first and second block variables are concordant and the first and second blocks are located in the same region.

Abstract: A configuration system for a test device designed for testing an electronic control unit. The test device is a hardware-in-the-loop simulator or a rapid control prototyping simulator, wherein a software model of a technical system is executed on the test device and the software model communicates electronically via an input/output interface of the test device with a system to be tested that is connected to the test device. Simulation data is electronically transmitted by the communication, and the configuration system is coupled to a modeling system and in the modeling system is a software model characterized by transversely and longitudinally connected function blocks. The configuration system configures the test device by interconnected configuration items such that the configuration items determine the physical characteristics of the input/output interface and/or the connection of the input/output interface with the software model.

Abstract: A computer-implemented method for editing one or more properties of one or more model elements in a block diagram of a technical computing environment. The model elements include blocks and variables in blocks, wherein one or more properties are assigned to each model element. The technical computing environment has a model editor, a data definition tool and a code generator. A processor of a host computer opens a block diagram in the model editor, displays a list of model elements present in the block diagram, receives a selection of one or more model elements, highlights the selected model elements, receives an edit command to set a new value for a chosen property of the selected model elements, and sets the chosen property to the new value. A non-transitory computer readable medium and a computer system is also provided.

Abstract: A method for troubleshooting the program logic of a computer system. A first logic circuit and a first monitoring circuit, which is communicatively isolated from it, are programmed on a first programmable gate array of the computer system. A second logic circuit and a second monitoring circuit, which is communicatively isolated from it, are programmed on a second programmable gate array of the computer system. After an error has been detected in the program logic of the computer system, a first signal line, which applies a signal from the first logic circuit to a first signal input of the first monitoring circuit, is programmed in the first programmable gate array without changing the first logic circuit, and a second signal line, which applies a signal from the second logic circuit, is programmed in the second programmable gate array without changing the second logic circuit.