Abstract: Apparatuses and methods for transmitting or receiving a synchronization signals and physical broadcast channel (SS/PBCH) block in a wireless communication system. A method of operating a user equipment (UE) includes receiving a SS/PBCH block, decoding a content of a PBCH in the SS/PBCH block, and determining whether the wireless communication system operates with shared spectrum channel access based on the content of the PBCH. The method further includes determining the content of the PBCH in a first manner based on determining that the wireless communication system operates with shared spectrum channel access or determining the content of the PBCH in a second manner based on determining that the wireless communication system operates without shared spectrum channel access.

Abstract: A semiconductor memory device includes a cell substrate, a mold structure including a plurality of gate electrodes stacked on the cell substrate, the gate electrodes including a first ground selection line, a second ground selection line and a plurality of word lines, which are sequentially stacked, a channel structure that extends in a vertical direction that crosses an upper surface of the cell substrate and penetrates the mold structure, a partial isolation region that extends in a first direction that is parallel with the upper surface of the cell substrate and partially separates the mold structure, and a ground isolation structure that connects two partial isolation regions adjacent to each other in the first direction, extends in the vertical direction and penetrates the first ground selection line and the second ground selection line, wherein a width of the ground isolation structure increases with distance from the cell substrate.

Abstract: A semiconductor device may include first and second channel patterns on a substrate, first and second source/drain patterns in contact respectively with the first and second channel patterns, and first and second gate electrodes respectively overlapping the first and second channel patterns. The first gate electrode may include a first segment between first and second semiconductor patterns of the first channel pattern. The first segment may include a first convex portion protruding toward the first source/drain pattern. The second gate electrode may include a second segment between third and fourth semiconductor patterns of the second channel pattern. The second segment may include a concave portion recessed toward a center of the second segment.

Abstract: A two-dimensional constellation for data signals having improved bitwise mutual information of data points is based on a signal-to-noise ratio (SNR) and a code rate where, based on the SNR, data bits are mapped to pre-defined in-phase and quadrature values. The in-phase and quadrature values denote points in the two-dimensional space such that the efficiency of bitwise mutual information is adapted based on the SNR. The mapping is preferably subject to a constraint selected from one of quadrant symmetry Lagrangian (QSL), quadrant symmetry constraint (QSC), or rectangular structure constraint (RSC).

Abstract: A method of improving output content through iterative generation is provided. The method includes receiving a natural language input, obtaining user intention information based on the natural language input by using a natural language understanding (NLU) model, setting a target area in base content based on a first user input, determining input content based on the user intention information or a second user input, generating output content related to the base content based on the input content, the target area, and the user intention information by using a neural network (NN) model, generating a caption for the output content by using an image captioning model, calculating similarity between text of the natural language input and the generated output content, and iterating generation of the output content based on the similarity.

Abstract: A method includes extracting multiple shallow features from a low-resolution image using a shallow feature extractor that includes a quaternion convolutional network. The method also includes extracting multiple deep features from the multiple shallow features using a deep feature extractor that includes multiple quaternion residual distillation blocks (QRDBs), where each QRDB includes a quaternion self-attention module. The method further includes reconstructing the multiple deep features into a high-resolution image. Each QRDB may further include a quaternion gated deconvolutional feed forward network (QGDFN) configured to suppress one or more of the multiple deep features.

Abstract: A user equipment (UE) and a method performed by the same in a wireless communication system are provided. The method includes receiving a downlink (DL) signal including a physical downlink control channel (PDCCH) and/or a physical downlink shared channel (PDSCH); and/or transmitting an uplink (UL) signal including a physical uplink control channel (PUCCH) and/or a physical uplink shared channel (PUSCH), where the UE monitors the PDCCH when the UE is in active time of a discontinuous reception (DRX) mode. The method can reduce the power consumption of the UE.

Abstract: Methods and apparatuses for a sidelink relay discovery message are provided in a wireless communication system. The method of user equipment (UE) comprises identifying a resource pool configured by a base station (BS), including at least one of a shared resource pool or a dedicated resource pool, determining a resource for the sidelink relay discovery message based on the identified resource pool and performing, based on the determined resource, transmission or reception of the sidelink relay discovery message.

Abstract: An electronic device is provided. The electronic device includes a wireless communication circuit, a memory for storing an EARFCN list, and a processor configured to identify whether the electronic device is in a designated mode, when the electronic device is in the designated mode, perform a scan sequentially on at least some channels from among a plurality of channels included in the EARFCN list, when a first channel satisfying a first condition is identified as a result of the scan, identify whether the first channel corresponds to a second condition by decoding a system information block (SIB) or a master information block (MIB) received through the first channel, when the first channel satisfies the second condition, select a cellular network regarding the first channel, and when the first channel does not satisfy the second condition, stop the scan and perform D2D communication during a designated time.

Abstract: The disclosure relates to a method and apparatus for collecting and reporting cell measurement information in a mobile communication system. According to an embodiment, the method, performed by a user equipment (UE), of reporting cell measurement information in a mobile communication system includes: transmitting UE capability information about whether to support a minimization of drive test (MDT) operation to a first base station of a first mobile communication system; receiving MDT configuration information from at least one base station of the first base station or a second base station of a second mobile communication system which is different from the first mobile communication system; collecting MDT measurement information based on the MDT configuration information; and transmitting the MDT measurement information to the at least one base station of the first base station or the second base station, wherein the first base station and the second base station support dual connectivity.

Abstract: A method for controlling an electronic device is provided. The method includes obtaining a list including at least one relay device for performing initial connection with an external device, and displaying the list on a display, when one relay device is selected from the list, transmitting a request for access to the selected relay device to the selected relay device, when access approval information is received from the relay device, displaying, on the display, a list of at least one external device capable of performing connection by means of the relay device, when one external device is selected from the list of the at least one external device, receiving, from the selected external device, an authentication request for the selected external device, and when a user input is received in response to the authentication request, performing the initial connection with the selected external device.

Abstract: Disclosed are a thin film structure and an electronic device including the same. The disclosed thin film structure includes a dielectric material layer between a first material layer and a second material layer. The dielectric material layer includes a dopant in a matrix material having a fluorite structure. The dielectric material layer is uniformly doped with a low concentration of the dopant, and has ferroelectricity.

Abstract: A semiconductor device may include a cell chip and a core/peripheral chip on the cell chip. The cell chip may include a first semiconductor substrate, a first device layer disposed on the first semiconductor substrate, a bottom electrode disposed on the first device layer, a dielectric layer conformally covering a top surface of the first device layer and the bottom electrode, a top electrode disposed on the bottom electrode and spaced apart from the bottom electrode by the dielectric layer, an insulating layer provided on the first device layer to cover the top electrode, and a first contact vertically penetrating one of the first semiconductor substrate or the insulating layer and connected to the top electrode. The top electrode may include a semiconductor layer and a metal layer that are stacked, and the first contact may be in contact with the metal layer.

Abstract: A ferroelectric field effect transistor includes a channel layer, a gate electrode facing the channel layer, a ferroelectric layer between the channel layer and the gate electrode, and a channel intermediate layer between the channel layer and the ferroelectric layer, wherein the channel layer and the channel intermediate layer each include an oxide semiconductor material, and a concentration of oxygen vacancies in the channel intermediate layer may be greater than a concentration of oxygen vacancies in the channel layer.

Abstract: A semiconductor design method and device are provided. The semiconductor design method may include inputting a first type of design data into a first neural network model; inputting a second type of design data into a second neural network model of a different type from the first neural network model; generating a fusion feature by fusing a calculation result of the second neural network model with a feature generated by calculation up through (and obtained from) a first layer of the first neural network model; inputting the fusion feature into a second layer of the first neural network that is after the first layer of the first neural network model; and performing a task related to routability of a circuit after calculation of the first neural network model based on the fusion feature is completed.

Abstract: A mounting apparatus, a nozzle inspection unit for the mounting apparatus, and a bad nozzle ejection unit for the mounting apparatus are provided. The nozzle inspection unit includes a nozzle flux inspection portion configured to perform a flux inspection on an adsorption nozzle of the mounting apparatus, a foreign substance removal portion configured to remove foreign substances from the adsorption nozzle, and a tension measurement portion configured to measure a tension of a spring within the adsorption nozzle.

Abstract: A processor-implemented method with a polynomial multiplication operation includes obtaining an auxiliary modulus corresponding to moduli according to a Chinese remainder theorem (CRT), performing a number theoretic transform (NTT) operation with respect to the auxiliary modulus on a result of a modulo operation of the moduli for each of a first polynomial and a second polynomial, performing an element-wise multiplication operation between an NTT operation result corresponding to the first polynomial and an NTT operation result corresponding to the second polynomial, and transforming a result of the element-wise multiplication operation into a polynomial corresponding to each of the moduli.

Abstract: A semiconductor device includes first and second active patterns respectively on the first and second active regions of a substrate, a gate electrode on the first and second channel patterns, active contacts electrically connected to at least one of the first and second source/drain patterns, a gate contact electrically connected to the gate electrode, a first metal layer on the active and gate contacts and including a first and second power line, and first and second gate cutting patterns below the first and second power lines. The first active pattern may include first channel pattern between a pair of first source/drain patterns. The second active pattern may include a second channel pattern between a pair of second source/drain patterns. The first and second gate cutting patterns may cover the outermost side surfaces of the first and second channel patterns, respectively.

Abstract: A semiconductor device includes a plate layer, gate electrodes including a lower gate electrode, memory gate electrodes, and an upper gate electrode, channel structures in channel holes penetrating through the gate electrodes, a cell region insulating layer on the channel structures, studs penetrating through the cell region insulating layer and connected to the channel structures, respectively, first separation regions penetrating through the gate electrodes, and a second separation region penetrating through the upper gate electrode between the studs, wherein side surfaces of the second separation region include round portions and straight portions between the round portions, each of the gate electrodes includes a first conductive layer and a second conductive layer, and the second separation region is in contact with the first conductive layer and the second conductive layer of the upper gate electrode.