Abstract: An improved integrated circuit package including a heat sink and an improved method for making the package is disclosed. The package incorporates an improved sealing (or locking) ring located circumferentially around the heat sink to provide a better seal between the encapsulant and heat sink and to reduce the possibility that contaminants from outside the package will reach the interior semiconductor die. A stress relief section is formed in the package leads and a dielectric adhesive material is used to attach the package leads to a heat sink surface. The dielectric adhesive creates a secure bond between leads and heat sink, allows heat transfer from the leads to the heat sink, and prevents shorting of the leads to the heat sink.

Abstract: In a horizontal deflection system, an nf.sub.H timing signal is generated synchronously with an f.sub.H horizontal synchronizing component in a video signal, where nf.sub.H is a higher frequency than f.sub.H. A first circuit is responsive to the nf.sub.H timing signal for generating an nf.sub.H scan synchronizing signal synchronously with the nfH timing signal. A horizontal deflection stage is operable at nf.sub.H and responsive to the nf.sub.H scan synchronizing signal. A second circuit is responsive to the same nf.sub.H timing signal for generating horizontal blanking pulses. The nf.sub.H timing signal can be generated by a first phase locked loop and a frequency divider. The first circuit responsive to the nf.sub.H timing signal can comprise a second phase locked loop. The second circuit responsive to the nfH timing signal can comprise a driver/inverter. The horizontal blanking pulses are combined with vertical blanking pulses to form a composite blanking signal.

Abstract: A data arbitration apparatus for combining data from a plurality of data paths, wherein data from the respective data paths are clocked by respective clock signals asynchronously and at different rates includes a multiplexer to which the respective data paths are coupled. The output of the multiplexer is applied to a "D"-type register having a dock input terminal coupled to one of the respective clock signals. The D-type register provides the combined data signal. A logic arrangement is coupled to the respective clock signals for providing control signals according to a hierarchy of importance of the signals occurring on the respective data paths. The control signals are coupled to condition the multiplexer to provide data samples from the respective data paths according to the established hierarchy.

Abstract: A protective relay communication interface includes a transformer having primary windings arranged as, at least two, sets of opposed windings. The interface is connected to a local relay sensing a current at that point on a power line to be protected. The interface is also connected to a communication link to a remote relay sensing the current at a remote position on the power line. It is by this communication link that signals representative of the sensed currents are transmitted from each relay to the other. A local signal from the local relay is passed through part of, but not all of, the primary windings inducing a corresponding signal in the secondary windings of the transformer which is transmitted to the remote relay via the communications link. A received remote signal from the remote relay is passed via at least two mutually opposed sets of the primary windings to the local relay.

Abstract: A universal LCC test socket assembly for making solderless connections between the leads of either a rectangular or square configured LCC packaged IC and a testing device includes a top member having spring biased securing members for temporarily securing a LCC packaged IC, and a base member including a plurality of electrical contacts that extend beyond the base member for electrical connection to the testing device.

Abstract: A wide screen television apparatus comprises a video display having a first format display ratio of width to height, for example approximately 16.times.9. A first video signal defines a first picture. A second video signal defines a second picture in a second format display ratio of width to height smaller than the first format display ratio, for example approximately 4.times.3. A video signal processor asymmetrically compresses the second picture, for example 4:1 horizontally and 3:1 vertically. A video memory stores lines of video of the asymmetrically compressed picture. Another video signal processor combines portions of lines of video in the first video signal with the stored lines of video of the asymmetrically compressed picture for simultaneous display of the first and second pictures. The asymmetrically compressed second picture is displayed without aspect ratio distortion. The second picture can form an inset within the first picture.

Abstract: A VCR includes circuitry for controlling a cable converter unit, circuitry for detecting the presence of a television signal, and control code transmission means for remotely controlling a cable converter unit. Advantageously, because the VCR is coupled to the output of the cable converter unit, the VCR can monitor the television signals received from the cable converter unit to ensure that commands sent to the cable converter unit from the VCR are executed. In one embodiment, infrared (IR) transmission of commands from the VCR to the cable converter unit is employed.

Abstract: A highly efficient, tuned, switching power amplifier has components in a circuit configuration which minimizes switching losses and stored energy within the circuit. The circuit includes a pair of switches operating at the carrier frequency at substantially 50% duty. The switches are coupled through a transformer to a load, with the circuit being tuned, taking the particular load into account, so as to minimize the power loss in the switches by ensuring that immediately prior to, and during each, transition of each switch from its non-conducting (off) state to its conducting (on) state, both the voltage across the switch and the first derivative with respect to time of the voltage across the switch are substantially zero.

Abstract: A system for processing audio and video components of a television signal provides for automatic control of closed caption signal display in response to the status of an audio muting feature. The system includes an operating mode in which enabling audio muting also enables the closed caption display and disabling muting disables generation of the closed caption display.

Abstract: A system for detecting the position of an object within a body of biological tissue includes a resonant circuit attached to the object and a probe including a receiver/transmitter that operates at the resonant frequency of the object. The resonant circuit rings in response to pulses transmitted from the probe thereby activating receiver circuits which control a visual display indicating the direction the probe should be moved to center it over the object. When the object is centered a second visual display provides confirmation.

Abstract: A method and apparatus for reading digital audio signals photographically recorded on a medium (such as motion picture film). If the medium has multiple, spatially separated digital and analog audio soundtracks, a photosensitive detector array is employed for each of the digital audio soundtrack areas, and a separate analog soundtrack read head is employed. Preferably, digital error code is recorded in a digital soundtrack area of the medium (with digital audio bits), and error detection and correction are performed on the recorded digital audio bits read from the medium. Preferably, the apparatus includes switching circuitry for substituting a corresponding analog audio signal for one or more corrupted digital soundtrack channels, when such digital soundtrack channels have an error rate which exceeds a selected threshold.

Abstract: An asynchronous memory controller comprises plurality of flip-flops connected in a series. The input of the first flip-flop receives a signal indicating the start of a bus cycle. The input of each succeeding flip-flop in the series is connected to the output of the preceding flip-flop. The odd-numbered flip-flops in the series are activated by a first state of a clock pulse; the even-numbered flip-flops in the series are activated by a second state of a clock pulse. Each flip-flop responds to a level of the clock pulse rather than a rising or falling edge.

Abstract: An assembly of serially coupled XOR gates and an assembly of serially coupled shift register-XOR gate pairs are provided to a digital video system. The two assemblies are serially coupled to each other. The assembly of XOR gates generates a shift-in bit for the assembly of shift register-XOR gate pairs based on a cooperatively selected bit of a video control counter and a number of cooperatively selected feedback bits from the XOR gates of the assembly of shift register-XOR gate pairs it received as inputs. The assembly of shift register-XOR gate pairs in turn generates a pseudo-random number based on the shift-in bit and additional cooperatively selected bits of the video control counter. The XOR gate outputs of the assembly of shift register-XOR gate pairs are cooperatively mapped to the various bits of generated pseudo-random number.

Abstract: A deflection apparatus comprises a deflection amplifier coupled to a deflection waveform modulation circuit such as a diode modulator. A source for generating a modulation signal. The modulation signal comprises an AC component and a DC component, each having levels which define an amplitude ratio. An amplifier alters the amplitude ratio, and the altered amplitude ratio signal is coupled to the deflection waveform modulation circuit for deflection waveform modulation.

Abstract: An alignment system for aligning the print plates of a two-sided contact printing station includes expanding pin assemblies each having an expanding collet and a mandrel for engaging and aligning match drilled holes in each of the print plates. An expansion cylinder moves the mandrel into and out of engagement with the expanding collet to cause the collet to expand into engagement with the match drilled holes. The outside profile of the expanding collet forms a straight-pin diameter which corresponds to the diameter of the match drilled holes when expanded. The expanding pin assemblies may be contracted to facilitate moving the print plates apart for advancing the working material.

Abstract: An easily peelable or chemically strippable laminate and method of making same comprising an aluminum carrier, an aluminum oxide layer, which is at least 800 Angstroms thick and deposited on the aluminum carrier, copper foil electrodeposited on the aluminum oxide layer and optionally, a brass layer electrodeposited on the copper foil have been discovered. Such laminates find utility in the electronics industry in the fabrication of printed circuit boards and afford an ease of strippability of the protective aluminum carrier-aluminum oxide layer heretofore unknown in the industry. The protective aluminum carrier-aluminum oxide layer of the laminates of the present invention may also be chemically etched away providing a universal carrier for copper foil.

Abstract: The drive-up station full duplex communication system is adapted for use in a building having a drive-up vehicle lane at the outside thereof, and having a customer speaker post at the lane for enabling a customer to communicate verbally with personnel within the building to enter into a transaction. A transceiver used by personnel to communicate with a customer via a base station, is disposed within the building includes a device for attenuating a received audio signal when an outgoing audio signal is being transmitted. A customer speaker post at the drive-up station includes a device for similarly attenuating the incoming audio signal when an audio signal is being transmitted to the transceiver unit disposed within the building. Full duplex communication is achieved while substantially decreasing or eliminating unwanted feedback interference at both units.

Abstract: A film scanning system and method for generating a digital signal representing digitized film images, and having a first (less than real-time) film frame rate, and performing digital correction (such as flare correction, color correction, or both) on the digital signal at a higher (but still less than real-time) frame rate. In a preferred embodiment, conventional video signals (having NTSC or PAL format, or SMPTE-240M or another high definition video format) are then generated from the corrected digital signal. In one embodiment, the system of the invention includes circuitry for scanning color film frames to generate and store a digital signal (representing digitized color film images) at a rate of 1.875 film frames per second, circuitry for color correcting the stored digital signal at an internal processing rate of 7.5 frames per second, and means for generating SMPTE-240M high definition video signals (having a frame rate of 30 frames per second) from the color corrected digital signal.