Abstract: A non-intrusive condition flag is introduced into high-speed data network for flagging a fault condition without interrupting the normal operation of the network. The condition flag is chosen to be one that is relatively not germane with respect to disrupting the behavior of the ports under a particular network protocol, or that is normally ignored by the network ports and/or devices. The non-intrusive condition flag can be in the form of a marker represented by designating new, currently undefined, Ordered Sets that would not cause the ports to disrupt network behavior. The marker is represented by repeating the same designated Ordered Set twice in sequence, to give the marker fault tolerance and prevent re-transmission. Ordered Sets may be chosen to identify a segment stall condition, a port busy condition, or a user defined condition in a FC network.

Abstract: A data transfer system comprising a first bus interface, a second bus interface, a first-in-first-out memory, a controller and a message unit. The message unit is operable to queue a plurality of data transfer request messages from the first bus interface and the second bus interface. The controller is operable to process each data transfer request message and transfer data between the first bus interface, the first-in-first-out memory and the second bus interface. The controller is configured to calculate error detection codes (EDCs) and chain EDC values.

Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus has a first plurality of I/O ports, a second I/O port, and core logic. The first plurality of I/O ports is coupled to a plurality of operating system domains through a PCI Express fabric. Each of the first plurality of I/O ports is configured to route PCI Express transactions between said plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint, where the first shared input/output endpoint is configured to request/complete said PCI Express transactions for each of the plurality of operating system domains. The core logic is coupled to the first plurality of I/O ports and the second I/O port. The core logic routes the PCI Express transactions between the first plurality of I/O ports and the second I/O port.

Abstract: Disclosed herein is a technique to protect sector remapped boundary data from corruption due to catastrophic errors such as loss of power in storage disks including SATA (Serial ATA) drives. Specially, one method is provided for protecting the boundary sector data from power failure through a data recovery mechanism, namely, a boundary sector table in which the boundary sectors are pre-stored in case any power failure or loss occurs during the sector remapped write operations. In connection with the boundary sector table stored in a reserved region of the storage disk, a boundary sector information index is provided in a bridge coupled to the disk, which serves as a key to identify and retrieve the needed boundary sector data from the table for corrupted data recovery.

Abstract: Provided herein are various schemes for transmitting out of band (OOB) signals over optical connections that may not support the transmission of such signals. One scheme may involve converting the OOB signals to different types of signals that are supported by the optical connection, while another scheme may utilize a separate parallel connection that supports the transmission of out of band signals in order to extend the optical connection. Yet another scheme modulates the reference clock of the original (in-band) signal to transmit and receive the OOB information.

Abstract: The use of loops in SAS networks is enabled by designating ports connected to loop connections as table loop ports (TLPs). Under normal operating conditions, each TLP is blocked from receiving BCNs, appears to the expander to have nothing connected to it, and is made invisible to initiators. The loop connection and TLPs may be enabled and used to access devices when a problem is detected. In particular, the TLP will now appear in a list of destination ports within the expander to which a BCN should be propagated. In addition, during a subsequent self-configuration, the TLP is allowed to populate its route table with devices accessible through it, and the existence of the TLP is also reported back to initiators. After re-discovery is complete, communications between the initiator and a target can resume, with traffic re-routed through the TLPs as needed, bypassing the failure point.

Abstract: Embodiments of the present invention are directed to dynamically measuring the speed of a circuit and modifying the operating voltage of the circuit based on the measured speed, in order to minimize the power being used while still ensuring proper operation of the circuit. Consequently, circuits of higher inherent speeds may have their voltages decreased (thus decreasing their actual speeds), while circuits of lower speeds may have their voltages increased, or kept the same. Thus, the resulting speeds of all circuits may be kept within a limited range to ensure proper operation. In addition, the power dissipated of circuits of higher speeds may be decreased.

Abstract: Methods and systems for simplification of the re-discovery process for initiators due to changes in the network. If an initiator subscribes to change reports from a SAS expander, when that SAS expander detects a change in the network, it sends an SMP command back to the initiator, indicating the specific change in the network. Initiator BCN management and re-discovery of the entire network is therefore avoided.

Abstract: Disclosed herein is an improved sector remapping method that maps logical sectors into physical sectors in storage disks such as SATA (Serial ATA) drives without reducing either storage capacity or I/O performance efficiency. Under this sector remapping method, logical sectors of data can be written into the physical sectors of a storage device through control frames having padded data or information associated with the padded data, as well as data frames having real data to be stored. With the padded data to be added to the real data, the frames provide multiple physical sectors to be transmitted into the storage device in a single write operation. The sector remapping method can be implemented in a storage bridge coupled to a storage device such as SATA drives.

Abstract: A system for enabling input/out virtualization for a device is disclosed. In one embodiment, the system includes a plurality of host CPUs; a multi-root switch connected to each of the plurality of host CPUs via respective buses; and an inline PCI virtualizing device connected to the multi-root switch via a front-side bus and the device via a back-side bus, the inline PCI virtualizing device including a plurality sets of registers, each of the plurality sets of registers accessible by a corresponding host CPU of the plurality of host CPUs and implementing functionalities of the device.

Abstract: A computer system includes compute nodes coupled through a switch to shared or non-shared I/O devices. The switch includes a pool of bridge headers and virtual bridges coupling a root port of a compute node to each of one or more shared or non-shared I/O devices. The switch is configured to associate each of the virtual bridges with a respective one of the fixed pool of bridge headers, receive a packet including data identifying the root port and a shared or non-shared I/O device, and route the packet in response to comparing data in the packet to data in the bridge headers associated with the virtual bridges. The virtual bridges comprise a hierarchy of virtual bridges in which one virtual bridge connects the root port to the remaining virtual bridges of the hierarchy. The switch may change the associations between virtual bridges and bridge headers.

Abstract: A method for managing power consumption by a network device is disclosed. The network device includes first and second ports, each of the first and second ports identified by a unique identifier and adapted to handle separate network traffic. The method includes verifying that the first and the second ports are connected to a common network end node; shutting off a link between the first port and the network end node; obtaining the unique identifier of the first port; creating, on the second port, a virtual port in response to the unique identifier of the first port; discovering the virtual port on the network device; and redirecting traffic formerly routed through the link through the virtual port.

Abstract: An apparatus and method is disclosed for generating path length information for two (usually redundant) receive paths in a receiving device such as a server blade so that the proper amount of equalization and/or pre-emphasis may be applied to receiver and driver circuits in the server blade. In one embodiment, the path length information comprises a longer or shorter path determination, and may also include a estimation of the slot location. In another embodiment, the path length information comprises a representation of the length of two receive paths. The path length information generating circuit is connected to the two receive inputs of the receiving device though high impedance elements, and the path length information may be utilized by hardware or a processor to set the equalization or pre-emphasis in the receiver and/or driver.

Abstract: Disclosed herein is an improved method of using sockets in connection with TCP over certain local networks, such as the enhanced Ethernet. In particular, an accelerated socket protocol is provided to enhance data communications between different host computer systems connected to an enhanced Ethernet network. Under the accelerated socket protocol, a host computer, while sending a number of data packets, is able to indicate a particular data packet is a last ready data packet out of all packets ready to be sent by setting a PUSH bit in that particular data packet, which triggers an automatic acknowledgement message that confirms receipt of data from the receiver. In addition, while receiving data packets, the host computer can advertise an effective window that corresponds to the actually available receiving space in the host computer.

Abstract: Given the different configurations for SAS and SATA Host and Target Ports, embodiments of the present invention automatically detect the configuration of SATA and SAS Phys when any device is inserted into a port enclosure and properly configure the connection regardless of the Phy configuration of the connected device. When a device is connected to the system, the port listens for either a SATA or SAS OOB signal to determine if the receive pin of the port is properly connected to the transmit signal of the attached device. By switching the configuration periodically and listening for the OOB signal, the port can determine which configuration is proper. Once a signal is detected, the port can properly configure the connection and continue with the SATA or SAS insertion algorithm. A user may alternatively choose which configuration to use and bypass the automatic detection and configuration.

Abstract: A hardware switch for use with hypervisors and blade servers is disclosed. The hardware switch enables switching to occur between different guest OSs running in the same server, or between different servers in a multi-root IOV system, or between different guest OSs running in the same server in single-root IOV systems. Whether embedded in a host bus adapter (HBA), converged network adapter (CNA), network interface card (NIC) or other similar device, the hardware switch can provide fast switching with access to and sharing of at least one external network port such as a Fibre Channel (FC) port, 10 Gigabit Ethernet (10 GbE) port, FC over Ethernet (FCoE) port, or other similar port. The hardware switch can be utilized when no hypervisor is present or when one or more servers have hypervisors, because it allows for switching (e.g. Ethernet switching) between the OSs on a single hypervisor.

Abstract: A computer system includes a shared I/O device including functions providing access to device local memory space, and a plurality of roots coupled to the shared I/O device via a switch fabric. A first root assigns a first address in a first root memory space to a first function. A second root assigns a second address in a second root memory space to a second function. The switch fabric maps the first root memory space to a first portion of device local memory space and the second root memory space to a second portion of device local memory space. Subsequently, the switch receives a data transaction request from the first root targeted to the first address, translates the first address to a corresponding location in the first portion of the device local memory space based on the mapping, and routes the data transaction request to the I/O device.

Abstract: Embodiments of the present invention are directed to a device which may be used for communication through an Ethernet network. The device may comprise two modules. A first module may be based on an existing Fibre Channel arbitrated loop HBA technology. The second module may be configured to provide a virtual Fibre Channel arbitrated loop network for the first module utilizing the Ethernet network. In other words the second module may process communications generated by the first module as well as incoming communications from the Ethernet network in order to make it appear to the first module that it is communicating with an actual Fibre Channel Arbitrated Loop network (whereas it is actually communicating through an Ethernet network). Thus, existing Fibre Channel technology can be used for the first module and the overall design cost of the device can be reduced.

Abstract: A computer system includes compute nodes coupled through a switch to shared or non-shared I/O devices. The switch includes a pool of bridge headers and virtual bridges coupling a root port of a compute node to each of one or more shared or non-shared I/O devices. The switch is configured to associate each of the virtual bridges with a respective one of the fixed pool of bridge headers, receive a packet including data identifying the root port and a shared or non-shared I/O device, and route the packet in response to comparing data in the packet to data in the bridge headers associated with the virtual bridges. The virtual bridges comprise a hierarchy of virtual bridges in which one virtual bridge connects the root port to the remaining virtual bridges of the hierarchy. The switch may change the associations between virtual bridges and bridge headers.

Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus includes a first plurality of I/O ports, a second I/O port, and a plurality of port initialization logic elements. The first plurality of I/O ports is coupled to a plurality of operating system domains through a load-store fabric. Each of the first plurality of I/O ports routes transactions between the plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint is configured to request/complete the transactions for each of the plurality of operating system domains. One of the plurality of port initialization logic elements is coupled to the second I/O port and remaining ones of the plurality of port initialization logic elements are each coupled to a corresponding one of the first plurality of I/O ports.