Abstract: A method and system comprising a host system and a host bus adapter (HBA). The HBA is configured to handle a Virtual Interface and Transmission Control Protocol (TCP)/Internet Protocol (IP) processing for applications running on the host system.

Abstract: Described herein is an improved mechanism for bridging between SAS and SATA drives based upon existing SAS expanders in a SAS domain. In particular, a bridge capable of translating between SAS and SATA protocols is embedded in or coupled to an expander. When a SAS initiator request is received at the expander, the expander can route the request, based on a routing table, either directly to a destination SAS device or to the bridge for necessary translation before it is transmitted to a destination SATA drive. The routing table includes corresponding relationships between all SAS addresses and Phys through which those SAS and SATA devices are attached to the expander. SATA devices can be virtualized in the expander through a few assigned addresses in the routing table in a SAS discovery process.

Abstract: Embodiments of the present invention are directed to systems and methods for controlling the temperature of an internal device while reducing or minimizing the involvement of the host. Thus, some of the heat monitoring and remediation work may be offloaded to the actual device itself. The device may monitor its own temperature and, in the event of high temperature, perform device specific heat reduction actions without involving the host. Furthermore, the device may, upon detecting temperature within a predefined range, alert the host of a high temperature condition in order to allow the host to perform temperature reduction measures. Also, the device may, upon detecting temperature within a predefined range, alert the host of an impending device shutdown and shut the device down. In addition, the device may periodically save its temperature into non-volatile memory in order to create a temperature log.

Abstract: Disclosed herein is a method for improving Input/Output (I/O) performance in a host system having multiple CPUs. Under this method, various interrupt affinity schemes are provided, which associate multiple processors, interrupts, and I/O channels for sending the interrupts, thereby allowing the interrupts to be almost evenly loaded among the multiple I/O channels and processors. Also, data locality (“warm cache”) can be achieved through the interrupt affinity schemes that associate each interrupt to its source processor, namely, the processor originating the I/O request that results in the interrupt.

Abstract: An API in an NPIV-compatible SAN is disclosed that includes functions for creating a vlink, replicating driver software for managing the vlink, monitoring resources in an HBA, or removing a target so that resources can be freed up for other vlinks. The API is part of a driver that communicates with a host OS and also communicates with an HBA to establish the vlinks between the host OS and FC devices. To create vlinks, an “add” function in the API is called by the OS. In addition, when a new vlink is created, a single version of an HBA interface function block is maintained in the driver, but a discovery function block, SCSI bus function block, and I/O function block are all duplicated, forming one logical vlink driver for each vlink. To obtain HBA resource information, a resource monitoring functions in the API may be called by the OS.

Abstract: SAS over Enhanced Ethernet (SOE) controllers that integrate SAS and Enhanced Ethernet to perform a conversion between SAS and Enhanced Ethernet are disclosed. A central intelligence block can be employed to perform the mapping between SAS and Enhanced Ethernet. The SOE controller can include one or more Enhanced Ethernet Interfaces, one or more SAS interfaces, and a PCIe interface. The SOE controller can direct the I/O requests presented on one interface to another interface after performing some basic operations on the I/O requests, including protocol conversion. The SOE controller can include an intelligence mechanism for identifying the appropriate output ports for routing the I/O requests and redirecting them accordingly. In the case of routing I/O requests over Enhanced Ethernet, the SOE controller can perform SAS protocol conversion to map outgoing I/O requests into Enhanced Ethernet frames suitable for transmission over the Enhanced Ethernet network.

Abstract: An apparatus and method are provided that enable I/O devices to be shared among multiple operating system domains. The apparatus has a first plurality of I/O ports, a second I/O port, and link training logic. The first plurality of I/O ports is coupled to a plurality of operating system domains through a load-store fabric. Each of the first plurality of I/O ports is configured to route transactions between the plurality of operating system domains and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint is configured to request/complete the transactions for each of the plurality of operating system domains. The link training logic is coupled to the second I/O port. The link training logic initializes a link between the second I/O port and the first shared input/output endpoint to support the transactions corresponding to the each of the plurality of operating system domains.

Abstract: Enabling virtualization in a SAS expander is disclosed. For each SAS address to be virtualized through one or more physical or virtual Phy, a reference Phy associated with each SAS address is created within the expander. Next, a route table is generated that includes an entry for each of the SAS addresses being virtualized, each entry associated with one or more of the physical or virtual Phy through which the SAS address is being virtualized. With the route table so established, requests for a virtualized SAS address are routed to a particular one of the one or more physical or virtual Phy associated with the virtualized SAS address in the route table.

Abstract: The persistent binding of STP SAS addresses to SATA devices is disclosed so that SATA devices can be moved to different insertion points (ports) within a SAS expander and still properly receive I/O requests. When a SATA device is inserted into the SAS expander, it is interrogated to obtain information about the attached device. This information may be combined using a hashing function to obtain a unique ID for the SATA device. A table can be used to assign a STP SAS address to the Phy connected to the device based in the unique ID. In this manner, the same STP SAS address will be assigned to the Phy connected to a particular SATA device, regardless of where the device is connected to the SAS expander.

Abstract: Methods and apparatus for Fiber Channel interconnection is provided between a plurality of private loop devices through a Fiber Channel private loop device interconnect system. In the preferred embodiments, the Fiber Channel private loop device interconnect system is a fabric or an intelligent bridging hub. In one aspect of this invention, a Fiber Channel private loop device is connected to two or more Arbitrated Loops containing, or adapted to contain, one or more private loop devices. Preferably, the interconnect system includes a routing filter to filter incoming Arbitrated Loop physical addresses (ALPAs) to determine which Fiber Channel frames must attempt to be routed through the fabric.

Abstract: The attaching of labels to an OPEN frame and applying label switched routing to SAS expanders is disclosed to eliminate the need for large routing tables in SAS networks. A label stack is inserted into the OPEN frame by the initiator, prior to the OPEN frame being transmitted. Each label contains the egress port for a SAS expander in the transmit path. Each SAS expander to be participating in the connection reads the labels to determine the egress port to connect to and through which data is to be sent. The SAS expander marks its label invalid or discards it and forwards the OPEN frame to the egress port where the next SAS expander will look for the first valid label. The process repeats until the OPEN frame reaches the edge device, at which time all labels are discarded and the OPEN frame is forwarded to the end device.

Abstract: A computer system includes compute nodes coupled through a switch to shared or non-shared I/O devices. The switch includes a pool of bridge headers and virtual bridges coupling a root port of a compute node to each of one or more shared or non-shared I/O devices. The switch is configured to associate each of the virtual bridges with a respective one of the fixed pool of bridge headers, receive a packet including data identifying the root port and a shared or non-shared I/O device, and route the packet in response to comparing data in the packet to data in the bridge headers associated with the virtual bridges. The virtual bridges comprise a hierarchy of virtual bridges in which one virtual bridge connects the root port to the remaining virtual bridges of the hierarchy. The switch may change the associations between virtual bridges and bridge headers.

Abstract: A system for enabling SATA drives to be utilized in FC SANs is disclosed. To send SATA FISs to a SATA drive over a FC SAN, a host sends SCSI commands encapsulated in FC frames over a standard FC link to a Fiber Channel Attached SATA Tunneling (FAST) RAID controller, where the SCSI commands are de-encapsulated from the FC frames and translated to SATA FISs. The SATA FISs are thereafter encapsulated into FC frames. The IOC that performs these functions is referred to as a FAST IOC. The SATA-encapsulated FC frames are sent to multiple disk drive enclosures over another standard FC link. The FC frames are de-encapsulated by FAST switches in disk drive enclosures to retrieve the SATA FISs, and the SATA FISs are sent to the SATA drives over a SATA connection.

Abstract: This is directed to methods and systems for handling access requests from a device to a host. The device may be a device that is part of the host, such as an HBA, an NIC, etc. The device may include a processor which runs firmware and which may generate various host access requests. The host access requests may be, for example, memory access requests, or DMA requests. The device may include a module for executing the host access requests, such as a data transfer block (DXB). The DXB may process incoming host access requests and return notifications of completion to the processor. For various reasons, the processor may from time to time issue null or zero length requests. Embodiments of the present invention ensure that the notifications of completion for all requests, including the zero length requests, are sent to the processor in the same order as the requests.

Abstract: A method for sending encrypted data in response to a request for an I/O operation. The method includes the steps of requesting a data encryption key, the request including one or more identifiers unique to the I/O operation; receiving a data encryption key attached with a first key use fingerprint, independently generating a second key use fingerprint in response to the one or more identifiers; comparing the first and the second key use fingerprints; and if the first key use fingerprint matches the second key use fingerprint, using the data encryption key to encrypt the data to be sent. In one embodiment, the one or more identifiers include at least one of a target identifier, a LUN identifier, and a LBA range identifier.

Abstract: A method for maintaining configurable and dynamically adjustable per-channel local port/bypass port access ratios in the multiple SOCs within an SPI-attached frame-based switch enclosure to improve the access fairness of devices upstream from the destination device is disclosed. A frame-based switch enclosure may include multiple SPI-attached SOCs, each SOC containing a plurality of ports, with one or more devices connected to each port and one virtual channel assigned to each port. Given a frame-based switch enclosure with N SOCs, the local port/bypass port access ratio for a particular SOC and a given virtual channel, where the particular SOC is M hops away from the SOC having a port corresponding to the given virtual channel and M>0, is 1:(N?M?1), while the local port/bypass port access ratio for the SOC (and the given virtual channel) having the port corresponding to the given virtual channel (i.e. the SOC for which M=0) is 0:0.

Abstract: An apparatus and method are provided that enable I/O devices to be shared and/or partitioned among a plurality of operating system domains within the load-store fabric of each of the operating system domains without requiring modification to the operating system or driver software of the operating system domains. The apparatus includes sharing logic and a first shared input/output (I/O) endpoint. The sharing logic is coupled to a plurality of operating system domains through a load-store fabric. The sharing logic routes transactions between the plurality of operating system domains. The first shared input/output (I/O) endpoint is coupled to the sharing logic. The first shared I/O endpoint requests/completes the transactions for the each of said plurality of operating system domains according to a variant of a protocol that encapsulates an OS domain header within a transaction layer packet.

Abstract: Embodiments of the present invention are directed to controlling device access fairness in frame-based switches by automatically and continuously counting the number of actively communicating devices connected to each port and the type of devices connected to each port, and adjusting fairness accordingly. During a sampling window, the number of active devices and the type of devices connected to each port is determined. At the start of each fairness window, a weighted number of slots are assigned to each port based on the number of active devices connected to each port and the type of devices connected to that port. Within a single fairness window, each port is able to provide device accesses to the frame-based switch in accordance with the number of slots assigned to that port.

Abstract: Embodiments of the present invention are related to a device and a method for more efficiently processing Ethernet communications that include FCOE communications. In some embodiments the device is a single device including a combination of an aggregator, a filter and a gateway. Such a combination can be more practical, affordable and efficient than the usual arrangement of a several separate devices. In other embodiments, the device of the present invention can be a combination of a switch and a gateway. In yet other embodiments other types of devices can be used. More generally, embodiments of the present invention can apply to a device or method for processing communications involving a set of two network protocols (first and second protocols) as well as a third protocol, the third protocol being compatible with the first protocol and used to define how to tunnel the second protocol over the first protocol.

Abstract: Embodiments of the present invention are directed to a scheme in which information as to the future behavior of particular software is used in order to optimize cache management and reduce cache pollution. Accordingly, a certain type of data can be defined as “short life data” by using knowledge of the expected behavior of particular software. Short life data can be a type of data which, according to the ordinary expected operation of the software, is not expected to be used by the software often in the future. Data blocks which are to be stored in the cache can be examined to determine if they are short life data blocks. If the data blocks are in fact short life data blocks they can be stored only in a particular short life area of the cache.