Patents Assigned to .Engineering, Inc.
  • Publication number: 20240209817
    Abstract: An apparatus and methods are provided for an air cleaner to be mounted onto an air inlet of an internal combustion engine. The air cleaner comprises an air filter that includes a filter medium disposed between a curved base and a cover. The curved base provides an interface between the air filter and the air inlet, and comprises a shape that provides clearance between the curved base and an electric choke installed onto a carburetor comprising the air inlet. The cover secures the air filter and the curved base to the air inlet such that an airstream is drawn through the filter medium and is conducted into the air inlet. A raised portion of the cover is configured to cooperate with the curved base to ensure a desired volume of the airstream is available to the air inlet at substantially all engine speeds.
    Type: Application
    Filed: March 11, 2024
    Publication date: June 27, 2024
    Applicant: K&N Engineering, Inc.
    Inventors: Steve E. Williams, Jere James Wall
  • Publication number: 20240213233
    Abstract: An optoelectronic device package includes a first redistribution layer (RDL), a first electronic die disposed over the first RDL, wherein an active surface of the first electronic die faces the first RDL. The optoelectronic device package further includes a second electronic die disposed over the first RDL, and a photonic die disposed over and electrically connected to the second electronic die. An active surface of the second electronic die is opposite to the first RDL.
    Type: Application
    Filed: February 6, 2024
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chi-Han CHEN
  • Publication number: 20240213168
    Abstract: The present disclosure provides a semiconductor substrate, including a first dielectric layer with a first surface and a second surface, a first conductive via extending between the first surface and the second surface, a first patterned conductive layer on the first surface, and a second patterned conductive layer on the second surface. The first conductive via includes a bottom pattern on the first surface and a second patterned conductive layer on the second surface. The bottom pattern has at least two geometric centers corresponding to at least two geometric patterns, respectively, and a distance between one geometric center and an intersection of the two geometrical patterns is a geometric radius. A distance between the at least two geometric centers is greater than 1.4 times the geometric radius. A method for manufacturing the semiconductor substrate described herein and a semiconductor package structure having the semiconductor substrate are also provided.
    Type: Application
    Filed: February 6, 2024
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Sheng-Ming WANG, Tien-Szu CHEN, Wen-Chih SHEN, Hsing-Wen LEE, Hsiang-Ming FENG
  • Publication number: 20240213222
    Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed by the first package body.
    Type: Application
    Filed: January 29, 2024
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shang-Ruei WU, Chien-Yuan TSENG, Meng-Jen WANG, Chen-Tsung CHANG, Chih-Fang WANG, Cheng-Han LI, Chien-Hao CHEN, An-Chi TSAO, Per-Ju CHAO
  • Publication number: 20240213205
    Abstract: A package is provided. The package includes a carrier, a component, and a first protective element. The component is disposed over the carrier and having a side surface configured for optically coupling. The first protective element is disposed between the carrier and the component. The side surface of the component is free from being in contact with the first protective element.
    Type: Application
    Filed: December 23, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Shih-Yuan SUN, Chieh-Chen FU
  • Publication number: 20240215151
    Abstract: The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Cheng-Yuan KUNG, Hung-Yi LIN, Meng-Wei HSIEH, Chien-Mei HUANG, I-Ting LIN, Sheng-Wen YANG
  • Publication number: 20240197176
    Abstract: The present disclosure provides a sensing device. The sensing device includes a flexible element having a first sensing area, an electronic component embedded within the flexible element, and an adjustable conductive element disposed in the flexible element and configured to electrically connect the first sensing area of the flexible element with the electronic component.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuei-Hao TSENG, Kai Hung WANG, Kai-Di LU, Yu-Chih LEE, Cheng-Tsao PENG, Pang Yuan LEE
  • Publication number: 20240203897
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface, an electrical contact disposed over a first region of the substrate, and an EMI shielding layer disposed over the substrate. The EMI shielding layer includes a non-uniform thickness and an elevation of the EMI shielding layer is higher than an elevation of the electrical contact with respect to the first surface of the substrate. A method for manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Zheng Wei WU, Cheng Kai CHANG
  • Publication number: 20240203896
    Abstract: The present disclosure provides a semiconductor device package including a carrier, an electronic component, and a shielding layer. The carrier includes a predetermined non-shielding region. The electronic component is disposed over the predetermined non-shielding region. The shielding layer includes a first portion disposed over the predetermined non-shielding region.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Zheng Wei WU, Cheng Kai CHANG
  • Publication number: 20240194609
    Abstract: An electronic device is disclosed. The electronic device includes a first component, a second component, and a first bridge component configured to electrically connect the first component with the second component. The first component is configured to transmit a first signal downwardly without passing the first bridge component and the second component is configured to transmit/receive a second signal to/from outside of the electronic device. A transmission speed of the second signal is higher than a transmission speed of the first signal.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Han-Chee YEN, Ying-Nan LIU, Min-Yao CHENG, Eelco BERGMAN
  • Publication number: 20240194493
    Abstract: A substrate includes a dielectric structure, a conductive layer, a first hole and a second hole. The conductive layer is stacked on the dielectric structure. The first hole extends from a top surface of the conductive layer and exposes the dielectric structure. The second hole is spaced apart from the first hole, extends from the top surface of the conductive layer and exposes the dielectric structure. A first depth of the first hole is substantially equal to a second depth of the second hole. An elevation of a topmost end of the first hole is different from an elevation of a topmost end of the second hole.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Hung YEH, Bing-Xiu LU, Yu Lin LU, Tai-Yuan HUANG
  • Publication number: 20240194620
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • Patent number: 12006156
    Abstract: A machine for processing tubing includes a chamber, a heater, a conveyor belt that passes through an interior space of the chamber, each of twenty or more links of the conveyor belt further comprising a generally planar outer-facing surface, each adjacent to a generally planar outer-facing surface of at least one other link, forming a generally planar composite surface along a substantially linear sub-path, and wherein a first link and a second link each comprises a first longitudinally-extending barricade adjacent a first side and a second longitudinally-extending barricade adjacent a second side of the at least one generally planar outer-facing surface, the barricades separated by a transverse distance that is less than one-half of the width of the conveyor belt, and wherein when the first and second link are in the substantially linear sub-path, a distance between the distal end of the first link and the proximal end of the second link is less than a total length of the substantially linear sub-path, such
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: June 11, 2024
    Assignee: COG Engineering Inc.
    Inventor: Gregg Hallam
  • Patent number: 12006898
    Abstract: An apparatus and a method are provided for an aircharger air intake system for filtering and conducting an airstream to an air intake of an engine. The aircharger air intake system includes an air filter comprising a filter medium configured to entrap particulates flowing within the airstream. An air box comprising one or more sidewalls and a mount wall is configured to support the air filter within an engine bay. The air box is configured to be mounted, or fastened, onto the engine. An intake tube is coupled with the air filter and configured to conduct the airstream to the air intake of the engine. The intake tube is configured to be coupled with an air temperature sensor or a mass air sensor of the engine. An adapter is configured to couple the intake tube with the air intake.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: June 11, 2024
    Assignee: K&N Engineering, Inc.
    Inventor: Steve Williams
  • Patent number: 12006170
    Abstract: A vehicle leveler which includes a first portion with a leading edge and a trailing edge, the trailing edge is disposed further from the driveway than the leading edge. The leveler also includes a second portion with a leading edge and a trailing edge, the leading edge of the second portion is disposed further from the driveway than the trailing edge of the second portion. The vehicle leveler has a door interlock system with at least one pair of photoelectric sensors with a sensor path. When a vehicle is being loaded or unloaded on the vehicle leveler, and at least one of the vehicle doors is opened, the door blocks the sensor path of the photoelectric sensors and prevents the vehicle leveler from lowering or raising.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: June 11, 2024
    Assignee: Leum Engineering, Inc.
    Inventors: Grant Leum, Eric Demerath
  • Publication number: 20240186223
    Abstract: A semiconductor device package includes a substrate and a conductive lid. The conductive lid is disposed within the substrate. The conductive lid defines a waveguide having a cavity. The waveguide is configured to transmit a signal from a first electronic component to a second electronic component through the cavity.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shih-Wen LU
  • Publication number: 20240186193
    Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chen-Chao WANG, Chih-Yi HUANG, Keng-Tuan CHANG
  • Publication number: 20240186201
    Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Han WANG, Ian HU
  • Patent number: D1031417
    Type: Grant
    Filed: October 27, 2023
    Date of Patent: June 18, 2024
    Assignee: S.W. Engineering Inc.
    Inventor: Stephen W. Warter
  • Patent number: D1031782
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: June 18, 2024
    Assignee: Velossa Tech Engineering, Inc.
    Inventor: Dan Joseph Becker