Abstract: Provided is a method of processing a NAND flash memory device including at least one NAND flash memory and a memory controller configured to control the at least one NAND flash memory. The method includes etching a portion of a first substrate of the NAND flash memory device to expose a wire connecting the at least one NAND flash memory and the memory controller to each other, dividing the wire into a first wire and a second wire by etching a first area of the etched first substrate, and connecting, to a second substrate, the first wire to which the at least one NAND flash memory is connected.

Abstract: Disclosed is a data storing method performed by a controller. The method includes storing an attribute value of first data to be written to a nonvolatile memory device in a command queue, determining whether the first data is garbage collection data on the basis of the attribute value when a power interruption occurs, and writing the first data to the nonvolatile memory device according to a result of the determination of whether the first data is garbage collection data or not.

Abstract: Disclosed is a method of operating a storage device including a NAND flash memory including memory cells grouped into blocks, each block being divided into pages. According to the method, a controller in the storage device loads, onto a memory region, a look-up table containing first read reference voltage sets corresponding to respective retention degradation stages of the NAND flash memory and second read reference voltages sets corresponding to respective pages which vary in terms of the threshold voltages. Subsequently, the controller performs a read operation on the memory cells on a per-block basis by using the first read reference voltage set corresponding to a current retention degradation stage, the second read reference voltage set corresponding to a current page, or both, until all of the memory cells in a current block are correctly read.

Abstract: A light-emitting storage device and a light-emitting control method are provided. The device includes a storage device controller, a processor, and at least one light-emitting unit. The storage device controller is electrically connected to a host through a host controller interface for controlling the access of the light-emitting storage device. The processor is electrically connected to the storage device controller to connect to the host. The at least one light-emitting unit is electrically connected to the processor. When the host transmits a control signal to the storage device controller through the host controller interface and the control signal is judged as a signal for controlling the at least one light-emitting unit by the storage device controller, the storage device controller transmits the control signal to the processor to control a light-emitting mode of the at least one light-emitting unit.

Abstract: A non-volatile memory system includes a NAND flash memory device including at least one NAND flash memory and a memory controller that controls the NAND flash memory, a host device including a file system and a host controller that receives a command from the file system to provide the command to the NAND flash memory device, and a save storage manager that monitors a number and location of run-time bad blocks in the NAND flash memory, monitors a logical address use-state of the file system, and reduces a logical address space which the file system is able to use as the number of the run-time bad blocks is increased.

Abstract: An asynchronous NAND-type memory device includes a circuit configured to perform an operation based on a signal, a first pin configured to obtain an operation control signal, a second pin configured to output a data output reference signal, and a third pin configured to output data in synchronization with the data output reference signal. The circuit is provided such that the first pin obtains, from the external device, the operation control signal that is transitioned at a second time point after a first time point at which the memory device enters into a ready state, the second pin outputs the data output reference signal, which is transitioned at a third time point that is later than the second time point by a predetermined time interval, and the third pin outputs the data in synchronization with the operation control signal which is periodically transitioned, from the third time point.

Abstract: Disclosed is a method of operating a storage device including a NAND flash memory including memory cells grouped into blocks, each block being divided into pages. According to the method, a controller in the storage device loads, onto a memory region, a look-up table containing first read reference voltage sets corresponding to respective retention degradation stages of the NAND flash memory and second read reference voltages sets corresponding to respective pages which vary in terms of the threshold voltages. Subsequently, the controller performs a read operation on the memory cells on a per-block basis by using the first read reference voltage set corresponding to a current retention degradation stage, the second read reference voltage set corresponding to a current page, or both, until all of the memory cells in a current block are correctly read.

Abstract: A non-volatile memory system includes a NAND flash memory device including at least one NAND flash memory and a memory controller that controls the NAND flash memory, a host device including a file system and a host controller that receives a command from the file system to provide the command to the NAND flash memory device, and a save storage manager that monitors a number and location of run-time bad blocks in the NAND flash memory, monitors a logical address use-state of the file system, and reduces a logical address space which the file system is able to use as the number of the run-time bad blocks is increased.

Abstract: Disclosed is a data storing method performed by a controller. The method includes storing an attribute value of first data to be written to a nonvolatile memory device in a command queue, determining whether the first data is garbage collection data on the basis of the attribute value when a power interruption occurs, and writing the first data to the nonvolatile memory device according to a result of the determination of whether the first data is garbage collection data or not.