Patents Assigned to Eudyna Devices Inc.
  • Patent number: 8588266
    Abstract: A semiconductor laser has a first diffractive grating area. The first diffractive grating area has a plurality of segments. Each segment has a first area including a diffractive grating and a second area that is space area combined to the first area. Optical lengths of at least two of the second areas are different from each other. A refractive-index of each of the segments are changeable.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: November 19, 2013
    Assignee: Eudyna Devices Inc.
    Inventor: Takuya Fujii
  • Patent number: 8563991
    Abstract: An optical semiconductor device has a semiconductor substrate, an optical semiconductor region and a heater. The optical semiconductor region is provided on the semiconductor substrate and has a width smaller than that of the semiconductor substrate. The heater is provided on the optical semiconductor region. The optical semiconductor region has a cladding region, an optical waveguide layer and a low thermal conductivity layer. The optical waveguide layer is provided in the cladding region and has a refractive index higher than that of the cladding region. The low thermal conductivity layer is provided between the optical waveguide layer and the semiconductor substrate and has a thermal conductivity lower than that of the cladding region.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: October 22, 2013
    Assignee: Eudyna Devices Inc.
    Inventor: Tsutomu Ishikawa
  • Patent number: 8304267
    Abstract: A semiconductor laser has first and second diffractive grating regions. The first diffractive grating region has segments, has a gain, and has first discrete peaks of a reflection spectrum. The second diffractive grating region has segments combined to each other, and has second discrete peaks of a reflection spectrum. Each segment has a diffractive grating and a space region. Pitches of the diffractive grating are substantially equal to each other. A wavelength interval of the second discrete peaks is different from that of the first discrete peaks. A part of a given peak of the first discrete peaks is overlapped with that of the second discrete peaks when a relationship between the given peaks of the first discrete peaks and the second discrete peaks changes.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: November 6, 2012
    Assignee: Eudyna Devices Inc.
    Inventor: Takuya Fujii
  • Patent number: 8259766
    Abstract: A laser diode drive circuit includes: a duty control amplifier (23) that controls the duty ratio of a main signal for laser control in accordance with a duty control signal; and an AND gate (22) that outputs the duty control signal to the duty control amplifier (23), and outputs a duty control signal that controls the duty ratio of the main signal to be 0% in the duty control amplifier in accordance with a shutdown signal of a laser diode. With this structure, there is no need to input the main signal having the duty ratio controlled to a logic circuit that becomes unstable. Thus, outputs from a semiconductor laser can be shut down, and the output duty can be controlled in a stable manner.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 4, 2012
    Assignee: Eudyna Devices Inc.
    Inventor: Hidetoshi Naito
  • Patent number: 8232557
    Abstract: A semiconductor substrate includes: an AlN layer provided on a silicon substrate; an AlGaN layer that is provided on the AlN layer and has an Al composition ratio of 0.3 to 0.6; and a GaN layer provided on the AlGaN layer.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: July 31, 2012
    Assignee: Eudyna Devices Inc.
    Inventors: Isao Makabe, Ken Nakata
  • Patent number: 8222736
    Abstract: A semiconductor device includes: a pad that is formed on a semiconductor layer, contains Al, and has an interconnection portion that is formed outside a bonding area; an interconnection layer that contains Au and is electrically connected to the interconnection portion of the pad, an edge of the interconnection layer being formed outside of the bonding area; and a barrier layer that is provided between the interconnection portion and the interconnection layer.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: July 17, 2012
    Assignee: Eudyna Devices Inc.
    Inventor: Takeshi Igarashi
  • Patent number: 8216950
    Abstract: A semiconductor device includes an operating layer made of a semiconductor and a silicon nitride film formed on the operating layer with the use of a mixed gas that includes mono-silane gas, hydrogen gas, and nitrogen gas, by a plasma CVD apparatus, under a condition that a flow rate of the hydrogen gas is 0.2 percent to 5 percent to an overall flow rate.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: July 10, 2012
    Assignee: Eudyna Devices Inc.
    Inventor: Norikazu Iwagami
  • Patent number: 8194710
    Abstract: An optical semiconductor device has a semiconductor substrate, a semiconductor region and heater. The semiconductor region has a stripe shape demarcated with a top face and a side face thereof. The stripe shape has a width smaller than a width of the semiconductor substrate. An optical waveguide layer is located in the semiconductor region. A distance from a lower end of the side face of the semiconductor region to the optical waveguide layer is more than half of the width of the semiconductor region. The heater is provided above the optical waveguide layer.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: June 5, 2012
    Assignee: Eudyna Devices Inc.
    Inventor: Tsutomu Ishikawa
  • Patent number: 8188520
    Abstract: A method for fabricating a field effect transistor includes: forming an insulating film provided on a semiconductor layer, the insulating film having an opening via which a surface of the semiconductor layer is exposed and including silicon oxide; forming a Schottky electrode on the insulating film and in the opening, the Schottky electrode having an overhang portion and having a first contact layer that is provided in a region contacting the insulating film and contains oxygen, and a second contact layer that is provided on the first contact layer and contains a smaller content of oxygen than that of the first contact layer; and removing the insulating film by a solution including hydrofluoric acid.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: May 29, 2012
    Assignee: Eudyna Devices Inc.
    Inventors: Tadashi Watanabe, Hajime Matsuda
  • Patent number: 8178900
    Abstract: A semiconductor device includes a GaN-based semiconductor layer formed on a substrate, and an insulating film composed of any one of silicon nitride in which the composition ratio of silicon to nitrogen is 0.85 to 3.0, silicon oxide in which the composition ratio of silicon to oxygen is 0.6 to 3.0, or silicon oxide nitride in which the composition ratio of silicon to nitrogen and oxygen is 0.6 to 3.0 that is formed on a surface of the GaN-based semiconductor layer, a gate electrode formed on the GaN-based semiconductor layer, and a source electrode and a drain electrode formed with the gate electrode therebetween.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: May 15, 2012
    Assignee: Eudyna Devices Inc.
    Inventors: Shunsuke Kurachi, Tsutomu Komatani
  • Publication number: 20120097984
    Abstract: An optical semiconductor device has a semiconductor substrate, an optical semiconductor region and a heater. The optical semiconductor region is provided on the semiconductor substrate and has a width smaller than that of the semiconductor substrate. The heater is provided on the optical semiconductor region. The optical semiconductor region has a cladding region, an optical waveguide layer and a low thermal conductivity layer. The optical waveguide layer is provided in the cladding region and has a refractive index higher than that of the cladding region. The low thermal conductivity layer is provided between the optical waveguide layer and the semiconductor substrate and has a thermal conductivity lower than that of the cladding region.
    Type: Application
    Filed: December 28, 2011
    Publication date: April 26, 2012
    Applicant: EUDYNA DEVICES INC.
    Inventor: Tsutomu Ishikawa
  • Patent number: 8105866
    Abstract: A semiconductor photo detecting element includes a PIN-type photo detecting element and window semiconductor layer. The PIN-type photo detecting element has a semiconductor substrate, a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The first semiconductor layer is provided on the semiconductor substrate, is lattice-matched to the semiconductor substrate, includes a first conductivity type dopant, and has first band gap energy. The second semiconductor layer is provided on the first semiconductor layer, has the first band gap energy, and has a concentration of the first conductivity type dopant lower than that of the first semiconductor layer or is substantially undoped. The third semiconductor layer is provided on the second semiconductor layer. The window semiconductor layer has second band gap energy larger than the first band gap energy at a light-incoming side with respect to the second semiconductor layer and has a thickness of 5 nm to 50 nm.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: January 31, 2012
    Assignee: Eudyna Devices Inc.
    Inventors: Yoshihiro Yoneda, Ryuji Yamabi
  • Patent number: 8101957
    Abstract: An optical semiconductor device has a semiconductor substrate, an optical semiconductor region and a heater. The optical semiconductor region is provided on the semiconductor substrate and has a width smaller than that of the semiconductor substrate. The heater is provided on the optical semiconductor region. The optical semiconductor region has a cladding region, an optical waveguide layer and a low thermal conductivity layer. The optical waveguide layer is provided in the cladding region and has a refractive index higher than that of the cladding region. The low thermal conductivity layer is provided between the optical waveguide layer and the semiconductor substrate and has a thermal conductivity lower than that of the cladding region.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: January 24, 2012
    Assignee: Eudyna Devices Inc.
    Inventor: Tsutomu Ishikawa
  • Patent number: 8044433
    Abstract: A semiconductor device includes a substrate, a GaN-based semiconductor layer formed on the substrate, a gate electrode embedded in the GaN-based semiconductor layer, a source electrode and a drain electrode formed on both sides of the gate electrode, a first recess portion formed between the gate electrode and the source electrode, and a second recess portion formed between the gate electrode and the drain electrode. The first recess portion has a depth deeper than that of the second recess portion.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: October 25, 2011
    Assignee: Eudyna Devices Inc.
    Inventors: Takeshi Kawasaki, Ken Nakata, Seiji Yaegashi
  • Publication number: 20110215383
    Abstract: A method for fabricating a field effect transistor includes: forming an insulating film provided on a semiconductor layer, the insulating film having an opening via which a surface of the semiconductor layer is exposed and including silicon oxide; forming a Schottky electrode on the insulating film and in the opening, the Schottky electrode having an overhang portion and having a first contact layer that is provided in a region contacting the insulating film and contains oxygen, and a second contact layer that is provided on the first contact layer and contains a smaller content of oxygen than that of the first contact layer; and removing the insulating film by a solution including hydrofluoric acid
    Type: Application
    Filed: May 10, 2011
    Publication date: September 8, 2011
    Applicant: EUDYNA DEVICES INC.
    Inventors: Tadashi Watanabe, Hajime Matsuda
  • Publication number: 20110217816
    Abstract: A field effect transistor includes: a nitride semiconductor layer having a channel layer; a gate electrode including a Schottky electrode that contacts the nitride semiconductor layer and includes a gallium doped zinc oxide (GZO) layer annealed in an inactive gas atmosphere; and ohmic electrodes connecting with the channel layer.
    Type: Application
    Filed: May 18, 2011
    Publication date: September 8, 2011
    Applicant: EUDYNA DEVICES INC.
    Inventor: Keita MATSUDA
  • Patent number: 8009947
    Abstract: An optical semiconductor device includes a waveguide having one or more first segments having a region that includes a diffractive grating and another region combined to the region, one or more second segments having a region that includes a diffractive grating and another region combined to the region and a plurality of third segments having a region the includes a diffractive grating and another region combined to the region, a length of the second segment being different from that of the first segment, a length of the third segment being shown as L3=L1+(L2?L1)×K1 in which 0.3?K1?0.7, L1 is a length of the first segment, L2 is a length of the second segment and L3 is a length of the third segment; and a refractive index control portion controlling refractive index of the first segment through the third segments.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: August 30, 2011
    Assignee: Eudyna Devices Inc.
    Inventor: Takuya Fujii
  • Patent number: 7978737
    Abstract: A laser device includes a cavity and a control portion. The cavity has an optical amplifier, a wavelength selectable portion having a changeable transmission wavelength range, and a mirror. The control portion controls the wavelength selectable portion so that the transmission wavelength range of the wavelength selectable portion is changed to a given range. The control portion controls the wavelength selectable portion so that the cavity outputs a desirable lasing wavelength light and optical intensity of the desirable lasing wavelength light is a given value, after controlling the wavelength selectable portion so that the cavity outputs the desirable lasing wavelength light.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: July 12, 2011
    Assignee: Eudyna Devices Inc.
    Inventors: Emmanuel le Taillandier de Gabory, Toshio Higashi, Yasuyuki Yamauchi, Hirokazu Tanaka, Junji Watanabe
  • Publication number: 20110158269
    Abstract: A laser module includes a semiconductor laser, an output optical system provided on an optical output side of the semiconductor laser, a temperature detecting element that detects a temperature of the output optical system; and an output controller that calculates a drive current to set an optical output intensity of the laser module at a desired value on the basis of temperature information obtained by the temperature detecting element, and outputs the drive current to the semiconductor laser.
    Type: Application
    Filed: February 8, 2011
    Publication date: June 30, 2011
    Applicant: EUDYNA DEVICES INC.
    Inventors: Haruyoshi Ono, Isao Baba
  • Patent number: 7964486
    Abstract: A method for fabricating a field effect transistor includes: forming an insulating film provided on a semiconductor layer, the insulating film having an opening via which a surface of the semiconductor layer is exposed and including silicon oxide; forming a Schottky electrode on the insulating film and in the opening, the Schottky electrode having an overhang portion and having a first contact layer that is provided in a region contacting the insulating film and contains oxygen, and a second contact layer that is provided on the first contact layer and contains a smaller content of oxygen than that of the first contact layer; and removing the insulating film by a solution including hydrofluoric acid.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: June 21, 2011
    Assignee: Eudyna Devices Inc.
    Inventors: Tadashi Watanabe, Hajime Matsuda