Abstract: An integrated circuit device includes a memory portion and a logic portion. The memory portion may include a plurality of magnetoresistive devices and the logic portion may include logic circuits. The memory portion may include a plurality of metal conductors separated by a first interlayer dielectric material (ILD), wherein the first ILD is a low-k ILD or an ultra low-k ILD. And, the logic portion may include a plurality of metal conductors separated by a second interlayer dielectric material (ILD).
Type:
Grant
Filed:
November 8, 2018
Date of Patent:
March 16, 2021
Assignee:
Everspin Technologies. Inc.
Inventors:
Kerry Joseph Nagel, Sanjeev Aggarwal, Sarin A. Deshpande
Abstract: Spin-orbit-torque (SOT) segments are provided along the sides of free layers in magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SOT segments injects spin current into the free layers such that spin torque is applied to the free layers. The spin torque can be used as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction in order to improve the efficiency of the switching current applied to the magnetoresistive device.
Abstract: A chopping technique, and associated structure, is implemented to cancel the magnetic 1/f noise contribution in a Tunneling Magnetoresistance (TMR) field sensor. The TMR field sensor includes a first bridge circuit including multiple TMR elements to sense a magnetic field and a second circuit to apply a bipolar current pulse adjacent to each TMR element. The current lines are serially or sequentially connected to a current source to receive the bipolar current pulse. The field sensor has an output including a high output and a low output in response to the bipolar pulse. This asymmetric response allows a chopping technique for 1/f noise reduction in the field sensor.
Abstract: Techniques and circuits for testing and configuring bias voltage or bias current for write operations in memory devices are presented. Registers and nonvolatile storage is included on the memory devices for storing values used to control testing of the memory devices as well as for configuring parameters related to both testing and normal operation.
Type:
Grant
Filed:
March 19, 2019
Date of Patent:
February 16, 2021
Assignee:
Everspin Technologies, Inc.
Inventors:
Jason Janesky, Syed M. Alam, Dimitri Houssameddine, Mark Deherrera
Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/?10%) and less than or equal to 60 Angstroms (+/?10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/?10%) or 30-50 atomic percent (+/?10%).
Type:
Grant
Filed:
May 8, 2020
Date of Patent:
February 2, 2021
Assignee:
Everspin Technologies, Inc.
Inventors:
Jijun Sun, Sanjeev Aggarwal, Han-Jong Chia, Jon M. Slaughter, Renu Whig
Abstract: A magnetoresistive magnetic tunnel junction (MTJ) stack includes a free magnetic region, a fixed magnetic region, and a dielectric layer positioned between the free magnetic region and the fixed magnetic region. In one aspect, the fixed magnetic region consists essentially of an unpinned, fixed synthetic anti-ferromagnetic (SAF) structure which comprises (i) a first layer of one or more ferromagnetic materials, including cobalt, (ii) a multi-layer region including a plurality of layers of ferromagnetic materials, wherein the plurality of layers of ferromagnetic materials include a layer of one or more ferromagnetic materials including cobalt, and (iii) an anti-ferromagnetic coupling layer disposed between the first layer and the multi-layer region. The free magnetic region may include a circular shape, the one or more ferromagnetic materials of the first layer may include cobalt, iron and boron, and the dielectric layer may be disposed on the first layer.
Type:
Grant
Filed:
June 2, 2020
Date of Patent:
January 19, 2021
Assignee:
Everspin Technologies, Inc.
Inventors:
Srinivas V. Pietambaram, Bengt J. Akerman, Renu Whig, Jason A. Janesky, Nicholas D. Rizzo, Jon M. Slaughter
Abstract: A method of manufacturing a magnetoresistive device may include forming a first ferromagnetic region, forming an intermediate region on or above the first ferromagnetic region. The intermediate region may be formed of a dielectric material and include nitrogen. The method may also include forming a second ferromagnetic region on or above the intermediate region.
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes (a) etching through at least a portion of a thickness of the surface region to create a first set of exposed areas in the form of multiple strips extending in a first direction, and (b) etching through at least a portion of a thickness of the surface region to create a second set of exposed areas in the form of multiple strips extending in a second direction. The first set of exposed areas and the second set of exposed areas may have multiple areas that overlap. The method may also include, (c) after the etching in (a) and (b), etching through at least a portion of the thickness of the magnetoresistive stack through the first set and second set of exposed areas.
Type:
Grant
Filed:
May 22, 2020
Date of Patent:
January 5, 2021
Assignee:
Everspin Technologies, Inc.
Inventors:
Kerry Joseph Nagel, Sanjeev Aggarwal, Sarin A. Deshpande
Abstract: Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing. The improvements may be done by reducing parasitic effects, increasing sense element packing density, interleaving a Z-axis layout to reduce a subtractive effect, and optimizing an alignment between a Z-axis sense element and a flux guide, etc.
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
Type:
Application
Filed:
August 10, 2020
Publication date:
November 26, 2020
Applicant:
Everspin Technologies, Inc.
Inventors:
Sanjeev AGGARWAL, Sarin A. DESHPANDE, Kerry Joseph NAGEL
Abstract: A method of fabricating a magnetoresistive device includes etching a magnetoresistive stack using a first etching process to form one or more sidewalls, and etching the stack using a second etching process after forming the one or more sidewalls. Wherein, the second etching process may be relatively more isotropic than the first etching process.
Type:
Grant
Filed:
November 28, 2018
Date of Patent:
November 24, 2020
Assignee:
Everspin Technologies, Inc.
Inventors:
Sarin A. Deshpande, Jon Slaughter, Cong Hai, Hyunwoo Yang, Naganivetha Thiyagarajah, Shukai Ye
Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using one or more hard masks. The process of manufacture, in one embodiment, includes patterning a mask, after patterning the mask, etching (a) through a first layer of electrically conductive material to form an electrically conductive electrode and (b) through a third layer of ferromagnetic material to provide sidewalls of the second synthetic antiferromagnetic structure. The process further includes providing insulating material on or over the sidewalls of the second synthetic antiferromagnetic structure and, thereafter, etching through (a) a second tunnel barrier layer to provide sidewalls thereof, (b) a second layer of ferromagnetic material to provide sidewalls thereof, (c) a first tunnel barrier layer to provide sidewalls thereof, and (d) a first layer of ferromagnetic material to provide sidewalls of the first synthetic antiferromagnetic structure.
Type:
Grant
Filed:
July 11, 2019
Date of Patent:
November 24, 2020
Assignee:
Everspin Technologies, Inc.
Inventors:
Sarin A. Deshpande, Sanjeev Aggarwal, Kerry Joseph Nagel
Abstract: A magnetoresistive memory device that stores data in the synthetic antiferromagnet (SAF) included in each spin-torque memory cell provides for more robust data storage. In normal operation, the memory cells use the free portion of the memory cell for data storage. Techniques for storing data in the reference portions of memory cells are presented, where an unbalanced SAF that includes ferromagnetic layers having different magnetic moments is used to lower the switching barrier for the SAF and allow for writing data values to the SAF using lower currents and magnetic fields than would be required for a balanced SAF.
Type:
Grant
Filed:
February 27, 2019
Date of Patent:
November 3, 2020
Assignee:
Everspin Technologies, Inc.
Inventors:
Han-Jong Chia, Sumio Ikegawa, Michael Tran, Jon Slaughter
Abstract: A magnetoresistive device may include a first ferromagnetic region, a second ferromagnetic region, and an intermediate region positioned between the first ferromagnetic region and the second ferromagnetic region. The intermediate region may be formed of a dielectric material and comprise at least two different metal oxides.
Abstract: Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing. The improvements may be done by reducing parasitic effects, increasing sense element packing density, interleaving a Z-axis layout to reduce a subtractive effect, and optimizing an alignment between a Z-axis sense element and a flux guide, etc.
Abstract: A magnetoresistive device with a magnetically fixed region having at least two ferromagnetic regions coupled together by an antiferromagnetic coupling region. At least one of the two ferromagnetic regions includes multiple alternating metal layers and magnetic layers and one or more interfacial layers. Wherein, each metal layer includes at least one of platinum, palladium, nickel, or gold, and the interfacial layers include at least one of an oxide, iron, or an alloy including cobalt and iron.
Abstract: A method of manufacturing a magnetoresistive device may include forming a first ferromagnetic region, forming an intermediate region on or above the first ferromagnetic region. The intermediate region may be formed of a dielectric material and include nitrogen. The method may also include forming a second ferromagnetic region on or above the intermediate region.
Abstract: A magnetic field sensor that includes a differential bridge in which each path of the bridge includes a first type of magnetic field sensing device and a second type of magnetic field sensing device. The first and second types of magnetic field sensing devices differ in the magnetic moment imbalance present in the synthetic antiferromagnets (SAFs) included in their reference layers such that that different types of devices produce a different response to perpendicular magnetic fields, but the same response to in-plane magnetic fields. Such different magnetic moment imbalances in the SAFs of magnetic field sensing devices included in a bridge allow for accurate sensing of perpendicular magnetic fields in a differential manner that also cancels out interference from in-plane fields. Techniques for producing such magnetic field sensing devices on an integrated circuit are also presented.
Abstract: A magnetoresistive magnetic tunnel junction (MTJ) stack includes a free magnetic region, a fixed magnetic region, and a dielectric layer positioned between the free magnetic region and the fixed magnetic region. In one aspect, the fixed magnetic region consists essentially of an unpinned, fixed synthetic anti-ferromagnetic (SAF) structure which comprises (1) a first layer of one or more ferromagnetic materials, including cobalt, (ii) a multi-layer region including a plurality of layers of ferromagnetic materials, wherein the plurality of layers of ferromagnetic materials include a layer of one or more ferromagnetic materials including cobalt, and (iii) an anti-ferromagnetic coupling layer disposed between the first layer and the multi-layer region. The free magnetic region may include a circular shape, the one or more ferromagnetic materials of the first layer may include cobalt, iron and boron, and the dielectric layer may he disposed on the first layer.
Type:
Application
Filed:
June 2, 2020
Publication date:
September 17, 2020
Applicant:
Everspin Technologies, Inc.
Inventors:
Srinivas V. PIETAMBARAM, Bengt J. AKERMAN, Renu WHIG, Jason A. JANESKY, Nicholas D. RIZZO, Jon M. SLAUGHTER
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
Type:
Grant
Filed:
September 19, 2019
Date of Patent:
September 15, 2020
Assignee:
Everspin Technologies, Inc.
Inventors:
Sanjeev Aggarwal, Sarin A. Deshpande, Kerry Joseph Nagel