Patents Assigned to Fairchild Semiconductor Corporation
  • Termination region of a semiconductor device
    Patent number: 9496391
    Abstract: In one general aspect, an apparatus can include a semiconductor region, and a trench defined within the semiconductor region. The trench can have a depth aligned along a vertical axis and have a length aligned along a longitudinal axis orthogonal to the vertical axis. The trench can have a first portion of the length included in a termination region of the semiconductor region and can have a second portion of the length included in an active region of the semiconductor region.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: November 15, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Richard Stokes, Jason Higgs, Fred Session
  • Self test of MEMS accelerometer with ASICS integrated capacitors
    Patent number: 9488693
    Abstract: An apparatus comprises a micro-electromechanical system (MEMS) sensor including a first capacitive element and a second capacitive element and an integrated circuit (IC). The IC includes a switch network circuit and a capacitance measurement circuit. The switch network circuit is configured to electrically decouple the first capacitive element of the MEMS sensor from a first input of the IC and electrically couple the second capacitive element to a second input of the IC. The capacitance measurement circuit can be configured to measure capacitance of the second capacitive element of the MEMS sensor during application of a first electrical signal to the decoupled first capacitive element.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: November 8, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Jonathan Adam Kleks, Ion Opris, Justin Seng
  • CHARGE PUMP CIRCUIT FOR PROVIDING VOLTAGES TO MULTIPLE SWITCH CIRCUITS
    Publication number: 20160315534
    Abstract: A charge pump circuit generates a charge pump voltage that powers a bias circuit. The bias circuit generates a reference current and generates switch currents from the reference current. Gate-source voltages are generated from the switch currents and applied to switching components of switch circuits to connect two nodes. The gate-source voltages can be generated in the bias circuit and provided to the switch circuits. The gate-source voltages can also be generated in the switch circuits.
    Type: Application
    Filed: July 6, 2016
    Publication date: October 27, 2016
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Lei HUANG
  • Package including a semiconductor die and a capacitive component
    Patent number: 9478519
    Abstract: In one general aspect, a method can include forming a redistribution layer on a substrate using a first electroplating process, and forming a conductive pillar on the redistribution layer using a second electroplating process. The method can include coupling a semiconductor die to the redistribution layer, and can include forming a molding layer encapsulating at least a portion of the redistribution layer and at least a portion of the conductive pillar.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 25, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Ahmad R. Ashrafzadeh, Vijay G. Ullal, Justin Chiang, Daniel Kinzer, Michael M. Dube, Oseob Jeon, Chung-Lin Wu, Maria Cristina Estacio
  • Conductivity modulation in a silicon carbide bipolar junction transistor
    Patent number: 9478629
    Abstract: In one general aspect, a silicon carbide bipolar junction transistor (BJT) can include a collector region, a base region on the collector region, and an emitter region on the base region. The silicon carbide BJT can include a base contact electrically contacting the base region where the base region having an active part interfacing the emitter region. The silicon carbide BJT can also include an intermediate region of semiconductor material having at least a part extending from the active part of the base region to the base contact where the intermediate region having a doping level higher than a doping level of the active part of the base region.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: October 25, 2016
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Martin Domeij, Benedetto Buono
  • Silicon-carbide trench gate MOSFETs
    Patent number: 9466709
    Abstract: In a general aspect, an apparatus can include a semiconductor substrate, a drift region disposed in the semiconductor substrate; a body region disposed in the drift region and a source region disposed in the body region. The apparatus can also include a gate trench disposed in the semiconductor substrate. The apparatus can further include a gate dielectric disposed on a sidewall and a bottom surface of the gate trench, the gate dielectric on the sidewall defining a first interface with the body region and the gate dielectric on the bottom surface defining a second interface with the body region. The apparatus can still further include a gate electrode disposed on the gate dielectric and a lateral channel region disposed in the body region, the lateral channel region being defined along the second interface.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: October 11, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Andrei Konstantinov
  • SiC power device having a high voltage termination
    Patent number: 9461108
    Abstract: In one general aspect, an apparatus can include a semiconductor region including a silicon carbide material and a junction termination extension implant region disposed in the semiconductor region. The apparatus can include a low interface state density portion of a dielectric layer having at least a portion in contact with the junction termination extension implant region.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: October 4, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Andrei Konstantinov
  • ARTIFICIAL RIPPLE MODULATION CONTROL CIRCUITRY
    Publication number: 20160285368
    Abstract: In one embodiment the present disclosure provides a power supply system that includes power switch circuitry configured to switch an input voltage to generate a switched input voltage; output circuitry including an inductor to generate an output voltage from the switched input voltage; and pulse width modulation (PWM) controller circuitry configured to generate a PWM signal to control the power switch circuitry; wherein the PWM controller circuitry is further configured to turn OFF the PWM signal based on a ramp signal that emulates, at least in part, current of the inductor and a feedback signal indicative of an error between the output voltage and a reference voltage.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 29, 2016
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Weihong QIU, Shangyang XIAO
  • Micromachined 3-axis accelerometer with a single proof-mass
    Patent number: 9455354
    Abstract: This document discusses, among other things, an inertial measurement system including a device layer including a single proof-mass 3-axis accelerometer, a cap wafer bonded to a first surface of the device layer, and a via wafer bonded to a second surface of the device layer, wherein the cap wafer and the via wafer are configured to encapsulate the single proof-mass 3-axis accelerometer. The single proof-mass 3-axis accelerometer can be suspended about a single, central anchor, and can include separate x, y, and z-axis flexure bearings, wherein the x and y-axis flexure bearings are symmetrical about the single, central anchor and the z-axis flexure is not symmetrical about the single, central anchor.
    Type: Grant
    Filed: September 18, 2011
    Date of Patent: September 27, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Cenk Acar
  • Button-press detection and filtering
    Patent number: 9456272
    Abstract: The disclosure provides a button-press detection and filtering method, related circuit, and button-press detection chip for a external device. A button-press signal from a wire control apparatus is coupled to the button-press detection chip for the external device. The button-press detection chip for the external device can digitally sample the button-press signal through the filter circuit and outputs a digital logic signal corresponding to a button to an audio codec according to the sampling result. The audio codec can determine a pressed button according to the digital logic signal and performs a corresponding function. With the solutions of the disclosure, a noise interference signal in a button-press signal may be avoided and a pressed button may be accurately detected, without using a dedicated chip or complex software codes in a wire control apparatus and an electronic device.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: September 27, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Tony Cheng Han Lee, Shawn Kirk Barden, Ricky Li, Emma Wang
  • MEMS device front-end charge amplifier
    Patent number: 9444404
    Abstract: This document discusses, among other things, apparatus and methods for a front-end charge amplifier. In certain examples, a front-end charge amplifier for a microelectromechanical system (MEMS) device can include a charge amplifier configured to couple to the MEMS device and to provide sense information of a proof mass of the MEMS device, a feedback circuit configured to receive the sense information and to provide feedback to an input of the charge amplifier, and wherein the charge amplifier includes a transfer function having a first pole at a first frequency, a second pole at a second frequency, and one zero at a third frequency.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: September 13, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Ion Opris, Hai Tao, Shungneng Lee
  • POWER SUPPLY WITH NEAR VALLEY SWITCHING
    Publication number: 20160261201
    Abstract: A switched-mode power supply with near valley switching includes a quasi-resonant converter. The converter includes a switch element that is turned on not only at the valley, but also in a window range of ?tNVW close to the valley, where the voltage across the switch element is at its minimum. This advantageously reduces switching loss and maintains a balance between efficiency and frequency variation.
    Type: Application
    Filed: February 25, 2016
    Publication date: September 8, 2016
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Zhibo TAO, Jung-Sheng CHEN, Li LIN, Kai-Fang WEI, Chih-Hsien HSIEH, Hangseok CHOI, Yue-Hong TANG
  • POWER SUPPLY WITH LINE COMPENSATION CIRCUIT
    Publication number: 20160261196
    Abstract: A line compensation circuit for a power supply includes a line voltage sense circuit and a current limit adjuster. The line voltage sense circuit senses a slope of an inductor current by way of a compensation capacitor that receives a sense voltage that is representative of the inductor current on a primary side of the power supply. A compensation current that is generated from the compensation capacitor is used by the current limit adjuster to adjust an output current limit of the power supply.
    Type: Application
    Filed: February 17, 2016
    Publication date: September 8, 2016
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Zhibo TAO, David KUNST
  • Sensorless current sense for regulating inductor current in a buck converter
    Patent number: 9431902
    Abstract: A device and method for sensing an inductor current in an inductor is provided that generates a voltage signal proportionate to the inductor current if the inductor is connected to a positive supply and simulates the inductor current if the inductor is not connected to the positive supply. The voltage signal may be generated by sampling an input voltage from the inductor onto a capacitor if the inductor is connected to the positive supply. The inductor current may be simulated by generating a simulation current and pushing the simulation current onto the capacitor.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: August 30, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventor: James Garrett
  • Common-mode feedback differential amplifier
    Patent number: 9431978
    Abstract: The present invention discloses a common-mode feedback differential amplifier circuit, a common-mode feedback differential amplification method, and an integrated circuit. In an example, a common-mode feedback (CMFB) loop conducts voltage division on a first common-mode signal to generate a second common-mode signal and a third common-mode signal, a differential amplifier sets a voltage of the signal with the higher voltage between the second common-mode signal and the third common-mode signal equal to a voltage of a first input terminal or a second input terminal, and the CMFB loop controls the differential amplifier to output an output signal with the minimum voltage equal to the voltage of the first common-mode signal.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: August 30, 2016
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Lei Huang
  • Superjunction structures for power devices and methods of manufacture
    Patent number: 9431481
    Abstract: In a general aspect, a power device can include an epitaxial layer of a first conductivity type, an active region, a termination region surrounding the active region, a plurality of trenches disposed in the epitaxial layer, and silicon material of a second conductivity type disposed in the plurality of trenches. The silicon material of the second conductivity type and a plurality of mesas defined in the epitaxial layer by the trenches, can define a plurality of concentric octagon-shaped pillars of alternating conductivity type, a first portion of the pillars being disposed in the active region and a second portion of the pillars being disposed in the termination region. Sidewalls of the plurality of trenches can define a first four legs and a second four legs of each of the pillars. The sidewalls can have a same crystallographic plane direction.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: August 30, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Jaegil Lee
  • MIC audio noise filtering
    Patent number: 9432786
    Abstract: This document discusses, among other things, a MIC audio noise filtering system configured to detect MIC audio noise at a pole of a four-pole audio jack using first and second comparators. The MIC audio noise detection system can include first and second comparators configured to compare a value of the pole to respective first and second thresholds and to provide an output indicative of the comparisons and a detection circuit configured to count changes in the output over a first period of time and to detect MIC audio noise at the pole of the four-pole audio jack using the count.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: August 30, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Seth M. Prentice, Shawn Barden
  • Through silicon via including multi-material fill
    Patent number: 9425328
    Abstract: An apparatus includes a substrate having at least one via disposed in the substrate, wherein the substrate includes a trench having a substantially trapezoidal cross-section, the trench extending through the substrate between a lower surface of the substrate and an upper surface of the substrate, wherein the top of the trench opens to a top opening, and the bottom of the trench opens to a bottom opening, the top opening being larger than the bottom opening. The apparatus can include a mouth surrounding the top opening and extending between the upper surface and the top opening, wherein a mouth opening in the upper surface is larger than the top opening of the trench, wherein the via includes a dielectric layer disposed on an inside surface of a trench. The apparatus includes and a fill disposed in the trench, with the dielectric layer sandwiched between the fill and the substrate.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: August 23, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: David Lambe Marx, Brian Bircumshaw, Janusz Bryzek
  • Configuration of portions of a power device within a silicon carbide crystal
    Patent number: 9425262
    Abstract: In one general aspect, an apparatus can include a silicon carbide (SiC) crystal having a top surface aligned along a plane and the SiC crystal having an off-orientation direction. The apparatus including a semiconductor device defined within the SiC crystal. The semiconductor device having an outer perimeter where the outer perimeter has a first side aligned along the off-orientation direction and a second side aligned along a direction non-parallel to the off-orientation direction. The first side of the outer perimeter of the semiconductor device having a length longer than the second side of the outer perimeter of the semiconductor device.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: August 23, 2016
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Andrei Konstantinov
  • Complimentary bit slicing side channel attack defense
    Patent number: 9423820
    Abstract: This document discusses, among other things, systems and methods to communicate data over a data bus during a first period of a clock signal with a uniform power distribution, including providing a complimentary bit state of the data during a first portion of the first period of the clock signal and providing an actual bit state of the data during a second portion of the first period of the clock signal. In an example, the first period can include first, second, third, and fourth portions, and the systems and methods can include providing a complimentary bit state of the data during first and fourth portions of the first period of the clock signal and an actual bit state of the data during a second portion of the first period of the clock signal.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: August 23, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Robert A. Card