Patents Assigned to Fairchild Semiconductor Corporation
  • Patent number: 9745947
    Abstract: In a general aspect, an apparatus can include an insulated-gate bipolar transistor device (IGBT), a gate driver circuit (driver) coupled with a gate terminal of the IGBT and a low-resistance switch device coupled between an emitter terminal of the IGBT and an electrical ground terminal, the low-resistance switch device being coupled with the electrical ground terminal via a resistor. The apparatus can also include a current sensing circuit coupled with the driver and a current sense signal line coupled with the current sensing circuit and a current sense node, the current sense node being disposed between the low-resistance switch device and the resistor. The apparatus can further include a control circuit configured, when the driver is off, to detect, based on a voltage on the current sense node, when a current through the resistor is above a threshold value and disable the IGBT in response to the detection.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: August 29, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: James E. Gillberg, Juergen Pianka
  • Patent number: 9748329
    Abstract: Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: August 29, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Ashok Challa
  • Publication number: 20170244333
    Abstract: A synchronous rectifier driver pre-positions a gate of a synchronous rectifier to allow for fast turn-off. The synchronous rectifier driver turns ON the synchronous rectifier by driving the gate at a high level for a period of time that is based on a previous conduction time of the synchronous rectifier. The synchronous rectifier driver thereafter drives the gate at a lower level that is sufficient to keep the synchronous rectifier ON. The synchronous rectifier can be quickly turned OFF by further reducing the level of the drive signal at the gate of the synchronous rectifier.
    Type: Application
    Filed: November 22, 2016
    Publication date: August 24, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Hangseok CHOI, Wei-Hsuan HUANG, Cheng-Sung CHEN
  • Patent number: 9741873
    Abstract: In at least one general aspect, a SiC device can include a drift region of a first conductivity type, a shielding body, and a Schottky region. The SiC device can include a rim having a second conductivity type at least partially surrounding the shielding body and the Schottky region. The SiC device can include a termination region at least partially surrounding the rim and having a doping of the second conductivity type. The termination region can have a transition zone disposed between a first zone and a second zone where the first zone has a top surface lower in depth than a depth of a top surface of the second zone and the transition zone has a recess.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 22, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Andrei Konstantinov
  • Patent number: 9735147
    Abstract: In one general aspect, an apparatus can include a junction-less, gate-controlled voltage clamp device having a gate terminal coupled to a voltage reference device.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: August 15, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Adrian Mikolajczak, Tirthajyoti Sarkar
  • Patent number: 9735768
    Abstract: In a general aspect, an apparatus can include a temperature measurement circuit configured to produce a first signal indicating a first operating temperature of a first semiconductor device and a temperature comparison circuit operationally coupled with the temperature measurement circuit. The temperature comparison circuit can be configured to compare the first signal with a second signal indicating a second operating temperature of at least a second semiconductor device and produce a comparison signal indicating whether the indicated first operating temperature is higher, lower or equal to the indicated second operating temperature. The apparatus can also include an adjustment circuit configured to adjust operation of the first semiconductor device based on the comparison signal.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: August 15, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Ahmad R. Ashrafzadeh
  • Patent number: 9735112
    Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: August 15, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: John Constantino, Timwah Luk, Ahmad Ashrafzadeh, Robert L. Krause, Etan Shacham, Maria Clemens Ypil Quinones, Janusz Bryzek, Chung-Lin Wu
  • Patent number: 9729986
    Abstract: In one general aspect, a method can include calculating, at a calibration temperature of a speaker, a calibration parameter through a coil of the speaker in response to a first test signal, and can include sending a second test signal through the coil of the speaker. The method can also include measuring a parameter through the coil of the speaker based on the second test signal, and calculating a temperature change of the coil of the speaker based on the parameter and based on the calibration parameter at the calibration temperature.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: August 8, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Philip Crawley, William D. Llewellyn, Majid Shushtarian
  • Publication number: 20170222569
    Abstract: A flyback converter includes a primary-side switch that controls conduction of current on a primary side of a transformer and a synchronous rectifier on a secondary side of the transformer. A synchronous rectifier driver controls the conduction of the synchronous rectifier by adaptively adjusting a turn-off threshold of the synchronous rectifier.
    Type: Application
    Filed: November 22, 2016
    Publication date: August 3, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Hangseok CHOI, Lei CHEN, Cheng-Sung CHEN
  • Publication number: 20170222557
    Abstract: Generally, this disclosure provides circuitry and methods for determining the output capacitance of an output load capacitor of a power supply. The output capacitance is generally determined by beginning a calibration period and charging an output capacitor with a current source to generate an output voltage. The output voltage may be compared to a reference voltage, and a time period is determined during which the output voltage is less than the reference voltage. The capacitance value, C, of the output capacitor may be determined based on, at least in part, the determined time period. This disclosure also provides circuitry and methods to adjust certain parameters of the power supply based on the determined C value. For example, in a ramp compensation portion of the power supply, the value of a ramp capacitor and/or reset resistor may be adjusted once the value of C is determined.
    Type: Application
    Filed: January 23, 2017
    Publication date: August 3, 2017
    Applicant: Fairchild Semiconductor Corporation
    Inventor: Philip J. Crawley
  • Publication number: 20170222568
    Abstract: A switching converter includes a synchronous rectifier and a synchronous rectifier driver that controls conduction of the synchronous rectifier. The synchronous rectifier driver turns OFF the synchronous rectifier in response to a turn-off trigger. The synchronous rectifier driver prevents the turn-off trigger from turning OFF the synchronous rectifier during a turn-off trigger blanking time that is adaptively set based on a conduction time of the synchronous rectifier.
    Type: Application
    Filed: November 22, 2016
    Publication date: August 3, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Hangseok CHOI, Lei CHEN, Cheng-Sung CHEN
  • Publication number: 20170201843
    Abstract: This document discusses, among other things, systems and methods to reduce power use of an accessory detection device. The accessory detection device can be configured to be coupled to a mobile device having an audio jack configured to be coupled to a mobile device accessory having a send/end key. In an example, the accessory detection device can include a comparator and a switch. The comparator can be configured to receive mobile device accessory information from the mobile device accessory and to determine activation of the send/end key using the received mobile device accessory information. The switch can be configured to receive connection information indicative of mobile device accessory connection to the audio jack and to isolate a reference input of the comparator from a supply voltage using the connection information, for example, to reduce leakage current.
    Type: Application
    Filed: March 22, 2017
    Publication date: July 13, 2017
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Seth M. Prentice, Julie Lynn Stultz
  • Patent number: 9696736
    Abstract: In one general aspect, an apparatus can include a load terminal, and a power source terminal. The apparatus can include a current limiter coupled to the load terminal and coupled to the power terminal. The current limiter can be configured to limit a current from the power source terminal to the load terminal using an electric field activated in response to a difference in voltage between the power source terminal and the load terminal.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: July 4, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Adrian Mikolajczak
  • Patent number: 9698143
    Abstract: In a general aspect, a wireless multichip module can include a leadframe structure with portions configured to receive at least one flip-chip mounted semiconductor die, including one or more of an integrated circuit, a high side MOSFET and/or a low side MOSFET, which can form a half-bridge circuit that is encapsulated in a molding compound. The module can be assembled without any bond wires (e.g., be wireless). The module may include carry passive components including an external input capacitor and/or an internal input capacitor.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: July 4, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Allan Tungul Flores, Romel N. Manatad
  • Patent number: 9692304
    Abstract: An integrated power stage device includes a switch node that is coupled to an output inductor. The integrated power stage device generates a monitor current that is a scaled version of the current through the output inductor. The integrated power stage device outputs a single-ended offset monitor current that is equal to the monitor current plus a DC offset current. A PWM controller senses the current through the output inductor by receiving a monitor voltage that is developed from the offset monitor current. The PWM controller generates a PWM signal in accordance with the sensed output inductor current to control a switching operation of a power switch of the integrated power stage device.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: June 27, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Jo Luo, Jon Gladish
  • Patent number: 9685550
    Abstract: In one general aspect, an apparatus can include a silicon carbide (SiC) device can include a gate dielectric, a first doped region having a first conductivity type, a body region of the first conductivity type, and a second doped region having a second conductivity type. The second doped region has a first portion disposed between the first doped region and the body region, and the second doped region has a second portion disposed between the first doped region and the gate dielectric.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: June 20, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Martin Domeij
  • Patent number: 9685398
    Abstract: In a general aspect, a packaged semiconductor device can include a semiconductor die having at least a first terminal on a first side of the semiconductor die and a second terminal on a second side of the semiconductor die. The device can include a leadframe portion electrically coupled to the first terminal of the semiconductor die and a clip portion electrically coupled to the second terminal of the semiconductor die. The device can include a molding compound. A surface of the leadframe portion and a first surface of the molding compound can define at least a portion of a first surface of the device. A surface of the clip portion and a second surface of the molding compound can define at least a portion of a second surface of the device that is parallel to the first surface of the device.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: June 20, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Margie Rios, Aira Lourdes Villamor, Maria Cristina Estacio, Armand Vincent Jereza
  • Patent number: 9679890
    Abstract: In one general aspect, an apparatus can include a semiconductor substrate, and a trench defined within the semiconductor substrate and having a depth aligned along a vertical axis, a length aligned along a longitudinal axis, and a width aligned along a horizontal axis. The apparatus includes a dielectric disposed within the trench, and an electrode disposed within the dielectric and insulated from the semiconductor substrate by the dielectric. The semiconductor substrate can have a portion aligned vertically and adjacent the trench, and the portion of the semiconductor substrate can have a conductivity type that is continuous along an entirety of the depth of the trench. The apparatus is biased to a normally-on state.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: June 13, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Tirthajyoti Sarkar, Adrian Mikolajczak, Ihsiu Ho, Ashok Challa
  • Patent number: 9673712
    Abstract: The present disclosure describes full bridge power supply systems and control methods. In at least one embodiment, the full bridge power supply system may be driven utilizing a two-phase continuous conduction switching mode to control the inductor current. In another embodiment, the full bridge power supply system may be driven utilizing variably-configured three-phase continuous conduction modes to control the inductor current when an input voltage is within a window value to the output voltage. In another embodiment, the full bridge power supply may be driven using a four-phase discontinuous conduction switching mode to control the inductor current when a load current is below a current lower threshold.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: June 6, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Timothy Alan Dhuyvetter
  • Patent number: 9673655
    Abstract: This document discusses, among other things, a charge regulator configured to optimize charging of an energy storage device by measuring an internal voltage drop of the energy storage device using an open circuit voltage (OCV) across the terminals of the energy storage device during charging and a voltage across the terminals of the energy storage device during charging (CCV).
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: June 6, 2017
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Larry Dean Bradley