Patents Assigned to Fairchild Semiconductor Corporation
  • Publication number: 20170346385
    Abstract: A switch mode power supply controller includes a switch terminal adapted to be coupled to an inductor that drives a load, high- and low-side switches a pulse width modulation (PWM) circuit, and a current monitor circuit. The PWM circuit is coupled to a feedback terminal for receiving a feedback signal, and alternatively drives the high-side switch and the low-side switch with a duty cycle set using the feedback signal to regulate an output voltage to a desired level in a work mode, and keeps both the high-side switch and the low-side switch non-conductive in a non-work mode. The current monitor circuit provides a current monitor signal representative of a current driven from the inductor to the load, wherein the current monitor circuit forms the current monitor signal by measuring an inductor current during a work mode, and by emulating the inductor current during a non-work mode.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 30, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Enzhu LIANG, Kaiwei YAO, Ming GU
  • Publication number: 20170338807
    Abstract: A ramp generator includes a current generator, a current mirror, and a first capacitor. The current generator has an input for receiving a clock signal, and an output for providing a current proportional to a frequency of the clock signal using a first transistor having first and second current electrodes and a control electrode, an amplifier that establishes a reference voltage on the second current electrode of the first transistor, and a variable resistor coupled between the second current electrode of the second transistor and ground whose resistance is set according to the frequency of the clock signal. The current mirror has an input coupled to the first terminal of the first transistor, and a second terminal. The first capacitor has a first terminal coupled to the output of the current mirror and providing a ramp signal, and a second terminal coupled to the first power supply voltage terminal.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 23, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Hua ZHU, Kaiwei YAO
  • Patent number: 9825548
    Abstract: A switching converter includes a synchronous rectifier and a synchronous rectifier driver that controls conduction of the synchronous rectifier. The synchronous rectifier driver turns OFF the synchronous rectifier in response to a turn-off trigger. The synchronous rectifier driver prevents the turn-off trigger from turning OFF the synchronous rectifier during a turn-off trigger blanking time that is adaptively set based on a conduction time of the synchronous rectifier.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: November 21, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Hangseok Choi, Lei Chen, Cheng-Sung Chen
  • Patent number: 9812976
    Abstract: A power supply includes a control transistor that controls a primary winding of a transformer to induce current on a secondary winding of the transformer to generate an output voltage. A pulse width modulation (PWM) controller integrated circuit (IC) chip drives the control transistor through a gate pin. The PWM controller IC chip has a feedback pin that receives a feedback signal indicative of the output voltage. A high voltage (HV) startup transistor is controlled through the feedback pin. The HV startup transistor turns ON during startup to generate a supply voltage from current received from the input voltage of the power supply. The HV startup transistor turns OFF when the supply voltage reaches a startup voltage level that is sufficient to start the switching operation of the control transistor and thereby receive operating current from an auxiliary winding of the transformer.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: November 7, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Hangseok Choi
  • Patent number: 9812956
    Abstract: A power supply system has a power switch circuit that switches an input voltage to generate a switched input voltage, an output circuit that generates an output voltage from the switched input voltage, and a pulse width modulation (PWM) controller that generates a PWM signal to control the power switch circuit. The PWM controller turns OFF the PWM signal based on a ramp signal that emulates a current of an output inductor and a feedback signal that indicates an error between the output voltage and a reference voltage.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: November 7, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Weihong Qiu, Shangyang Xiao
  • Patent number: 9812440
    Abstract: This document discusses, among other things, a biased electrostatic discharge (ESD) circuit and method configured to reduce capacitance of an ESD structure with little to no change in other ESD structure parameters. A bulk terminal of an ESD device can be negative biased to reduce a drain terminal to source terminal capacitance of the ESD device. A charge pump can be configured to provide a negative bias to the bulk terminal of the ESD device. In certain examples, the gate terminal of the ESD device can be coupled to the source terminal of the ESD device, such as through a resistor, and the source terminal can be coupled to ground.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: November 7, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Kenneth P. Snowdon, Taeghyun Kang, Yongliang Li
  • Patent number: 9802814
    Abstract: An apparatus includes a substrate having at least one via disposed in the substrate, wherein the substrate includes a trench having a substantially trapezoidal cross-section, the trench extending through the substrate between a lower surface of the substrate and an upper surface of the substrate, wherein the top of the trench opens to a top opening, and the bottom of the trench opens to a bottom opening, the top opening being larger than the bottom opening. The apparatus can include a mouth surrounding the top opening and extending between the upper surface and the top opening, wherein a mouth opening in the upper surface is larger than the top opening of the trench, wherein the via includes a dielectric layer disposed on an inside surface of a trench. The apparatus includes and a disposed in the trench, with the dielectric layer sandwiched between the fill and the substrate.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: October 31, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: David Lambe Marx, Brian Bircumshaw, Janusz Bryzek
  • Publication number: 20170302184
    Abstract: In one embodiment, a power supply controller, or alternately a semiconductor device having a power supply controller, may have a circuit configured configuring the PWM circuit to form a first signal having a value formed to be representative of a peak value of a primary current through the power switch and having a duration that is representative of a time interval that a secondary current is flowing through a secondary winding wherein the peak value is the peak value during an on-time of the power switch, and configured to form a current having a value that is representative of an average value of the secondary current.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 19, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Lei CHEN, Chih-Hsien HSIEH, Yue-Hong TANG
  • Publication number: 20170303057
    Abstract: In one general aspect, a method can include calculating, at a calibration temperature of a speaker, a calibration parameter through a coil of the speaker in response to a first test signal, and can include sending a second test signal through the coil of the speaker. The method can also include measuring a parameter through the coil of the speaker based on the second test signal, and calculating a temperature change of the coil of the speaker based on the parameter and based on the calibration parameter at the calibration temperature.
    Type: Application
    Filed: July 6, 2017
    Publication date: October 19, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Philip CRAWLEY, William D. LLEWELLYN, Majid SHUSHTARIAN, Earl D. SCHREYER
  • Publication number: 20170302185
    Abstract: In one embodiment, a power supply controller, or alternately a semiconductor device having a power supply controller, may have a first circuit configured to form a sense signal that is representative of a signal from an auxiliary winding of a transformer. A feedback circuit may be configured to allow the sense signal to increase in response to a turn-off of the power switch, to subsequently detect a second increase of the sense signal prior to subsequently turning on the power switch, and to form a feedback signal as a value of the sense signal responsively to the second increase of the sense signal.
    Type: Application
    Filed: March 29, 2017
    Publication date: October 19, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Zhibo TAO, Chih-Hsien HSIEH, Yue-Hong TANG
  • Patent number: 9791523
    Abstract: This document discusses, among other things, a first magnetic sensor configured to sense first and second components of a magnetic field in respective, orthogonal directions, using first, second, third, and fourth sense elements, each on an angled surface sloped with respect to a surface, each including respective first, second, third, and fourth longitudinal axes, each parallel to each other. Further, a second magnetic sensor on the same surface can sense second and third components of a magnetic field in respective, orthogonal directions, using first, second, third, and fourth sense elements, each on an angled surface sloped with respect to the first surface, each including respective first, second, third, and fourth longitudinal axes, each parallel to each other and orthogonal to the longitudinal axes of the first magnetic sensor.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: October 17, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Phil Mather
  • Patent number: 9794708
    Abstract: Apparatus and methods for detecting audio jack connection anomalies such as moisture or a partial insertion of an audio jack plug with an audio jack receptacle are provided. In an example, a method for detecting an audio jack insertion anomaly can include ramping on a first detection current source of a detection circuit coupled to a detection terminal of a first audio jack connector, receiving a reference information at a comparator of the detection circuit, receiving a voltage of the detection terminal at the comparator, providing comparison information at an output of the comparator, the comparison information indicative of a comparison of the voltage of the detection terminal and the reverence information, and wherein a first state of the comparison information indicates the audio jack insertion anomaly is due to moisture at the first audio jack connector.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: October 17, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: John R. Turner
  • Publication number: 20170288048
    Abstract: In one general aspect, an apparatus can include a silicon carbide (SiC) device can include a gate dielectric, a first doped region having a first conductivity type, a source, a body region of the first conductivity type, and a second doped region having a second conductivity type. The second doped region can have a first portion and a second portion. The first portion can be disposed between the first doped region and the body region and the second portion can be disposed between the first doped region and the gate dielectric. The first portion of the second doped region can have a width less than a width of the first doped region.
    Type: Application
    Filed: June 19, 2017
    Publication date: October 5, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Martin DOMEIJ
  • Patent number: 9774954
    Abstract: This document discusses, among other things, an impedance detection circuit, method, and integrated circuit, comprising a ramp-up current generation circuit and an impedance determining circuit, wherein the ramp-up current generation circuit is configured to input a ramp-up current including n breaks to a port of a device where the ramp-up current generation circuit is disposed, to which port an external device is connected, and wherein the impedance determining circuit is configured to detect an impedance of the external device in each break time period of the ramp-up current input by the ramp-up current generation circuit until the impedance of the external device is acquired by detection in the last break time period of the n breaks.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: September 26, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Peng Zhu, Kenneth O'Brien, Jianing Zhou, Yongliang Li
  • Patent number: 9772233
    Abstract: This document discusses, among other things, an apparatus and method for providing temperature information. In an example, an integrated circuit apparatus can include a first resistor configured to be coupled to a first terminal of a temperature-sensitive resistance, a second resistor configured to be coupled to a second terminal of the temperature-sensitive resistance, and a temperature information circuit configured to receive a first voltage from the first terminal of the temperature-sensitive resistance and a second voltage from the second terminal of the temperature-sensitive resistance. The temperature information circuit can provide the temperature information using the first and second voltages.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: September 26, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Kenneth P. Snowdon, Roy Yarbrough
  • Patent number: 9774240
    Abstract: This document discusses, among other things, apparatus and methods for an edge rate driver for a power converter switch. In an example, the driver can include an input node configured to receive a pulse width modulated signal, a first switch configured to couple a control node of the power converter switch to a supply voltage during a first state, a second switch configured to couple the control node of the power converter switch to a reference voltage during a second state, and a first current source configured to supply charge current to the first switch when the power converter switch transitions from the second state to the first state, the charge current configured to charge a parasitic capacitance of the power converter switch.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: September 26, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Michael David Mulligan, Timothy Alan Dhuyvetter
  • Patent number: 9769579
    Abstract: Apparatus and methods for detecting audio jack connection anomalies such as moisture or a partial insertion of an audio jack plug with an audio jack receptacle are provided. In an example, a method for detecting an audio jack insertion anomaly can include ramping on a first detection current source of a detection circuit coupled to a detection terminal of a first audio jack connector, receiving a reference information at a comparator of the detection circuit, receiving a voltage of the detection terminal at the comparator, providing comparison information at an output of the comparator, the comparison information indicative of a comparison of the voltage of the detection terminal and the reverence information, and wherein a first state of the comparison information indicates the audio jack insertion anomaly is due to moisture at the first audio jack connector.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: September 19, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: John R. Turner
  • Patent number: 9768761
    Abstract: This document discusses, among other things, a voltage comparator, an integrated circuit, or a voltage comparison method having increased precision. The hysteresis comparator or the integrated circuit can include first and second input transistors, each having a gate configured to receive a respective first or second input voltage. A bias power source can generate a bias current to a first node by applying a voltage through a first resistor. The first node can be connected to a source of the first input transistor through a second resistor and to a source of the second input transistor through a third resistor. The first, second, and third resistors can include the same type of resistor, with the second and third resistors having different resistance values.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: September 19, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Lei Huang, Jianing Zhou, Zhaohong Li
  • Patent number: 9762049
    Abstract: This document discusses, among other things, a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power. Further, the ST GFCI monitor can detect a response to the simulated ground fault.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: September 12, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Bruce Armstrong
  • Patent number: 9759564
    Abstract: This document discusses, among other things, a temperature and power supply calibration system configured to compensate for temperature and supply voltage variation in MEMS or other circuits using representations of positive and negative supply voltages and first and second base-emitter voltages, wherein the second base-emitter voltage is a scaled representation of the first base-emitter voltage.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: September 12, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Shungneng Lee, Justin Seng, Marwan Ashkar, Ion Opris