Abstract: A semiconductor device includes: a conductive substrate; a plurality of semiconductor chips each having a first main electrode on a bottom surface side and a second main electrode on a top surface side, the plural semiconductor chips being arranged to form a first column and a second column connected parallel to each other on the conductive substrate; and a control wiring substrate including an insulating layer, a plurality of top-surface conductive layers provided on a top surface of the insulating layer, and a plurality of bottom-surface conductive layers each having a narrower width than the insulating layer and provided on a bottom surface of the insulating layer, the bottom-surface conductive layers being arranged on the conductive substrate between the first column and the second column of the semiconductor chips.

Abstract: A semiconductor device includes: a drift layer; a base region provided on the drift layer; a main region provided on the drift layer; a gate electrode provided on the drift layer and buried in a gate trench extending in one direction across both ends of an active part with a gate insulating film interposed; a gate runner provided on an outer circumferential side of the active part so as to be electrically connected to the gate electrode; a gate pad provided on an inner side of the gate runner; and a resistance layer provided on the drift layer and buried in a trench for resistance extending in the one direction across the both ends of the active part with an insulating film interposed so as to be electrically connected between the gate pad and the gate runner.

Abstract: A semiconductor device includes an active region as a region through which main current flows, an active region perimeter that surrounds the active region, and an edge termination region that surrounds the active region perimeter. The active region perimeter includes: a semiconductor substrate; a drift layer of a first conductivity type; a base region of a second conductivity type provided on an upper surface side of the drift layer; a source region of a first conductivity type selectively provided on an upper surface side of the base region; a perimeter trench including a contact region of the second conductivity type selectively provided, having at least a sidewall on the active region side in contact with the source region, and provided to pass through the base region; and a source ring region provided to be in contact with the contact region.

Abstract: A semiconductor device includes: a first semiconductor chip and a second semiconductor chip each including a first main electrode on a bottom surface side and a second main electrode on a top surface side; a conductive member provided to electrically connect the first main electrode of the first semiconductor chip to the second main electrode of the second semiconductor chip; a first external terminal electrically connected to the second main electrode of the first semiconductor chip and partly opposed to the conductive member, and a resin member provided to be at least partly arranged between the conductive member and the first external terminal.

Abstract: A semiconductor device includes a current spreading region of the first conductivity type provided on a drift layer and having a higher impurity density than the drift layer; a base region of a second conductivity type provided on the current spreading region; a base contact region of the second conductivity type provided in a top part of the base region and having a higher impurity density than the base region; and an electrode contact region of the first conductivity type provided in a top part of the base region that is laterally in contact with the base contact region, the electrode contact region having a higher impurity density than the drift layer, wherein a density of a second conductivity type impurity element in the base contact region is at least two times as much as a density of a first conductivity type impurity element in the electrode contact region.

Abstract: Provided is a semiconductor device including a buffer region. Provided is a semiconductor device including: semiconductor substrate of a first conductivity type; a drift layer of the first conductivity type provided in the semiconductor substrate; and a buffer region of the first conductivity type provided in the drift layer, the buffer region having a plurality of peaks of a doping concentration, wherein the buffer region has: a first peak which has a predetermined doping concentration, and is provided the closest to a back surface of the semiconductor substrate among the plurality of peaks; and a high-concentration peak which has a higher doping concentration than the first peak, and is provided closer to an upper surface of the semiconductor substrate than the first peak is.

Abstract: A semiconductor device includes a semiconductor element, a substrate including an insulating board, and first conductive plate and second conductive plate on the insulating board, and a wiring unit including a first lead frame electrically connected to the first conductive plate and having a first wiring portion wired parallel to the insulating board, a second lead frame electrically connected to the second conductive plate, and having a second wiring portion above the first lead frame and overlapping the first wiring portion in a plan view at a superimposed area, a gap between the first and second lead frames being formed in the superimposed area, and a wiring holding portion holding the first and second lead frames. The wiring holding portion includes a wiring gap portion which fills in the gap, and a wiring surface portion disposed over the second wiring portion in the superimposed area.

Abstract: Provided is a test method comprising: preparing a plurality of groups for setting, each of which has a plurality of semiconductor devices for setting, and assigning an inspection voltage to each of the respective plurality of groups for setting; performing first testing by applying the assigned inspection voltage to the semiconductor devices for setting, and testing, at a first temperature, the plurality of semiconductor devices for setting included in each of the plurality of groups for setting; performing second testing by testing, at a second temperature different from the first temperature, a semiconductor device for setting having been determined as being non-defective and by detecting a breakdown voltage at which the semiconductor device for setting is broken; acquiring a relationship between the inspection voltage and the breakdown voltage; and setting an applied voltage used when testing a semiconductor device under test at the first temperature, based on the acquired relationship.

Abstract: A semiconductor module includes a first semiconductor chip including a first main electrode, a second semiconductor chip including a second main electrode, and a conductive pattern. The wiring member includes a connection portion, a first portion, a second portion, and a coupling portion. The coupling portion couples the connection portion, the first portion, and the second portion to one another. A connecting protrusion is formed on a connection surface of the connection portion. A first protrusion is formed on a first connection surface of the first portion. A second protrusion is formed on a second connection surface of the first portion. The conductive pattern and the connection surface are joined to each other by a joining material. The first main electrode and the first connection surface are joined to each other by a first joining material. The second main electrode and the second connection surface are joined to each other by a second joining material.

Abstract: An apparatus includes a base having a stage region at a front side thereof, and a plurality of suction holes in the stage region; an elastic member provided in the stage region and having a plurality of through holes, each of which is disposed at a position immediately above a corresponding one suction hole when viewed from a suction direction from the front side to a rear side of the base; and a suction unit configured to apply suction for suctioning a target member to be placed in the stage region through the suction holes in the suction direction, thereby to fix the target member to the stage region by the suction via the elastic member.

Abstract: A testing apparatus, including: a variable resistor coupled to a control electrode of a switching device; a storage circuit storing information indicating a relation between a resistance value of the variable resistor and a voltage change rate at which a voltage between power-source-side and ground-side electrodes of the switching device changes when the switching device is turned off; and a control circuit controlling the variable resistor. The control circuit sets the variable resistor to have a first resistance value and obtains a first value of the voltage change rate, sets the variable resistor to have a second resistance value based on the first value of the voltage change rate and the information, obtains a second value of the voltage change rate when the variable resistor is of the second resistance value, and determines whether the second value of the voltage change rate meets a specification of the switching device.

Abstract: A semiconductor device having an active portion and a gate pad portion on a semiconductor substrate includes: a first semiconductor layer of a first conductivity type; and a second semiconductor layer of a second conductivity type. The active portion has: first semiconductor regions of the first conductivity type; a first electrode provided on the first semiconductor regions; and first trenches. The gate pad portion has: a gate electrode pad provided above the second semiconductor layer; second trenches provided beneath the gate electrode pad; and second semiconductor regions of the second conductivity type, each provided in the first semiconductor layer so as to be in contact with a respective one of bottoms of the second trenches. Each of the second trenches is continuous with a respective one of the first trenches. The second semiconductor layer is continuous from the active portion to the gate pad portion.

Abstract: A semiconductor module includes a lead including a first bonding portion and a coupling portion extending in a Y direction from the first bonding portion. The first bonding portion has a first width end, and a second width end connected to the coupling portion. The lead has first and second length sides opposite to each other in an X direction. The lead has in the X direction first and second widths at first and second positions, and the second position is away from the first position in the Y direction. In the plan view, the lead has a shape in which the first width is greater than the second width such that positions of the first and second length sides at the second position are respectively located inward in the X direction with respect to positions of the first and second length sides at the first position.

Abstract: A semiconductor device, including: a power semiconductor element having a current output electrode; a wire bonded to the current output electrode; and a degradation detection circuit configured to monitor a temporal change of a voltage value of the wire while a constant current flows through the wire, responsive to satisfaction of a plurality of conditions including that the power semiconductor element is in a turn-off state, and that a temperature of the power semiconductor element is within a predetermined temperature range.

Abstract: A switching control circuit for a power supply circuit including first and second inductors, and first and second transistors controlling first and second inductor currents flowing through the first and second inductors, respectively. The switching control circuit includes: a detection circuit detecting a switching period of the first transistor and a time difference between first and second timings, at which the first and second inductor currents respectively reach first and second predetermined values; an error output circuit outputting an error between a predetermined ratio and a ratio of the time difference to the switching period; and a driving signal output circuit configured to output a driving signal to turn on the second transistor, after the second inductor current reaches the second predetermined value, and to turn off the second transistor, in response to a second time period according to the first time period and the error having elapsed.

Abstract: There is provided a semiconductor device, a hydrogen concentration distribution has a hydrogen concentration peak, a helium concentration distribution has a helium concentration peak, and a donor concentration distribution has a first donor concentration peak and a second donor concentration peak; the hydrogen concentration peak and the first donor concentration peak are located at a first depth, and the helium concentration peak and the second donor concentration peak are located at a second depth; each concentration peak has an upward slope; and a value which is obtained by normalizing a gradient of the upward slope of the second donor concentration peak by a gradient of the upward slope of the helium concentration peak is smaller than a value which is obtained by normalizing a gradient of the upward slope of the first donor concentration peak by a gradient of the upward slope of the hydrogen concentration peak.

Abstract: A semiconductor module, including a metal-oxide-semiconductor field effect transistor (MOSFET) made of a SiC semiconductor material, and an insulated gate bipolar transistor (IGBT) that is made of a Si semiconductor material and is connected in parallel with the MOSFET. The MOSFET having a body diode. The IGBT is a reverse conductive-IGBT (RC-IGBT), and includes a free wheeling diode. A forward voltage of the free wheeling diode is so set that a current in the body diode of the MOSFET, which is connected in parallel with the RC-IGBT, is equal to or below a current value that causes lattice defects to grow in the MOSFET.

Abstract: The present invention is directed to provide a semiconductor module capable of achieving miniaturization and reduced manufacturing cost while suppressing surge voltage generated when switching the semiconductor elements. A semiconductor module includes a negative terminal and a positive terminal. The negative terminal has a negative fastening portion for fastening a negative polarity-side external terminal, a negative connection portion connected to a laminated substrate, and a negative intermediate portion arranged between the negative fastening portion and the negative connection portion. The positive terminal has a positive fastening portion for fastening a positive polarity-side external terminal, positive connection portions connected to the laminated substrate, and a positive intermediate portion facing the negative intermediate portion with a predetermined gap and arranged between the positive fastening portion and the positive connection portions.

Abstract: A control circuit for a circuit that has a rectifier circuit including first to fourth diodes, and first to fourth switches respectively connected in parallel with the first to fourth diodes, for rectifying an AC voltage; and a capacitor receiving the rectified AC voltage. The control circuit controls the first to fourth switches, and includes: a determination unit determining an off-period in which, when the AC voltage is applied, the first to fourth diodes turn off, the off-period including a first period and a second period, in which the first and fourth diodes, and the second and third diodes, respectively turn off; and a control unit turning on the first and fourth switches in the first period, when the second and third diodes are off, and turning on the second and third switches in the second period, when the first and fourth diodes are off.

Abstract: A semiconductor module includes a circuit board having a semiconductor element mounted thereon, a lead including a first bonding portion bonded to the semiconductor element via a bonding material and a wiring portion connected to the first bonding portion, and a sealing material that seals the semiconductor element and the lead. The first bonding portion has first and second side surfaces that face each other. The wiring portion has a bent portion connected to the first bonding portion at a side of the first bonding portion at which the first side surface is located. The bent portion is bent at a border between the first bonding portion and the bent portion in a direction away from a lower surface of the first bonding portion. The border is located between the first and second side surfaces of the first bonding portion in a plan view of the lead.