Abstract: A switching control circuit for a power supply circuit that includes a transformer including primary and secondary coils, and first and second transistors controlling a current flowing through the primary coil. The power supply circuit generates an output voltage at a target level. The switching control circuit controls switching of the first and second transistors. The switching control circuit includes: a drive signal output circuit configured to output drive signals according to a normal mode, when the output voltage is lower than a first level, and output the drive signals according to a burst mode, when the output voltage is higher than the first level; and a driver circuit configured to switch the first and second transistors in response to the drive signals. The drive signal output circuit reduces a first time period in the burst mode, in response to the output voltage rising above the first level.

Abstract: A silicon carbide semiconductor device includes an active region, a first-conductivity-type region, and a termination region. The active region has first second-conductivity-type regions and first silicide films in trenches, second second-conductivity-type regions and a second silicide film between the trenches that are adjacent to one another, and a first electrode while the termination region has a third second-conductivity-type region. The active region includes ohmic regions, non-operating regions and Schottky regions, each of which has a stripe shape. Each ohmic region is a region where the first electrode is in contact with either the first silicide film or the second silicide film. Each non-operating region is a region where the first electrode is in contact with either the first or second second-conductivity-type regions. Each Schottky region is a region where the first electrode forms a Schottky barrier junction with the first-conductivity-type region.

Abstract: Provided is a semiconductor device that includes a drift region that is of a first conductivity type and is provided in a semiconductor substrate; a base region that is of a second conductivity type and is provided above the drift region; an accumulation region that is of the first conductivity type provided between the base region and the drift region; and an electric field relaxation region that is provided between the base region and the accumulation region, wherein the boundary between the electric field relaxation region and the accumulation region is a location for a half-value for the peak of the doping concentration of the accumulation region, and an integrated concentration of the electric field relaxation region is greater than or equal to 5E14 cm?2 and less than or equal to 5E15 cm?2.

Abstract: An electrophotographic photoconductor including a sequentially-provided conductive substrate, an undercoat layer, and a photosensitive layer. Photosensitive layer is a negatively-charged stacked type including a charge generation layer and a charge transport layer. Undercoat layer contains a resin binder and a first filler, the first filler including a zinc oxide particle surface-treated with an N-acylated amino acid or an N-acylated amino acid salt, and the charge generation layer containing an adduct compound of titanyl phthalocyanine and butanediol.

Abstract: A semiconductor device includes an insulated circuit board having a semiconductor chip thereon, a W-phase output terminal electrically connected to the chip, a cooling device including a cooling top plate having a top surface on which the insulated circuit board is disposed, and a case including a frame portion on the cooling top plate and having an open storage area in which the insulated circuit board is stored, and a current detection unit for detecting an output current flowing through the output terminal. The output terminal extends from the unit storage portion to an outside the case and passes through the current detection unit. The current detection unit is embedded within the frame portion such that a shortest external dimension thereof is parallel to a first direction that is perpendicular to the top surface in the cooling area of the cooling top plate.

Abstract: A semiconductor device includes: a semiconductor substrate of a first conductivity-type: an insulated gate electrode structure buried in a first trench provided in the semiconductor substrate; a base region of a second conductivity-type provided in the semiconductor substrate so as to be in contact with the first trench; a first main electrode region of the first conductivity-type provided at an upper part of the base region so as to be in contact with the first trench: a polysilicon film of the second conductivity-type having a higher impurity concentration than the base region and buried in a second trench provided in the semiconductor substrate so as to be in contact with the base region; and a second main electrode region provided on a bottom surface side of the semiconductor substrate.

Abstract: An object of the present disclosure is to provide a semiconductor module capable of reducing variation in drive characteristics of each of plural semiconductor switching elements. A semiconductor module includes IGBTs configured to supply power to a load and gate driver circuits in which drive targets are set in a one-to-one relationship to the IGBTs and in which according to a positional relationship to, for example, the IGBT as the drive target, a driving capability of the gate driver circuit to drive the IGBT is set.

Abstract: On a surface of a portion of a front electrode exposed in an opening of a passivation film, a Ni-deposited film having high solder wettability is provided apart from the sidewalls of the opening of the passivation film. Metal wiring is soldered to the Ni-deposited film. The solder layer is formed only on the Ni-deposited film and thus, the solder layer and the passivation film do not contact each other. The front electrode contains Al and an entire area of the surface of the front electrode excluding the portion where the Ni-deposited film is formed is covered by a surface oxide film that is constituted by an aluminum oxide film formed by intentionally oxidizing the surface of the front electrode. The surface oxide film intervenes between the front electrode, the passivation film, and a sealant, whereby the adhesive strength of the passivation film and the sealant is increased.

Abstract: N+-type source regions, low-concentration regions, and p++-type contact regions are each selectively provided in surface regions of a semiconductor substrate, at a front surface thereof, and are in contact with a source electrode. The n+-type source regions and the low-concentration regions are in contact with a gate insulating film at sidewalls of a trench and are adjacent to channel portions of a p-type base region, in a depth direction. The p++-type contact regions are disposed apart from the trench. In surface regions of an epitaxial layer constituting the p-type base region, portions left free of the n+-type source regions and the p++-type contact regions configure the low-concentration regions of an n?-type or a p?-type. The low-concentration regions are disposed periodically along the trench, between the trench and the p++-type contact regions. By the described structure, short-circuit withstand capability may be increased without increasing the number of processes.

Abstract: An integrated circuit includes: an amplifier circuit outputting a first voltage and a second voltage respectively in a first case and a second case, in which two input voltages of opposite polarities are applied to a pair of input terminals of a bridge circuit, the first and second voltages being based on a reference voltage and first and second amplified voltages, obtained by amplifying, by a predetermined gain, first and second output voltages outputted from a pair of output terminals of the bridge circuit; and a reference voltage output circuit setting the reference voltage to a first level and a second level respectively in the first and second cases. The first and second levels respectively correspond to a sum of, and a difference between, a predetermined voltage and another amplified voltage obtained by amplifying, by the predetermined gain, an offset voltage generated at the output terminals of the bridge circuit.

Abstract: Provided is a semiconductor device, comprising: a semiconductor substrate having an upper surface, a lower surface, and a center position equidistant from the upper surface and the lower surface in a depth direction of the semiconductor substrate. An N-type region with an N-type conductivity is provided in the semiconductor substrate such that the N-type region includes the center position of the semiconductor substrate. The N-type region includes an acceptor with a concentration that is a lower concentration than a carrier concentration, and is 0.001 times or more of a carrier concentration at the center position of the semiconductor substrate.

Abstract: A semiconductor device includes a semiconductor module having a wiring board, semiconductor assemblies that include a multilayer substrate on which semiconductor elements are mounted, and a sealing part; a cooler; and a heat conduction sheet which is placed between the semiconductor module and the mounting surface of the cooler and which is in contact with the bottom surfaces of the multilayer substrates. The heat conduction sheet has recesses corresponding to at least parts of the outer edges of second electrically conductive plates provided on the bottoms of the multilayer substrates.

Abstract: A power conversion device includes a controller configured to alternately turn on a second upper arm and a second lower arm of a first bridge circuit such that on-times thereof do not overlap each other to increase power stored in a resonance capacitor of the first bridge circuit in a state in which a first leg of the first bridge circuit is turned off when transmitting power from a second bridge circuit to the first bridge circuit and performing step-up operation.

Abstract: A detection circuit including a temperature voltage generator circuit and an output circuit. The temperature voltage generator circuit generates a detection voltage corresponding to a temperature of the detection circuit based on a predetermined constant current, when a pulse signal received by the detection circuit is at a first level, and stop generating the detection voltage when the pulse signal is at a second level. The output circuit outputs a detection signal indicating whether the temperature is higher than a predetermined temperature based on the detection voltage, during a period of time between a first time that is a predetermined time period after the pulse signal reaches the first level and a second time at which the pulse signal switches from the first level to the second level, the pulse signal remaining in the first level in the period of time.

Abstract: Provided is an assembly jig set of semiconductor module having a plurality of semiconductor chips, the assembly jig set comprising: a first outer frame jig; and a plurality of inner piece jigs positioned by the first outer frame jig and each having a sectioned shape corresponding to the first outer frame jig, wherein one of the inner piece jigs has a plurality of opening portions for positioning the semiconductor chips. A manufacturing method of a semiconductor module using an assembly jig set is provided.

Abstract: A power semiconductor module includes a half-bridge circuit having a first power semiconductor element and a second power semiconductor element that are connected in series with each other. The power semiconductor module also includes first to third external terminals, a first wiring member that connects a high-potential-side main electrode of the first power semiconductor element to the first external terminal, a second wiring member that connects a low-potential-side main electrode of the second power semiconductor element to the second external terminal, a third wiring member that connects an output of the half-bridge circuit to a third external terminal, and at least one of a first corrosion sensor disposed in an installation environment of the first wiring member, a second corrosion sensor disposed in an installation environment of the second wiring member, or a third corrosion sensor disposed in an installation environment of the third wiring member.

Abstract: A method of manufacturing a silicon carbide semiconductor device, including forming a first-conductivity-type region in a SiC semiconductor substrate, selectively forming a plurality of second-conductivity-type regions in the first-conductivity-type region, forming an interlayer insulating film covering the first-conductivity-type region and the second-conductivity-type regions, selectively removing the interlayer insulating film to form a plurality of openings exposing the second-conductivity-type regions, forming, in each opening, a layered metal film having a cap film stacked on an aluminum film, thermally diffusing aluminum atoms in the aluminum film to thereby form a plurality of second-conductivity-type high-concentration regions, removing the layered metal film, selectively removing the interlayer insulating film to form a contact hole, forming a first electrode by sequentially stacking a titanium film and a metal film containing aluminum on the first surface of the semiconductor substrate in the conta

Abstract: A semiconductor device includes a conductive board, a contact component having a cylindrical through hole and including a main body portion with first and second open ends, and an external connection terminal inserted in the through hole of the contact component, having four outer surfaces extending in an insertion direction to form a quadrangular prism shape, and having four corner portions along an insertion direction pressed by an inner circumferential surface of the through hole of the contact component. The external connection terminal has protrusions, each of which is disposed on a respective one of at least one pair of opposite outer surfaces among the four outer surfaces, and being pressed by the inner circumferential surface of the through hole.

Abstract: A solder material having a good thermal-cycle fatigue property and wettability. The solder material contains not less than 6.0% by mass and not more than 8.0% by mass Sb, not less than 3.0% by mass and not more than 5.0% by mass Ag, and the balance of Sn and incidental impurities. Also, a semiconductor device may include a joining layer between a semiconductor element and a substrate electrode or a lead frame, the joining layer being obtained by melting this solder material.

Abstract: A bonding tool for bonding two conductive plates in contact with each other by pressing the bonding tool against the two conductive plates while vibrating a bonding end portion thereof in a direction parallel to the conductive plates. The bonding end portion of the bonding tool includes a bonding base having an end surface, the end surface having a protrusion area that has two sides facing and parallel to each other in a first direction that is parallel to the end surface, a plurality of protrusions provided in the protrusion area of the end surface, and a suppression portion provided on the end surface along the two sides of the protrusion area. The bonding end portion is configured to vibrate in the first direction.