Abstract: The semiconductor memory device comprising: an n-channel memory cell transistor including: a first diffused region and a second diffused region formed in a semiconductor substrate; a charge storage layer formed over the semiconductor substrate between the first diffused region and the second diffused region; and a gate electrode formed over the charge storage layer; a power supply circuit formed on the semiconductor substrate, the power supply circuit being connectable to the first diffused region, pumping a voltage supplied from an outside power supply and outputting the pumped voltage; and writing means which, upon writing to the n-channel memory cell transistor, applies a reference voltage to the second diffused region, and applies a negative voltage with respective to the reference voltage supplied from the power supply circuit to the first diffused region to thereby flow current between the first diffused region and the second diffused region and to store charges in the charge storage layer.

Abstract: To provide a signal processing circuit which makes it possible to accurately estimate not only amplitude error but also phase error of a signal caused by device characteristics of components of a receiver, correct swiftly the error component without providing feedback control, and eliminate signal deterioration. This signal processing circuit is arranged to have a cross-correlation value calculating unit for calculating a cross-correlation value of a pair of signals having undergone a quadrature detection and a phase error calculating unit for calculating a phase displacement of one of the pair of signals with respect to the other of the same as a phase error based on the cross-correlation value calculated by the cross-correlation value calculating unit.

Abstract: There is disclosed a transmission device performing NUT setting and its establishment efficiently and precisely. A setting information relay unit relays setting information that places a specific channel out of a channel used for restoration. A channel establishment unit determines, by referring to the setting information, whether a channel of interest should be placed out of a channel for restoration and establish the channel. A route switch control unit recognizes a section in which the channel that is not used for restoration has been established and a fault bypass control condition at the time of occurrence of a fault and performs a route switching control based on a result of recognition.

Abstract: An amplification circuit connected with a lowpass filter, which reduces the time required for compensating the amplification characteristic and starting up at turning on the power supply, and a control method thereof are provided. An amplification circuit 10, which operates in any one of the operation mode of ordinary operation mode MDN and special operation mode MDT, includes an amplifying section 20, a lowpass filter 30 connected to the amplifying section 20, and a lowpass filter setting section 40 that sets a cut-off frequency fc. In the case of an ordinary operation mode MDN, the cut-off frequency is set to an ordinary cut-off frequency fcn in which error in the output signal does not exceed an output allowable error as an allowable error, and in the case other than that, set to the side higher than the ordinary cut-off frequency fcn.

Abstract: The invention relates to a frequency synthesizer. An object of the invention is to provide a frequency synthesizer whose high stable performance is realized at an inexpensive cost. The frequency synthesizer includes a frequency synthesizing section generating an output signal by performing indirect frequency synthesis at a period which is equal to a product of a period of the reference signal and a first integer, and a clock generating section generating the clock signal by performing frequency synthesis for the output signal and for maintaining a frequency of the clock signal at a value which is equal to a difference between or a sum of a first frequency which is equal to a product of the frequency of the reference signal and a second integer and a second frequency indicating a number of times the phase difference is compressed.

Abstract: A controlling unit of an image inputting apparatus increments a counter each time an instruction to start an image input is externally provided. An image compressing unit waits for the completion of the storage of an entire image in a buffer memory, and issues an instruction to detect the state of the image to an image state detecting unit. The image state detecting unit detects the rotation direction and the presence/absence of mirror-reversing of the image stored in the buffer memory, and notifies the detection result to an image compressing unit. The image compressing unit switches a scanning order of pixels to be read from the buffer memory based on the notification, compresses the image data while reading the image data in the switched scanning order, and stores the compressed image data in a data storing unit.

Abstract: Corresponding to each notification system of position information different for each carrier and terminal, the position information about a user of an information terminal can be obtained, and a service can be provided according to position information without a service provider managing user position information. An information terminal user position information acquisition apparatus includes a terminal determination unit for determining the type of an information terminal depending on data transmitted from an information terminal of a user, and a position information extraction means for extracting the position information about the user from the data transmitted from the information terminal.

Abstract: A reflector has a curved part covering the light source and a pair of end parts extending at the two sides of the curved part. The inside surface of each end part has a plurality of substantially parallel projections or depressions. The light-guiding plate has an incident surface and an emission surface substantially perpendicular to the incident surface, the incident surface having a plurality of projections or depressions extending substantially parallel to the emission surface. Also, the reflection surface of the light-guiding plate has projections.

Abstract: The interposer comprises a base 8 formed of a plurality of resin layers 68, 20, 32, 48; thin-film capacitors 18a, 18b buried between a first resin layer 68 of said plurality of resin layers and a second resin layer 20 of said plurality of resin layers, which include first capacitor electrodes 12a, 12b, second capacitor electrodes 16 opposed to the first capacitor electrode 12a, 12b and the second capacitor electrode 16, and a capacitor dielectric film 14 of a relative dielectric constant of 200 or above formed between the first capacitor electrode 12a, 12b and the second capacitor electrode 16; a first through-electrode 77a formed through the base 8 and electrically connected to the first capacitor electrode 12a, 12b; and a second through-electrode 77b formed through the base 8 and electrically connected to the second capacitor electrode 16.

Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.

Abstract: A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.

Abstract: A timing recovery method samples, equalizes and detects a signal reproduced from a recording medium and to output a detection signal, controls sampling positions based on a phase error between the equalized signal and the detection signal, and obtains likelihood information which is related to a bit having a probability of error which exceeds a predetermined value, based on the equalized signal. The control of the sampling positions is suppressed during a time which is based on the likelihood information.

Abstract: The structure of mounting an electronic component on a circuit board is capable of securely flip-chip-bonding the electronic component having bumps, whose separations are very short, to the circuit board without displacement. The structure of mounting an electronic component on a circuit board is characterized in that bumps of the electronic component are respectively flip-chip-bonded to electrodes of the circuit board by applying ultrasonic vibrations to the electronic component, and that a center of each of the bumps is previously relatively displaced, with respect to a center of each of the electrodes in a width direction, in a direction parallel to a direction of the ultrasonic vibrations.

Abstract: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

Abstract: Method for making delivery of products more efficient, and having deliveries made that are convenient for delivery recipients. When a user (delivery recipient 3) purchases a product from a vendor and applies for delivery, a management server 4 accepts a delivery application from a vendor client 1. The management server 4 notifies the delivery recipient client 3 of the application for delivery, and prompts the user to designate delivery terms. For example, a delivery terms designation form is provided on a web page, and the URL for that web page is provided in the application for delivery notification. The delivery recipient client 3 accesses the web page and refers to a list of products to be delivered to him or herself. Moreover, the delivery recipient designates delivery terms when he or she is certain of his or her schedule. A delivery business is notified of these delivery terms.

Abstract: A reservation system for an article or a service includes an input module obtaining a weather forecast, a module setting a price of the article or a charge for the service in accordance with the weather forecast obtained, an accept module accepting a reservation for purchasing the article at the set price or a reservation for utilizing the service at the set charge, and a module issuing a reservation number for uniquely identifying the reservation accepted, and identifying a reserver making the reservation from the reservation number when purchasing the article or when utilizing the service.

Abstract: A semiconductor device fabrication method that improves the efficiency of semiconductor device production. A plurality of wafer substrates are set and a process for fabricating semiconductor devices each having a ferroelectric capacitor is begun. After ferroelectric layers are formed over the plurality of wafer substrates, the ferroelectric layers formed are damaged. The plurality of wafer substrates are then rearranged and treatment is performed. In each step in which the ferroelectric layers formed may be damaged, the plurality of wafer substrates are rearranged and treatment is performed. As a result, retention characteristic variations among wafer substrates in the same lot are reduced and the productivity of semiconductor devices is improved.

Abstract: A method for inspecting a magnetic read/write head in which a magnetic recording part and a magnetic reproducing part are close to each other includes the steps of performing a magnetic recording operation with a load greater than a normal magnetic recording operation for the magnetic recording part, and inspecting the magnetic reproducing part after the magnetic recording operation with the load.