Patents Assigned to Fujitsu Ltd.
  • Patent number: 7904848
    Abstract: A system for mapping tasks of at least one application on processing units of a reconfigurable array, the system comprising a plurality of programmable processing units, each programmable processing unit having at least one connection node, the programmable processing units disposed on a layer permitting interconnection between connection nodes; and a mapping unit adapted to substantially simultaneously optimize placement of the tasks on the plurality of programmable processing units and routing of interconnections between the plurality of processing units, the mapping unit adapted to select one placement algorithm among a plurality of predetermined placement algorithms and to select one routing algorithm from a plurality of predetermined placement algorithms, the selection configured to prefer use of non-random algorithms.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: March 8, 2011
    Assignees: IMEC, Fujitsu Ltd.
    Inventors: Paul Coene, Hisanori Fujisawa
  • Patent number: 7538987
    Abstract: A CPP spin-valve element formed on a substrate including a free layer structure including at least one ferromagnetic layer and a pinned layer structure including at least one ferromagnetic layer. The free layer is magnetically softer than the pinned layer. A thin non-magnetic spacer layer structure configured to separate the free layer and the pinned layer is provided in order to prevent a magnetic coupling between the free and pinned layer structures, and to allow an electric current to go there through. At least two current-confining (CC) layer structures including at least two parts having significantly different current conductivities are incorporated therein.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: May 26, 2009
    Assignees: University of Alabama, Fujitsu, Ltd.
    Inventors: Hideo Fujiwara, Keiichi Nagasaka, Tong Zhao, William H. Butler, Julian Velev, Amrit Bandyopadhyay
  • Patent number: 7496781
    Abstract: A semiconductor integrated circuit device has a command decoder for issuing a control command in accordance with a supplied control signal, a DRAM core, and a timing adjusting circuit for supplying the control command, set active for a predetermined period, as a DRAM control signal to the DRAM core. The timing adjusting circuit generates n different clocks that are respectively shifted in phase with respect to a supplied reference clock, and generates the DRAM control signal by setting the control command active in a prescribed operation cycle for only a period starting at a first predetermined clock pulse of a first clock of the n clocks and ending at a second predetermined clock pulse of a second clock of the n clocks. In this way, timing design with relatively high accuracy of adjustment can be done in a short period.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: February 24, 2009
    Assignee: Fujitsu, Ltd.
    Inventors: Hirotaka Tamura, Hisakatsu Yamaguchi, Shigetoshi Wakayama, Kohtaroh Gotoh, Junji Ogawa
  • Patent number: 7472282
    Abstract: ID information and organic information based on authentication demand which a service providing system received from a user terminal are inputted and stored into a use information storing unit. The ID information and organic information stored in an organic information input storing unit and an ID information input storing unit and the ID information and organic information which were inputted in the past in the use information storing unit are compared and collated by a comparing unit and a collating unit. A control unit discriminates an authentication demand by an illegal access person on the basis of results of the comparison and collation, notifies the service providing system of a discrimination result, and logs identity information of the illegal access person.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: December 30, 2008
    Assignee: Fujitsu, Ltd.
    Inventors: Yusaku Fujii, Takashi Shinzaki
  • Patent number: 7209621
    Abstract: Optical apparatuses providing optical interconnections among a plurality N of electronic components. One exemplary apparatus comprises a slab waveguide having a core layer that enables light beams to propagate in a plurality of directions, a plurality of N reception ports, and a plurality of N transmission ports, each reception port and each transmission port serving a respective electronic component, and each being optically coupled to the core layer of the slab waveguide. Each transmission port is configured to receive a plurality of light beams from its assigned electronic component and to transmit each received light beam onto the slab waveguide in a direction toward a reception port. Each reception port is configured to receive from the slab waveguide a plurality of light beams transmitted to it from at least two different transmission ports. Light beams within the slab waveguide are permitted to cross paths. Other exemplary embodiments are disclosed.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: April 24, 2007
    Assignee: Fujitsu Ltd.
    Inventors: Alexei Glebov, Michael G. Lee, Kishio Yokouchi
  • Patent number: 7206472
    Abstract: Optical backplanes providing integrated optical couplers to external optical fibers are disclosed, along with methods for making the same. An exemplary optical backplane has a first cladding layer disposed over the top surface of a substrate, and at least a first core body disposed over the first cladding layer, with the first core body having a first end and a second end. A material layer is disposed above the first cladding layer and the first end of the first core body, with the material layer having a top surface and a bottom surface. A focusing element is formed at the top surface of the material layer, with the focusing element being located above the first end of the first core body.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: April 17, 2007
    Assignee: Fujitsu Ltd.
    Inventors: Lidu Huang, Kishio Yokouchi
  • Publication number: 20060053302
    Abstract: An information processing apparatus includes a TPM, a key management module for managing a key database, a memory, and a file processing module for encrypting and decrypting a file. The TPM stores a first TPM key therein and encrypts a third TPM key. The key management module stores and manages the third TPM key in the database. When the information processing apparatus starts communicating with the tamper-proof device, the key management module receives, from the TPM, a parameter for generating a second TPM key, provides the received parameter to the tamper-proof device, receives from the tamper-proof device the second TPM key which has been encrypted using the first TPM key, and provides the TPM with the second TPM key and with the third TPM key which has been encrypted using the second TPM key.
    Type: Application
    Filed: December 28, 2004
    Publication date: March 9, 2006
    Applicant: Fujitsu Ltd.
    Inventors: Kouichi Yasaki, Seiki Shibata, Isamu Yamada
  • Publication number: 20060009133
    Abstract: A method for making a light-emitting display device having a substrate with light-emitting layers on a surface of the substrate and constituting pixels, light emission from the pixels being electrically controlled, and having barriers delimiting at least one side of each respective pixel. A mask pattern is formed on a surface of the substrate, corresponding to the pattern of the barriers to be formed, and the surface is sprayed with sandblasting particles to form grooves having a depth corresponding to a height of the barriers and irregularities producing light scattering on the side walls and bottoms of the grooves, a difference between a maximum height and a minimum height of the irregularities being at least 0.4 mm.
    Type: Application
    Filed: September 16, 2005
    Publication date: January 12, 2006
    Applicant: FUJITSU LTD
    Inventors: Yasunobu Hashimoto, Yoshiho Seo, Naoki Itokawa, Motonari Kifune, Yasushi Ohkawa
  • Publication number: 20050196703
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 8, 2005
    Applicant: FUJITSU LTD.
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Publication number: 20050196529
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 8, 2005
    Applicant: FUJITSU LTD.
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Publication number: 20050196704
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 8, 2005
    Applicant: FUJITSU LTD.
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Patent number: 6814546
    Abstract: A multifan-equipped apparatus in which a plurality of objects mounted are controllably cooled by blowing air using a fan-unit assembly composed of a plurality of fan units. The plural fan units are divided into a plurality of groups; the fan units in the same group are arranged in a queue. And one of the fan units of each group is a master fan unit that is autonomically adjustable in revolutions per minute (rpm) in accordance with a current apparatus-environment temperature and serves to make a tuning control on the rpm of at least one of the remaining fan units in the same group so as to adjust the rpm to a first estimated value corresponding to the autonomic-adjusted rpm of the master fan unit.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: November 9, 2004
    Assignee: Fujitsu Ltd.
    Inventor: Takashi Sekiguchi
  • Patent number: 6800348
    Abstract: A magneto-optical disk having recording tracks are formed along concentric grooves or a spiral groove. A non-groove region where no grooves are made is provided in a middle part of each recording track. In the non-groove region, there is formed a pit pattern representing information about the recording track. A track-counting U-groove is formed in the non-groove region, for detecting that the light spot of a reading laser beam has moved across the recording track. With the disk thus structured, it is possible to record information at high density and to access a desired recording track at high speed.
    Type: Grant
    Filed: May 12, 2000
    Date of Patent: October 5, 2004
    Assignees: Sony Corporation, Fujitsu, Ltd.
    Inventors: Hiroyuki Takemoto, Atsushi Takeuchi, Yoshihito Fukushima, Kenichi Itoh, Mineo Moribe, Takehiko Numata
  • Patent number: 6738584
    Abstract: The present invention relates to a method for optical fiber communication, and a terminal device and system for use in carrying out the method, and an object of the present invention is to compensate for chromatic dispersion and nonlinearity. A device for outputting an optical signal having a variable optical power into an optical fiber transmission line is provided. The optical signal transmitted by the transmission line is converted into an electrical signal by an optical receiver. A parameter related to waveform degradation of the electrical signal is detected by a monitor unit. A control unit controls the optical power of the optical signal to be output from the device so that the waveform degradation is improved.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: May 18, 2004
    Assignee: Fujitsu Ltd.
    Inventors: Takashi Tsuda, Kazuo Yamane, Yumiko Kawasaki, Satoru Okano
  • Patent number: 6715008
    Abstract: In a multi-processor computer system, a message receive unit using a shared buffer pool and a set of per-node credit registers in each processor node. The buffer stores incoming messages received from the sending nodes. The credit registers prevent a sending node from using more than its allocated share of the buffer pool and thus prevent the buffer pool from overflowing. Because the buffer pool of the receiving node does not overflow, the receiving node can continue to communicate with other nodes.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: March 30, 2004
    Assignee: Fujitsu Ltd.
    Inventor: Takeshi Shimizu
  • Publication number: 20040041595
    Abstract: It is intended to provide a semiconductor integrated circuit device and adjustment method of the same semiconductor integrated circuit device, capable of adjusting an analog signal outputted from an incorporated analog signal generating section without outputting it outside as an analog value. An analog signal AOUT is outputted from an analog signal generating section 3 in which an adjustment signal AD is inputted. The analog signal AOUT is inputted to a judgment section 1, in which it is compared and judged with a predetermined value and then a judgment signal JG is outputted. The judgment signal JG acts on a predetermined signal storing section 4 as an internal signal and the adjustment signal AD is fetched into the predetermined signal storing section 4. Further, the judgment signal JG is outputted as digital signal through an external terminal T2 and an external tester device acquires the adjustment signal and stores the acquired adjustment signal in the predetermined signal storing section 4.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 4, 2004
    Applicant: FUJITSU, LTD.
    Inventors: Yasushige Ogawa, Yoshiyuki Ishida, Masato Matsumiya
  • Publication number: 20040017493
    Abstract: A resolution conversion method and a pixel data processing circuit for a single-plate type color image sensor has been disclosed, in which resolution conversion processing and simultaneous processing can be performed with a simple configuration, an image of high sharpness can be obtained without degradation of resolution, and the pixel positions of respective colors coincide with each other. Resolution conversion processing that converts color data of each pixel output from a single-plate-type color-image sensor into data of a predetermined resolution and simultaneous processing that processes the color data so that the pixel positions of respective colors coincide with each other are performed simultaneously in the same circuit.
    Type: Application
    Filed: July 7, 2003
    Publication date: January 29, 2004
    Applicant: FUJITSU, LTD.
    Inventors: Hiroshi Daiku, Shigeru Nishio, Asao Kokubo
  • Patent number: 6684004
    Abstract: An optical demultiplexer to reduce the number of expensive dispersion compensators when compensating secondary dispersion during demultiplexing. By providing optical circulators, dispersion compensators, and optical filters that reflect specified wavelengths and transmit wavelengths other than the specified wavelengths from among the outputs of the dispersion compensators, and causing specified wavelengths to make round trips of the dispersion compensators, the dispersion volume of the dispersion compensators is reduced.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: January 27, 2004
    Assignee: Fujitsu Ltd.
    Inventor: Takaharu Tomita
  • Patent number: 6671788
    Abstract: A semiconductor memory device has a mask signal receiving circuit which receives a data mask signal, fed from an external unit, out of synchronism and produces an asynchronous internal mask signal. The semiconductor memory device includes a function for interrupting a reading of data during a burst output in response to the data mask signal. The reading of data during the burst output is interrupted by using the internal mask signal. Therefore, the operation time can be shortened when the burst reading is interrupted by a write processing, and thereby the efficiency for using the data bus can be enhanced and the operation can be executed at higher speeds.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: December 30, 2003
    Assignee: Fujitsu Ltd.
    Inventor: Naoharu Shinozaki
  • Publication number: 20030193730
    Abstract: A storage medium stores information on a plurality of tracks formed thereon, each of the tracks being divided into a plurality of sectors. The storage medium includes a physically formed sector beginning identifier provided at a leading portion of each sector, and an information storing portion. The information storing portion, another sector address portion at the trailing end of the information storing portion, includes at least one sector address portion at a leading end of the information storing portion, another sector address portion at the trailing end of the information storing portion, and a data portion provided between the two sector address portions.
    Type: Application
    Filed: May 13, 2003
    Publication date: October 16, 2003
    Applicant: Fujitsu Ltd.
    Inventor: Yoshiyuki Nanba