Patents Assigned to Fujitsu Ltd.
  • Patent number: 6625694
    Abstract: An algorithm for selecting a directory entry in a multiprocessor-node system. In response to a memory request from a processor in a processor node, the algorithm finds an available entry to store information about the requested memory line. If at least one entry is available, then the algorithm uses one of the available entries. Otherwise, the algorithm searches for a “shared” entry. If at least one shared entry is available, then the algorithm uses one of the shared entries. Otherwise, the algorithm searches for a “dirty” entry. If at least one dirty entry is available, then the algorithm uses one of the dirty entries. In selecting a directory entry, the algorithm uses a “least-recently-used” (LRU) algorithm because an entry that was not recently used is more likely to be stale. Further, to improve system performance, the algorithm preferably uses a shared entry before using a dirty entry.
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: September 23, 2003
    Assignee: Fujitsu Ltd.
    Inventors: Nabil N. Masri, Wolf-Dietrich Weber
  • Publication number: 20030146496
    Abstract: A method of manufacturing a semiconductor device including the steps of: (a) forming an interlayer insulating film over a semiconductor substrate; (b) forming a first mask on the interlayer insulating film, the first mask having a plurality of stripe patterns parallel to a first direction, and etching the interlayer insulating film from a surface thereof to a first intermediate depth to form a groove; and (c) forming a second mask on the interlayer insulating film, the second mask having a plurality of stripe patterns parallel to a second direction crossing the first direction, and etching the interlayer insulating film by a remaining thickness thereof in an area corresponding to the groove and not covered with the second mask to form an opening, and in an area other than the area corresponding to the groove to form a second groove reaching a second intermediate depth from a surface of the interlayer insulating film.
    Type: Application
    Filed: March 3, 2003
    Publication date: August 7, 2003
    Applicant: FUJITSU, LTD.
    Inventor: Shunji Nakamura
  • Patent number: 6579769
    Abstract: In a method of manufacturing a semiconductor device, there are comprised the steps of forming an oxidation preventing layer on a surface of a semiconductor substrate, forming a first window in the oxidation preventing layer, placing the semiconductor substrate in a first atmosphere in which an oxygen gas and a first amount of a chlorine gas are supplied through and then heating the semiconductor substrate at a first temperature such that a first selective oxide film is to grown by thermally oxidizing the surface of the semiconductor substrate exposed from the first window, forming a second window by patterning the oxidation preventing layer, and placing the semiconductor substrate in a second atmosphere in which the oxygen gas and a second amount, which is larger than the first amount, of the chlorine gas are supplied through and then heating the semiconductor substrate at a second temperature such that a second selective oxide film is formed and that a thickness of the first selective oxide film formed below
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: June 17, 2003
    Assignees: Fujitsu Ltd., Advanced Micro Devices, Inc., Fujitsu AMD Semiconductor Ltd.
    Inventors: Hiroyuki Shimada, Masaaki Higashitani, Hideo Kurihara, Hideki Komori, Satoshi Takahashi
  • Patent number: 6577395
    Abstract: A method, apparatus and computer-readable medium allows users to measure a lighting condition of an object. In one embodiment, at least one user visually compares colored materials against a displayed color sample. Users may adjust the color of the displayed color sample by changing corresponding attribute values until the displayed color sample appears to substantially match the colored material. Once users indicate that they have established a color match between a displayed color sample and a colored material, the spectral irradiance value of the substantially matched color sample is calculated. The spectral irradiance value represents a measurement of the lighting condition in a particular room.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: June 10, 2003
    Assignees: Rochester Institute of Technology, Fujitsu LTD
    Inventors: Roy S. Berns, Masayoshi Shimizu
  • Publication number: 20030067975
    Abstract: A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.
    Type: Application
    Filed: November 6, 2002
    Publication date: April 10, 2003
    Applicant: Fujitsu, Ltd.
    Inventors: Kenichi Yamakura, Hideaki Tanishima, Fumiaki Uematsu, Koji Horibe, Manabu Nakano
  • Publication number: 20030058930
    Abstract: A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.
    Type: Application
    Filed: November 6, 2002
    Publication date: March 27, 2003
    Applicant: Fujitsu, Ltd.
    Inventors: Masaru Sawada, Tsunehiko Moriuchi
  • Publication number: 20030029553
    Abstract: A method for transferring a three-dimensional structure onto a substrate, which includes filling a plurality of concaves arranged on a sheet-form mold with a paste-like structural material, temporarily fixing the mold to a support member, contact-bonding the structural material in a state in which the structural material has the adhesion property or bonding property to the substrate together with the mold, releasing the temporary fixation of the mold by the support member after the contact-bonding, and removing the mold from the substrate, thereby transferring a three-dimensional structure onto the substrate.
    Type: Application
    Filed: October 7, 2002
    Publication date: February 13, 2003
    Applicant: Fujitsu, Ltd.
    Inventors: Osamu Toyoda, Akira Tokai, Motonari Kifune, Keiichi Betsui
  • Patent number: 6493196
    Abstract: A spin-valve magnetoresistive sensor includes a free layer of a ferromagnetic material, a pinned layer provided on the free layer and a pinning layer of an anti-ferromagnetic material provided on the pinned layer, the anti-ferromagnetic material being an ordered alloy containing manganese. The pinned layer includes a first pinned layer of a ferromagnetic material, a second pinned layer of a ferromagnetic material provided on the first pinned layer and an intermediate layer interposed between the first and second pinned layers such that the first and second pinned layers establish a super-exchange interaction in an anti-parallel manner. The second pinned layer has a magnetic moment smaller than a magnetic moment of the first pinned layer.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: December 10, 2002
    Assignee: Fujitsu Ltd.
    Inventors: Kenji Noma, Hitoshi Kanai, Junichi Kane, Kenichi Aoshima
  • Patent number: 6490213
    Abstract: A switch system and method transfer a data packet from a source data port to one or more destination data ports through a switch. The system includes at least one crosspoint circuit. A crosspoint circuit in the switch system includes a first and a second reduced voltage swing line, a first and a second transistor circuit for each data input path and a sense amplifier for a data port. The first reduced voltage swing line is coupled to the first transistor circuit, the second reduced voltage swing line is coupled to the second transistor circuit and both reduced voltage swing lines are connected to the sense amplifier.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: December 3, 2002
    Assignee: Fujitsu, Ltd.
    Inventors: Albert Mu, Jeffrey D. Larson
  • Patent number: 6448593
    Abstract: The present invention provides a method and apparatus for providing a polysilicon type-1 ESD transistor in a flash memory chip. The method and apparatus include providing a select gate transistor that includes a gate, a floating gate, a medium doped junction, and a source and drain. The method and apparatus further include forming the source and drain by performing a lightly doped drain (LDD) mask and etch, performing a LDD spacer deposition and LDD spacer etch, and performing a N+ implant mask and a N+ implant.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: September 10, 2002
    Assignees: Advanced Micro Devices, Inc., Fujitsu Ltd.
    Inventors: Masaaki Higashitani, Hao Fang
  • Patent number: 6407585
    Abstract: A new self clocking family of dynamic logic gates which replace footless or subsequent stage dynamic logic gates in multi-stage domino logic circuits. In a preferred embodiment, a multi-stage logic circuit is designed having a first stage which utilizes a traditional dynamic logic gate and a second stage which includes a new self-clocking dynamic logic gate. The output from the first stage is coupled to the input of the second stage such that the second stage is not dependent upon any type of clock signal for precharging. Instead, the second stage includes a dual transistor arrangement on the inter-stage inputs (i.e. the outputs from one stage which are input to subsequent stages) in order to precharge the output node at the second stage such that no type of clock signal is needed during precharge. Accordingly, the output from the second stage is efficiently precharged without using a delayed clock signal or any customized delay circuitry while minimizing through current by design.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: June 18, 2002
    Assignee: Fujitsu Ltd.
    Inventor: James Vinh
  • Patent number: 6363791
    Abstract: A capacitance pressure sensor that prevents leakage from outside the sensor to the reference pressure cavity, has a structure that can decrease defects due to leakage compared to conventional technology. An electrode comprising a thin metallic layer is formed on the upper surface of a glass substrate that forms one of the substrates of a pressure sensor and an external electrode is formed on the surface edge of the substrate. In addition, in the region where the silicon substrate is bonded, a feedthrough extending from the electrode to the external electrode is formed, and spine shaped layers with three braches for blocking leakage gas are formed perpendicularly to the feedthrough.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: April 2, 2002
    Assignee: Fujitsu Ltd.
    Inventors: Akihito Kurosaka, Osamu Nakao, Takanao Suzuki, Masahiro Sato, Hitoshi Nishimura
  • Patent number: 6334802
    Abstract: An electrode for a display device, including a laminate of an underlying layer, a conductive layer and a protective layer formed on a substrate in this order from the substrate side in such a manner that at least the conductive layer is completely covered by the protective layer, the underlying layer and the protective layer being composed of a metal which is hard to form an alloy or intermetallic compound with the metal constituting the conductive layer and has a low solid solubility to the conductive layer.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: January 1, 2002
    Assignee: Fujitsu Ltd.
    Inventors: Shin'ya Fukuta, Hiroyasu Kawano, Hideki Harada
  • Patent number: 6328435
    Abstract: An ink jet head including a piezoelectric element having a displacing portion, a pressure chamber plate bonded to the piezoelectric element for defining a common ink chamber and a plurality of pressure chambers in cooperation with the piezoelectric element, and a nozzle plate bonded to the piezoelectric element and the pressure chamber plate and having a plurality of nozzles respectively communicating with the plurality of pressure chambers. Each pressure chamber is connected to the common ink chamber through a plurality of ink supply channels each having a substantially square cross-section.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: December 11, 2001
    Assignee: Fujitsu, Ltd.
    Inventors: Masahiro Ono, Masayuki Sasaki, Akihiko Miyaki, Akira Iwaishi, Takumi Kawamura
  • Patent number: 6327451
    Abstract: It is an exemplified object of the present invention to provide a development device and process, and an electrophotographic image-forming device that can more stably supply toner to and collect the toner from a development roller, and charge the toner, and thus can obtain a higher-printing-quality image than was previously possible. To achieve this object, the toner supply and collection are carried out by electric force (potential difference) while preventing the toner from deteriorating by providing a gap between a reset roller and the development roller, whereby a high-quality image-forming is possible even when printing is performed for a long time. Excellency in uniformity of charge in the toner makes it possible to stabilize capability of supplying the toner and to improve image quality.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: December 4, 2001
    Assignee: Fujitsu, Ltd.
    Inventor: Tsuneo Mizuno
  • Patent number: 6322067
    Abstract: A sheet cassette for an image forming apparatus supports a pivotally mounted sheet loading plate while giving a degree of freedom to the cassette tray by allowing a free end of the sheet loading tray to vertically move. Sheet guides for regulating the lateral position of sheets on the sheet loading tray are supported by the cassette tray and are aligned with apertures provided in the sheet loading plate, so that some play exists between the sheet guides and the cassette tray.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: November 27, 2001
    Assignee: Fujitsu, Ltd.
    Inventors: Michihiro Fujii, Wataru Miki
  • Publication number: 20010041391
    Abstract: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.
    Type: Application
    Filed: March 21, 2001
    Publication date: November 15, 2001
    Applicant: FUJITSU, LTD.
    Inventors: Akito Hara, Kuninori Kitahara
  • Publication number: 20010040760
    Abstract: A disk drive including a disk rotatably mounted in a housing and having a plurality of tracks, a rotating mechanism for rotating the disk, a head slider having a transducer for reading/writing data on the disk, and an actuator for moving the head slider across the tracks. The actuator includes an actuator arm rotatably mounted in the housing, a suspension having a front end portion for supporting the head slider and a base end portion fixed to the actuator arm, and a pad mounted on a disk opposing surface of the actuator arm. The pad overlaps at least an outermost circumferential portion of the disk in a specific position of the actuator upon stoppage of driving of the disk drive.
    Type: Application
    Filed: March 28, 2000
    Publication date: November 15, 2001
    Applicant: FUJITSU LTD.
    Inventor: Toshiyuki Hachiya
  • Patent number: 6317163
    Abstract: A video signal processing apparatus includes a receiver receiving an incoming video signal and producing an output video signal in response thereto, a limit setup unit setting up at least one of an upper limit value and a lower limit value for the output video signal, and a limiter supplied with the output video signal from the receiver and further with at least one of the upper limit value and the lower limit value from the limit setup unit, wherein the limiter limits a level of the output video signal produced by the receiver, by comparing the level of the output video signal according to any of the upper limit value and the lower limit value.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: November 13, 2001
    Assignee: Fujitsu Ltd.
    Inventors: Hideki Miyasaka, Hiroshi Ohtsuru, Tetsuya Yasui
  • Patent number: D478329
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: August 12, 2003
    Assignees: Hitachi, Ltd., Canon Kabushiki Kaisha, Sanyo Electric Co., Sharp Kabushiki Kaisha, Victor Company of Japan, Limited, Pioneer Corp., Phoenix Technologies K.K., Fujitsu Ltd.
    Inventors: Hiromasa Yamagishi, Ryuichi Onda, Tadaaki Tomikawa