Abstract: A method and a processing apparatus for use in a parallel computer realizing a coordinate scheduling which does not degrade a throughput performance of a system. According to this invention, if a parallel process in execution gets into a parallel synchronization waiting state, the parallel process is deactivated so that allocation of the parallel process is inhibited, a process of another executable job is allocated, instead. If a setting condition is satisfied during the execution of another job, an interruption signal for a process in execution is generated to activate the parallel process in the parallel synchronization waiting state, thereby resuming allocation of this parallel process. This invention may be applied to a parallel computer system of a distributed main storage MIMD type which implements plural tasks in parallel by plural PEs.

Abstract: A replacement control circuit 30, having a synchronization pattern monitoring circuit 31, an acquisition circuit 32, a tracking circuit 33, an RS flip-flop 34 and an AND gate 35, judges whether receive data D3 is in synchronization or not, counts a clock CLK corresponding to a byte of the receive data D3, and while the receive data D3 is judged to be in synchronization, generates a replacement control signal S5 that becomes active at a synchronization pattern location of each packet. When the replacement control signal S5 is active, a selection circuit 43 selects synchronization pattern P1 generated by a synchronization pattern generation circuit 42. When the replacement control signal S5 is inactive, the selection circuit 43 selects the receive data D3. The output of the selection circuit 43 is corrected by a byte error correction circuit in units of packets.

Abstract: A dictionary retrieval apparatus and method for retrieving a TRIE (Tree Retrieval) dictionary based on a lattice as a key, in which each candidate character of a recognition result is handled as a data node, and the character lattice is structured by connecting each of candidate characters with the control nodes. Based on control node connection information, character strings corresponding to each of the paths are retrieved by traversing the data nodes of a character lattice from a head to a tail. According to this method, a higher retrieval efficiency is achieved in comparison with the processing in which matching with the dictionary is implemented after all retrieval keys contained in the character lattice are generated.

Abstract: On a compound semiconductor substrate on which a compound semiconductor device is formed, a film having a multilayer structure formed by alternately depositing a multi-element compound semiconductor layer and a GaAs layer containing arsenic excessively deviating from a stoichiometric ratio repeatedly and an active layer deposited on said film having a multilayer structure are formed.When the thickness of the GaAs layer is made to a critical film thickness or less, even if the GaAs layer and the multi-element compound semiconductor layer have different lattice constants, the strain of lattice mismatch is confined in the vicinity of the interface, and a high resistance is achieved while maintaining a crystal of high quality as it is.

Abstract: The present invention relates to a charged particle beam exposure apparatus, deflecting a charged particle beam formed into a predetermined shape by being passed through a predetermined transmission mask, and irradiating a predetermined location on the surface of a sample with the charged particle beam. The apparatus comprises: a mirror barrel through which the charged particle beam is passed; and an electrostatic deflector, provided in the mirror barrel, for deflecting the charged particle beam. The electrostatic deflector has a plurality of pairs of electrodes, which are made of a conductive material having carbon as a primary element and are embedded in an internal face of an insulating cylinder. The present invention also relates to a method for forming the electrostatic deflector.

Abstract: In a parallel processor, a local area and an overlap area are assigned to the memory of each processing element (PE), and each PE makes calculations to update the data in both areas at the runtime. If the data in the overlap area is updated in processes closed in the PEs, the data transfer between adjacent PEs can be reduced and the parallel processes can be performed at a high speed.

Abstract: Disclosed herein is an optical modulator module including an optical waveguide structure of a Mach-Zehnder type, for example, an electrode for switching a coupling mode where an output beam is obtained from the optical waveguide structure and a leakage mode where a leakage beam deflects from the optical waveguide structure, a photodetector having a photodetecting surface for receiving the leakage beam, and a mechanism for converting a beam parameter of the leakage beam so as to prevent close contact of the photodetecting surface with the optical waveguide structure. The optical modulator module allows monitoring of optical power by the use of the leakage beam and is improved in manufacturability.

Abstract: A unit in a computer for computing a closest distance between two three-dimensional convex objects. At least one of the objects is a convex curved surface object. A first closest vector arithmetic unit is provided for identifying a preliminary closest vector coupling the closest points of the two objects by repeatedly calculating for each object an inner product of a candidate for the preliminary closest vector directed from a first of the two objects to a second of the two objects and a plurality of position vectors. Each position vector being one of a position vector of a vertex where the first object is a convex polyhedron, and a position vector of a control point of a convex curved surface patch where the first object is a convex curved surface object comprising sets of convex curved surface patches. A position vector for each object having a maximum inner product is extracted and a new candidate for the preliminary closest vector is formed by a vector connecting the two position vectors.

Abstract: A magneto-optic disk has a readout layer formed of a bismuth-substituted garnet having a chemical composition represented by Bi.sub.x R.sub.3-x M.sub.y Fe.sub.5-y O.sub.12 and a recording layer formed of a nonbismuth-substituted garnet having a chemical composition represented by R.sub.3 M, Fe.sub.5-z O.sub.12 (where 0.ltoreq.x.ltoreq.3, 0.ltoreq.y<2, 0.ltoreq.z<2, R represents yttrium or a rare earth element, and M represents element which can be substituted for iron (Fe). The readout layer has a smaller coercive force and a higher Curie temperature in comparison with the recording layer, and exhibits a characteristic of a large angle of Faraday rotation 200 times that of the recording layer with respect to a short-wavelength laser beam of about 500 nm.

Abstract: A cyclic wave v1 of a cycle T/m, such as a sine wave or a pulse wave, is generated, where T is one exposure period and m is a natural number. For each i=1 to 3, cyclic waves v2 to v4 are generated by delaying the cyclic wave v1 by i(T/4m), amplified and supplied to the electrodes of electrostatic deflectors 40, 50 and 60 in such a way that the electric fields formed at the deflectors 40 and 50 have opposite phases each other. For each electrostatic deflector, the phase difference between the voltage waveforms supplied to adjacent electrodes is T/4m and m may be set freely.

Abstract: An instruction selector receives M instructions per clock cycle and stores N instructions in an instruction queue memory. An instruction queue generates a precedence matrix indicative of the age of the N instructions. A dependency checker determines the available registers for executing the instructions ready for execution.An oldest-instruction selector selects the M oldest instructions responsive to the precedence matrix and the eligible queue entry signals. The instruction queue provides the M selected instructions to execution units for execution. Upon completing the instructions, the execution units provide register availability signals to the dependency checker to release the registers used for the instructions.

Abstract: Methods and apparati predict whether conditional branch computer instructions should be taken or not taken. A history register is maintained to record the history of groups of instructions, updated only once for each group. The history register and an address of one of the bytes of one of the instructions in each group are appended or otherwise combined to create an address to a table of two-bit saturating counters. The value of one of the bits of the counter at the address created is used for predicting all the conditional branch instructions for each branch in the group.

Abstract: A collection filter is created by a filter creation module according to instruction from a trace control module, and packet logs are collected by a line collection module. Further, an application log extraction module extracts application logs from packet logs by sequence matching using an extraction filter which contains a sequence filter, a performance analysis module analyzes the application logs using an analysis filter, and a graph display module displays a graph of the results.

Abstract: A system and method dynamically determines the topology of a source node routing network while having a minimal effect on network performance and without requiring expensive hardware to implement. A source node generates a ping frame. The source node transmits the ping frame to a first source router that is coupled to the source node. The first router transparently identifies the frame as a ping frame and creates an echo frame that is transmitted back to the source node. The first router identifies the port from which the ping frame is received and places this information in the header of the echo frame along with an echo frame identifier. The source node receives the echo frame and identifies routers and nodes to which a ping frame has not been sent based upon the connectivity information in the received echo frame. The source node continue generating and transmitting ping frame to all nodes and routers in the network.