Abstract: This invention relates to head position control method for a disk device the uses a disk medium whose tracks have been formatted externally, and the disk device that effectively uses the range of motion of an actuator. In a disk device that has a disk medium (2), head (3), actuator (5), a control circuit (8), there is a conversion mechanism (31) that sets a data area in the writing range of the disk (2) that corresponds to the range of motion of the actuator, and converts a logical address to a physical address in the data area. This invention makes it possible to set a storage capacity that makes maximum use of the range of motion of the actuator for any device, even when there is position offset in the range of motion of the actuator.

Abstract: An arrangement for locking first and second housing halves, adapted to connect to each other, includes a pin provided on the first housing and a locking member, with a pair of arms which are provided on the second housing to engage and hold the pin when the first and second housings are connected.

Abstract: In a working environment in which a connection is made between a router device installed in a SOHO and a management division, etc. at a remote location, a router system accommodates multiple user terminals. The router system has a monitoring unit that monitors the communicability state of the user terminals, and an editing communication unit that, when there has been any change in the communicability state of the user terminals, edits and transmits information on the communicability state of the user terminals.

Abstract: A repairable integrated thin film transistor matrix substrate includes an insulated substrate, and a plurality of parallel gate bus lines and a plurality of accumulated capacitance bus lines formed on the insulated substrate. Each of the accumulated capacitance bus lines extend parallel to and between a pair of the gate bus lines, and has a plurality of auxiliary capacitance electrodes which extend from it. A first insulated film is provided on the gate and accumulated capacitance bus lines and the auxiliary capacitance electrodes. A plurality of operating films are formed on the first insulated film, and on each of the operating films, a corresponding thin film transistors are provided. At least two of the thin film transistors are electrically connected to each of the gate bus lines. Also included is a plurality of parallel drain bus lines which are provided substantially perpendicular to the gate and the accumulated capacitance bus lines on the first insulated film.

Abstract: A head assembly for an information storage device that includes a head slider with a read/write element for reading/recording information to/from a disk and a suspension for supporting the head slider. The suspension includes a generally planar sheet that extends in a longitudinal direction from a first end to second end and an arm attaching portion located near the first end of the generally planar sheet of said suspension. The arm attaching portion is adapted to be attached to a head arm. The suspension also includes a slider attaching portion positioned near the second end of the generally planar sheet of the suspension, where the slider attaching portion extends generally in the longitudinal direction and is surrounded by a generally U-shaped opening in the generally planar sheet. The slider attaching portion faces a securing surface of the head slider.

Abstract: A negative pressure air bearing slider including a first air bearing surface formed on the bottom of the slider body at the upstream position so as to extend in the lateral direction of the slider body, and a pair of second air bearing surfaces formed on the bottom of the slider body separately from the first air bearing surface at downstream positions spaced in the lateral direction so as to define an air stream passage therebetween. The second air bearing surfaces serve to generate positive pressures that are spaced apart at downstream positions where a transducer element is embedded in the slider body, so that the slider's stiffness to rolling action can be enhanced. The cooperation of the front and rear rails enables for the creation of a higher negative pressure.

Abstract: The present invention provides a light emitting element driving apparatus having a driving unit for driving a light emitting element by means of a driving signal while performing automatic light power control, which enables a light output to rise at a high speed in the head portion of a burst signal to be first inputted and light outputs of a second burst signal after the first burst signal and signals thereafter to be stably supplied irrespective of holding time.

Abstract: A signal processing apparatus for reading and writing information to a storage medium includes a power supply control circuit that selectively inhibits and enables power to individual circuits of the signal processing apparatus in order to achieve maximum power conservation. The signal processing apparatus looks ahead to determine a next operation to be performed and, using either read or write information of the next operation, along with information concerning how long it takes to power up individual circuits, determines the optimal time to switch power on to the individual circuits. Power is then supplied to the individual circuits of the signal processing apparatus only when it is required by the individual circuits.

Abstract: A semiconductor device which receives addresses in synchronism with a clock signal and receives data in synchronism with a strobe signal includes address-latch circuits, a first control circuit which selects one of the address-latch circuits in sequence in response to the clock signal, and controls the selected one of the address-latch circuits to latch a corresponding one of the addresses in response to the clock signal, and a second control circuit which selects one of the address-latch circuits in sequence in response to the strobe signal, and controls the selected one of the address-latch circuits to output a corresponding one of the addresses in response to the strobe signal.

Abstract: A voltage controlled oscillator (VCO) having an amplifier including a field-effect transistor (FET). The VCO includes a voltage controlled capacitor having an inversion amplifier including an FET, an amp gain of the inversion amplifier being controlled by a voltage; and a capacitor connected between an input and an output of the inversion amplifier.

Abstract: Electrostatic developing units are arranged in the record paper conveyance direction, form dot latent images in conformity with image dot data through the issue of scanning light on photosensitive drums in rotation, and after developing by toner components, transfer dots onto record paper for development. For each lighting noticeable dot amount image dot data, a quantity-of-light control unit provides control and output of optical energy of the noticeable dot on the basis of peripheral dots which may have influence on the size of the noticeable dot on the record paper, for example, in response to the distance from the peripheral dots.

Abstract: In a signal amplifying circuit connected to a transfer circuit having a known non-linear transfer characteristic and a transient characteristic, a threshold generation circuit generates a threshold signal based on an input signal, a threshold control circuit controls the threshold signal so as to correct the non-linear transfer characteristic of the transfer circuit provided at a former stage based on the input signal. Also, basic amplifying circuit blocks can be connected in a multistage form, each of which is composed of a threshold generation circuit and a differential amplifying circuit, and control the threshold signal of a latter stage block so as to correct the non-linear transfer characteristic of a basic amplifying circuit block at a former stage based on the input signal.

Abstract: A processor 11A comprises a processor core 11 connected to an internal bus 14, an interface circuit 12 connected between the internal bus 14 and an external bus 22, and an interface circuit 13 connected between the internal bus 14 and an external bus 24. To simplify bus arbitration, the interface circuit 12 holds an address on the internal bus 14 in an first address buffer register 121 in response to an internal address strobe signal *ASi, judges based on the address value whether or not an access request is performed, outputs a bus request signal *PREQ, outputs the content of the first address register 121 onto the external bus 22 after getting a bus ownership, thereafter provides the data on the external bus 22 to the internal bus 14, and provides an internal ready signal *RDYi to the processor core 11. The processor may comprise a between-interface control circuit to enable to connect between the external circuits 22 and 24 in common.

Abstract: A DRAM semiconductor device is provided which includes a semiconductor substrate, a field insulating film formed on the semiconductor substrate, a plurality of active regions in the semiconductor substrate, each surrounded by the field insulating film, a gate electrode traversing each of the plurality of active regions, a pair of source/drain regions formed in each of the plurality of active regions on both sides of the gate electrode, a plurality of bit lines extending along one direction, each connected to one of the pair of source/drain regions, a plurality of word lines extending along a direction perpendicular to the bit lines, each of the plurality of word lines being connected to the gate electrode, and a plurality of capacitor elements extending over said gate electrode each connected to the other of the pair of source/drain regions, wherein each of the plurality of active regions includes an oblique area formed obliquely relative to the bit and word lines and a parallel area formed in parallel to the

Abstract: A semiconductor memory device includes a memory cell, and a dynamic latch type sense amplifier including transistors that form not only a dynamic latch circuit which holds or releases data but also charge transfer gates via which charges are applied to or received from bit lines. Data is read from the cell connected to the bit lines at a same time as a precharging operation on the bit lines.

Abstract: An image forming apparatus has a plurality of print assemblies for forming a color image, a fixing unit, and a paper conveyor belt for conveying a paper sheet through the print assemblies and the fixing unit. The fixing unit includes a pair of fixing rollers, a nip control mechanism for moving the pair of the fixing rollers between a nip position and a non-nip position, and a fixing unit securing member movable with the nip control mechanism. Thus, the fixing unit can be easily mounted and demounted.

Abstract: In a control device for a storage device in which data streams are respectively divided into unit data, which are distributed to storage parts and are sequentially read therefrom for every unit data, there is provided a buffer memory which stores data to be written into the storage parts and data read from the storage parts. An input/output control part causes the unit data from the storage parts in an access cycle corresponding to a bit rate to be stored in the buffer memory and causes the unit data stored in the buffer memory at the bit rate to be written into the storage parts. An input/output interface part reads the unit data from the buffer memory at the bit rate and causes the data transferred at the bit rate to be stored in the buffer memory.

Abstract: An adapter, for a terminal unit, comprising a base housing having a mount surface for mounting of a terminal unit. A receptive space is defined by a plurality of walls on a part of the mount surface. A pair of guide rails are formed on the mount surface of the base housing, so as to be slidably engaged with the terminal unit. Overhanging guide plates extending from opposed side walls have edges facing to the mount surface, so as to be slidably engaged with the terminal unit. The guides rails and the edges serve to guide the terminal unit to introduce a part of the terminal unit into the receptive space. A pair of protrusions are formed on the mount surface, so as to be engaged with the terminal unit. The protrusions serve to detachably hold the terminal unit in a proper position on the mount surface to maintain the functional connection between the adapter and the terminal unit.

Abstract: A high-speed network printer apparatus which can be used in common by clients having different communication protocols and which can sort out printing jobs into the order of clients. Printing information is supplied from a client which may be a personal computer or a work station through a connector of the printer apparatus. A LAN interface driver receives the printing information and identifies a communication protocol by which the printing information is transferred. A communication protocol controller receives printing information in accordance with a predetermined protocol. A spooling controller, which is coupled to a storage unit which stores the received printing information, creates a queue for printing jobs. A printer controller reads out from the storage unit the printing information corresponding to a printing job of the highest priority which is designated by the queue, and forms a dot image on the basis of the printing information. A printing mechanism prints the image on paper.

Abstract: A SAW filter includes a first SAW resonator having a pair of terminals and a predetermined resonance frequency (frp), the first SAW resonator being provided in a parallel arm of the SAW filter. A second SAW resonator has a pair of terminals and a predetermined resonance frequency (frs) approximately equal to a predetermined antiresonance frequency of the first SAW resonator (fap). The second SAW resonator is provided in a series arm of the SAW filter. An inductance element is connected in series to the first SAW resonator.